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Update Petalinux Hardware Design authored by longz's avatar longz
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Petalinux-Hardware-Design.md
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...@@ -8,7 +8,7 @@ Hardware Design setup step Vivado Project Setup Hardware Design Process IP Core ...@@ -8,7 +8,7 @@ Hardware Design setup step Vivado Project Setup Hardware Design Process IP Core
## 0. Project Clone from GIT ## 0. Project Clone from GIT
- Download the project repo from git (if you run into xpfm path not found issue in Vitis, please see //TODO) - Download the project repo from git
## 1. Open Vivado ## 1. Open Vivado
...@@ -55,12 +55,17 @@ The design process has three parts: Sythesis, Implementation, Generate Bitstream ...@@ -55,12 +55,17 @@ The design process has three parts: Sythesis, Implementation, Generate Bitstream
## 5. After the Generate Bitstream process ## 5. After the Generate Bitstream process
- After the Generate Bitstream process is finished, close the pop up window - After the Generate Bitstream process is finished, close the pop up window
- Hardware Manager can be very helpful for hw/sw debug, but you need to setup ILA to probe wires ![image](uploads/5f93d0edb5384ece0c26304738752dab/image.png) > NOTE: Hardware Manager can be very helpful for hw/sw debug, but you need to setup ILA to probe wires ![image](uploads/5f93d0edb5384ece0c26304738752dab/image.png)
## 6. Export Hardware ## 6. Export Hardware and bitstream
- Go to File - Export - Export Hardware, in the pop up window, select Fixed, then click next. select Include bitstream, then click next. You shouldn't need to change the name of the xsa file, but if you do make sure to update that in your Vitis platform project or linux boot drive. Finally, click finish. ![image](uploads/235c305dcd182a0b7b2de5f9d1e1d709/image.png) ![image](uploads/62e8a56aab884b0fa53cb7cd6fc9b919/image.png) ![image](uploads/7e1f68246a2cbab24adec29ee73e9834/image.png) ![image](uploads/0f3c1d42b4f629f7337eea5c7df0ba6f/image.png) - Go to File - Export - Export Hardware, in the pop up window, select Fixed, then click next. select Include bitstream, then click next. You shouldn't need to change the name of the xsa file, but if you do make sure to update that in your Vitis platform project or linux boot drive. Finally, click finish.
- the xsa file contains everything you have done in the hardware design, and that is how the FPGA reads the hardware configuration.
![image](uploads/9a2e734d4e75cde55d76842d9e01ea51/image.png) ![image](uploads/929ca93dbaccbd1dfaba87e8bb6afda4/image.png) ![image](uploads/c6d75b52aeb0a3433e292562ec3775de/image.png) ![image](uploads/a059b2231fec54d00f24bdd8d7a96e21/image.png)
> NOTE: the xsa file contains everything you have done in the hardware design, and that is how the FPGA reads the hardware configuration.
- Then similarly, go to File - Export - Export Bitstream File, in the pop yp window, navigate to the /petalinux/hw/ folder, name the bitstream file(usually same as the xsa file), then click save.
![image](uploads/abfb428103890aca497f50c0339d57c2/image.png) ![image](uploads/994e4cf20b2def69d84d8a5f0921d9e9/image.png)
# IP Core documentation and reference # IP Core documentation and reference
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