diff --git a/quad/ip_repo/pwm_recorder_1.0/component.xml b/quad/ip_repo/pwm_recorder_1.0/component.xml
index e4ca5921360cd35a63a969ba2b343f4bdf4231c9..de0ac00a93d2729fd096992ad01b6b58af55356f 100644
--- a/quad/ip_repo/pwm_recorder_1.0/component.xml
+++ b/quad/ip_repo/pwm_recorder_1.0/component.xml
@@ -247,7 +247,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>POLARITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
+ <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_9d8b0d81">ACTIVE_LOW</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
@@ -304,7 +304,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
- <spirit:value>3e8b6769</spirit:value>
+ <spirit:value>5df65d36</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@@ -320,7 +320,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
- <spirit:value>3e8b6769</spirit:value>
+ <spirit:value>2533723a</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@@ -366,6 +366,20 @@
</spirit:parameter>
</spirit:parameters>
</spirit:view>
+ <spirit:view>
+ <spirit:name>xilinx_testbench</spirit:name>
+ <spirit:displayName>Test Bench</spirit:displayName>
+ <spirit:envIdentifier>:vivado.xilinx.com:simulation.testbench</spirit:envIdentifier>
+ <spirit:fileSetRef>
+ <spirit:localName>xilinx_testbench_view_fileset</spirit:localName>
+ </spirit:fileSetRef>
+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>viewChecksum</spirit:name>
+ <spirit:value>285dd1e3</spirit:value>
+ </spirit:parameter>
+ </spirit:parameters>
+ </spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
@@ -712,7 +726,7 @@
<spirit:enumeration>32</spirit:enumeration>
</spirit:choice>
<spirit:choice>
- <spirit:name>choice_list_74b5137e</spirit:name>
+ <spirit:name>choice_list_9d8b0d81</spirit:name>
<spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
<spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
</spirit:choice>
@@ -753,6 +767,12 @@
<spirit:name>hdl/pwm_recorder_v1_0.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
</spirit:file>
+ <spirit:file>
+ <spirit:name>hdl/kernel_tester.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
+ <spirit:logicalName>xil_defaultlib</spirit:logicalName>
+ </spirit:file>
</spirit:fileSet>
<spirit:fileSet>
<spirit:name>xilinx_softwaredriver_view_fileset</spirit:name>
@@ -802,6 +822,15 @@
<spirit:fileType>tclSource</spirit:fileType>
</spirit:file>
</spirit:fileSet>
+ <spirit:fileSet>
+ <spirit:name>xilinx_testbench_view_fileset</spirit:name>
+ <spirit:file>
+ <spirit:name>hdl/kernel_tester.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
+ <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
+ </spirit:file>
+ </spirit:fileSet>
</spirit:fileSets>
<spirit:description>Records the incoming pwm signal and assigns to a register</spirit:description>
<spirit:parameters>
@@ -869,20 +898,20 @@
<xilinx:taxonomy>AXI_Peripheral</xilinx:taxonomy>
</xilinx:taxonomies>
<xilinx:displayName>pwm_recorder_v1.0</xilinx:displayName>
- <xilinx:coreRevision>2</xilinx:coreRevision>
- <xilinx:coreCreationDateTime>2017-12-09T23:55:52Z</xilinx:coreCreationDateTime>
+ <xilinx:coreRevision>3</xilinx:coreRevision>
+ <xilinx:coreCreationDateTime>2018-09-27T18:04:22Z</xilinx:coreCreationDateTime>
<xilinx:tags>
<xilinx:tag xilinx:name="user.org:user:pwm_recorder:1.0_ARCHIVE_LOCATION">/local/ucart/MicroCART/quad/ip_repo/pwm_recorder_1.0</xilinx:tag>
</xilinx:tags>
</xilinx:coreExtensions>
<xilinx:packagingInfo>
- <xilinx:xilinxVersion>2017.1</xilinx:xilinxVersion>
- <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="cebbc925"/>
- <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="59f5074b"/>
- <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="940b66fe"/>
- <xilinx:checksum xilinx:scope="ports" xilinx:value="55925bde"/>
- <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="1826240f"/>
- <xilinx:checksum xilinx:scope="parameters" xilinx:value="dd451e08"/>
+ <xilinx:xilinxVersion>2018.2.1</xilinx:xilinxVersion>
+ <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="9a0bb3a5"/>
+ <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="c30980da"/>
+ <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="3919f8f0"/>
+ <xilinx:checksum xilinx:scope="ports" xilinx:value="266b534b"/>
+ <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="f9a38560"/>
+ <xilinx:checksum xilinx:scope="parameters" xilinx:value="4a81a732"/>
</xilinx:packagingInfo>
</spirit:vendorExtensions>
</spirit:component>
diff --git a/quad/ip_repo/pwm_recorder_1.0/hdl/kernel_tester.vhd b/quad/ip_repo/pwm_recorder_1.0/hdl/kernel_tester.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..a9f79d2e362ba57a57e3e6511c46a9ab2ef73e5b
--- /dev/null
+++ b/quad/ip_repo/pwm_recorder_1.0/hdl/kernel_tester.vhd
@@ -0,0 +1,148 @@
+----------------------------------------------------------------------------------
+-- Company:
+-- Engineer:
+--
+-- Create Date: 09/27/2018 12:05:17 PM
+-- Design Name:
+-- Module Name: kernel_tester - testbench
+-- Project Name:
+-- Target Devices:
+-- Tool Versions:
+-- Description:
+--
+-- Dependencies:
+--
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+--
+----------------------------------------------------------------------------------
+
+
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+USE ieee.numeric_std.all;
+
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+--use IEEE.NUMERIC_STD.ALL;
+
+-- Uncomment the following library declaration if instantiating
+-- any Xilinx leaf cells in this code.
+--library UNISIM;
+--use UNISIM.VComponents.all;
+
+entity kernel_tester is
+-- Port ( );
+end kernel_tester;
+
+architecture testbench of kernel_tester is
+ component pwm_rec is
+ port(
+ clk : in std_logic;
+ reset_n : in std_logic;
+ input_signal : in std_logic;
+ write_o : out std_logic;
+ count_out : out std_logic_vector(31 downto 0));
+ end component;
+
+ constant CLK_HPER : time := 20 ns;
+ signal clk : std_logic;
+ signal pwm : std_logic;
+ signal reset_n : std_logic;
+ signal count : std_logic_vector(31 downto 0);
+ signal write : std_logic;
+ signal done : std_logic := '0';
+
+begin
+ UUT: pwm_rec
+ port map(
+ clk => clk,
+ reset_n => reset_n,
+ input_signal => pwm,
+ write_o => write,
+ count_out => count);
+
+ test_process: process
+ variable period : integer;
+
+ begin
+ reset_n <='0';
+ wait for 2*CLK_HPER;
+ reset_n <='1';
+
+ period := 100;
+ pwm <= '0';
+ wait for CLK_HPER*2*20;
+ pwm <= '1';
+ wait for period*2*CLK_HPER;
+ pwm <= '0';
+ wait until write='1';
+ ASSERT count=std_logic_vector(to_unsigned(period, 32)) REPORT "Incorrect COUNT result" SEVERITY FAILURE;
+
+ period := 200;
+ pwm <= '0';
+ wait for CLK_HPER*2*20;
+ pwm <= '1';
+ wait for period*2*CLK_HPER;
+ pwm <= '0';
+ wait until write='1';
+ ASSERT count=std_logic_vector(to_unsigned(period, 32)) REPORT "Incorrect COUNT result" SEVERITY FAILURE;
+
+ period := 300;
+ pwm <= '0';
+ wait for CLK_HPER*2*20;
+ pwm <= '1';
+ wait for period*2*CLK_HPER;
+ pwm <= '0';
+ wait until write='1';
+ ASSERT count=std_logic_vector(to_unsigned(period, 32)) REPORT "Incorrect COUNT result" SEVERITY FAILURE;
+
+ period := 400;
+ pwm <= '0';
+ wait for CLK_HPER*2*20;
+ pwm <= '1';
+ wait for period*2*CLK_HPER;
+ pwm <= '0';
+ wait until write='1';
+ ASSERT count=std_logic_vector(to_unsigned(period, 32)) REPORT "Incorrect COUNT result" SEVERITY FAILURE;
+
+ period := 10;
+ pwm <= '0';
+ wait for CLK_HPER*2*20;
+ pwm <= '1';
+ wait for period*2*CLK_HPER;
+ pwm <= '0';
+ for t in 0 to 100 loop
+ wait for 2*CLK_HPER;
+ ASSERT write='0' REPORT "Glitch not Ignored" SEVERITY FAILURE;
+ end loop;
+
+ -- Run for 45, glitch for 10, then run for 45, expect a result of 100
+ period := 100;
+ pwm <= '0';
+ wait for CLK_HPER*2*20;
+ pwm <= '1';
+ wait for 45*2*CLK_HPER;
+ pwm <= '0';
+ wait for 10*2*CLK_HPER;
+ pwm <= '1';
+ wait for 45*2*CLK_HPER;
+ pwm <= '0';
+ wait until write='1';
+ ASSERT count=std_logic_vector(to_unsigned(period, 32)) REPORT "Incorrect COUNT result" SEVERITY FAILURE;
+
+ done <='1';
+ wait;
+ end process;
+
+ clock_proc: process
+ begin
+ clk <= '0';
+ wait for CLK_HPER;
+ clk <= '1';
+ wait for CLK_HPER;
+ if (done = '1') then wait; end if;
+ end process;
+
+end testbench;
diff --git a/quad/ip_repo/pwm_recorder_1.0/src/pwm_rec.vhd b/quad/ip_repo/pwm_recorder_1.0/src/pwm_rec.vhd
index 50f177848545b9c628926c534a567f3af17c5c55..9429231520344b4dece9ad83f8886894a0c272b4 100644
--- a/quad/ip_repo/pwm_recorder_1.0/src/pwm_rec.vhd
+++ b/quad/ip_repo/pwm_recorder_1.0/src/pwm_rec.vhd
@@ -62,6 +62,14 @@ begin
counter <= x"00000000";
current <= '0';
write_o <= '0';
+
+ -- Neither all high or all low
+ elsif (current = '1') then
+ current <= '1';
+ counter <= counter + 1;
+ write_o <= '0';
+
+
end if;
end if;
end process;