From ea7d6e3499704c754bb144528ffb0fdf09c0e876 Mon Sep 17 00:00:00 2001
From: 488_MP-4 <488_MP-4@iastate.edu>
Date: Mon, 25 Mar 2024 23:03:14 +0100
Subject: [PATCH] cross-compiling
---
.../config/trace.h | 8 +-
.../deck/drivers/interface/locodeck.h | 8 +-
.../drivers/interface/cppm.h | 1 +
.../drivers/interface/i2c_drv.h | 12 +-
.../drivers/interface/led.h | 1 +
.../drivers/src/ak8963.c | 2 +-
.../drivers/src/cppm.c | 9 +-
.../drivers/src/i2c_drv.c | 376 ++--
.../drivers/src/i2cdev.c | 14 +-
.../drivers/src/uart1.c | 19 +-
.../drivers/src/uart2.c | 21 +-
.../drivers/src/uart_syslink.c | 2 +-
.../drivers/src/vl53l0x.c | 4 +-
.../drivers/src/ws2812_cf2.c | 14 +-
.../hal/src/usb_bsp.c | 360 +--
.../hal/src/usbd_desc.c | 21 +-
.../hal/src/usec_time.c | 5 +-
.../lib/CMSIS/Core/CM3/core_cm3.h | 1763 +++++++++++++++
.../lib/CMSIS/Core/CM3/stm32f10x.h | 3 +-
.../lib/CMSIS/STM32F4xx/Include/cmsis_gcc.h | 1373 ++++++++++++
.../lib/CMSIS/STM32F4xx/Include/core_cm4.h | 1937 +++++++++++++++++
.../lib/CMSIS/STM32F4xx/Include/core_cmFunc.h | 87 +
.../CMSIS/STM32F4xx/Include/core_cmInstr.h | 87 +
.../lib/CMSIS/STM32F4xx/Include/core_cmSimd.h | 96 +
.../modules/interface/bootloader.h | 1 +
.../modules/src/bootloader.c | 17 +-
.../modules/src/controller.c | 11 +-
.../modules/src/crtpservice.c | 1 +
.../modules/src/estimator.c | 11 +-
.../modules/src/stabilizer.c | 4 +-
.../modules/src/system.c | 61 +-
.../uart/Makefile | 45 +-
.../uart/build/ak8963.o | Bin 0 -> 2344 bytes
.../uart/build/amg8833.o | Bin 0 -> 4144 bytes
.../uart/build/app_channel.o | Bin 0 -> 2776 bytes
.../uart/build/app_handler.o | Bin 0 -> 2224 bytes
.../uart/build/attitude_pid_controller.o | Bin 0 -> 9456 bytes
.../uart/build/bmi055_accel.o | Bin 0 -> 8456 bytes
.../uart/build/bmi055_gyro.o | Bin 0 -> 3008 bytes
.../uart/build/bmi088_accel.o | Bin 0 -> 6816 bytes
.../uart/build/bmi088_fifo.o | Bin 0 -> 888 bytes
.../uart/build/bmi088_gyro.o | Bin 0 -> 4248 bytes
.../uart/build/bmi160.o | Bin 0 -> 20784 bytes
.../uart/build/bmm150.o | Bin 0 -> 7952 bytes
.../uart/build/bmp280.o | Bin 0 -> 8640 bytes
.../uart/build/bmp3.o | Bin 0 -> 8984 bytes
.../uart/build/bootloader.o | Bin 0 -> 1280 bytes
.../uart/build/bstdr_comm_support.o | Bin 0 -> 1736 bytes
.../uart/build/buzzer.o | Bin 0 -> 1472 bytes
.../uart/build/collision_avoidance.o | Bin 0 -> 4104 bytes
.../uart/build/comm.o | Bin 0 -> 2344 bytes
.../uart/build/commander.o | Bin 0 -> 6960 bytes
.../uart/build/console.o | Bin 0 -> 3728 bytes
.../uart/build/controller.o | Bin 0 -> 3816 bytes
.../uart/build/controller_indi.o | Bin 0 -> 10832 bytes
.../uart/build/controller_mellinger.o | Bin 0 -> 9440 bytes
.../uart/build/controller_pid.o | Bin 0 -> 5832 bytes
.../uart/build/controller_student.o | Bin 0 -> 6000 bytes
.../uart/build/cppm.o | Bin 0 -> 1984 bytes
.../uart/build/crtp.o | Bin 0 -> 13784 bytes
.../uart/build/crtp_commander.o | Bin 0 -> 2592 bytes
.../uart/build/crtp_commander_generic.o | Bin 0 -> 5648 bytes
.../uart/build/crtp_commander_rpyt.o | Bin 0 -> 3776 bytes
.../uart/build/crtp_localization_service.o | Bin 0 -> 8384 bytes
.../uart/build/crtpservice.o | Bin 0 -> 4944 bytes
.../uart/build/eeprom.o | Bin 0 -> 3896 bytes
.../uart/build/estimator.o | Bin 0 -> 14528 bytes
.../uart/build/estimator_complementary.o | Bin 0 -> 2576 bytes
.../uart/build/eventtrigger.o | Bin 0 -> 2056 bytes
.../uart/build/extrx.o | Bin 0 -> 3848 bytes
.../uart/build/freeRTOSdebug.o | Bin 0 -> 1888 bytes
.../uart/build/i2c_drv.o | Bin 0 -> 2888 bytes
.../uart/build/i2cdev.o | Bin 0 -> 1776 bytes
.../uart/build/led.o | Bin 0 -> 1136 bytes
.../uart/build/ledseq.o | Bin 0 -> 5888 bytes
.../uart/build/lh_bootloader.o | Bin 0 -> 1696 bytes
.../uart/build/log.o | Bin 0 -> 24072 bytes
.../uart/build/lps25h.o | Bin 0 -> 2184 bytes
.../uart/build/maxsonar.o | Bin 0 -> 968 bytes
.../uart/build/mem.o | Bin 0 -> 7360 bytes
.../uart/build/mpu6500.o | Bin 0 -> 16840 bytes
.../uart/build/msp.o | Bin 0 -> 3320 bytes
.../uart/build/ow_common.o | Bin 0 -> 2216 bytes
.../uart/build/ow_syslink.o | Bin 0 -> 5944 bytes
.../uart/build/param.o | Bin 0 -> 13920 bytes
.../uart/build/pca9555.o | Bin 0 -> 3264 bytes
.../uart/build/pca95x4.o | Bin 0 -> 2360 bytes
.../uart/build/pca9685.o | Bin 0 -> 2384 bytes
.../uart/build/peer_localization.o | Bin 0 -> 2032 bytes
.../uart/build/pid.o | Bin 0 -> 2184 bytes
.../uart/build/piezo.o | Bin 0 -> 1368 bytes
.../uart/build/platformservice.o | Bin 0 -> 5200 bytes
.../uart/build/pmw3901.o | Bin 0 -> 1008 bytes
.../uart/build/position_controller_indi.o | Bin 0 -> 12064 bytes
.../uart/build/position_controller_pid.o | Bin 0 -> 9440 bytes
.../uart/build/position_estimator_altitude.o | Bin 0 -> 3744 bytes
.../uart/build/power_distribution_stock.o | Bin 0 -> 4736 bytes
.../uart/build/proximity.o | Bin 0 -> 1584 bytes
.../uart/build/queuemonitor.o | Bin 0 -> 888 bytes
.../uart/build/radiolink.o | Bin 0 -> 8320 bytes
.../uart/build/range.o | Bin 0 -> 2400 bytes
.../uart/build/sensfusion6.o | Bin 0 -> 6128 bytes
.../uart/build/sensors.o | Bin 0 -> 2672 bytes
.../uart/build/sound_cf2.o | Bin 0 -> 10312 bytes
.../uart/build/stabilizer.o | Bin 0 -> 17912 bytes
.../uart/build/static_mem.o | Bin 0 -> 6656 bytes
.../uart/build/storage.o | Bin 0 -> 4744 bytes
.../uart/build/student_attitude_controller.o | Bin 0 -> 9504 bytes
.../uart/build/student_pid.o | Bin 0 -> 2280 bytes
.../uart/build/supervisor.o | Bin 0 -> 3272 bytes
.../uart/build/swd.o | Bin 0 -> 1536 bytes
.../uart/build/syslink.o | Bin 0 -> 7096 bytes
.../uart/build/sysload.o | Bin 0 -> 5048 bytes
.../uart/build/system.o | Bin 0 -> 12128 bytes
.../uart/build/uart1.o | Bin 0 -> 1816 bytes
.../uart/build/uart2.o | Bin 0 -> 1880 bytes
.../uart/build/uart_syslink.o | Bin 0 -> 2136 bytes
.../uart/build/usb.o | Bin 0 -> 9368 bytes
.../uart/build/usb_bsp.o | Bin 0 -> 1136 bytes
.../uart/build/usbd_desc.o | Bin 0 -> 3704 bytes
.../uart/build/usblink.o | Bin 0 -> 4944 bytes
.../uart/build/usec_time.o | Bin 0 -> 1304 bytes
.../uart/build/vl53l0x.o | Bin 0 -> 2184 bytes
.../uart/build/vl53l1_api.o | Bin 0 -> 18304 bytes
.../uart/build/vl53l1_api_calibration.o | Bin 0 -> 4856 bytes
.../uart/build/vl53l1_api_core.o | Bin 0 -> 15760 bytes
.../uart/build/vl53l1_api_debug.o | Bin 0 -> 1024 bytes
.../uart/build/vl53l1_api_preset_modes.o | Bin 0 -> 4600 bytes
.../uart/build/vl53l1_api_strings.o | Bin 0 -> 4520 bytes
.../uart/build/vl53l1_core.o | Bin 0 -> 10264 bytes
.../uart/build/vl53l1_core_support.o | Bin 0 -> 1176 bytes
.../uart/build/vl53l1_error_strings.o | Bin 0 -> 1328 bytes
.../uart/build/vl53l1_register_funcs.o | Bin 0 -> 10496 bytes
.../uart/build/vl53l1_silicon_core.o | Bin 0 -> 1272 bytes
.../uart/build/vl53l1_wait.o | Bin 0 -> 3816 bytes
.../uart/build/vl53l1x.o | Bin 0 -> 1752 bytes
.../uart/build/watchdog.o | Bin 0 -> 1016 bytes
.../uart/build/worker.o | Bin 0 -> 2376 bytes
.../uart/build/ws2812_cf2.o | Bin 0 -> 1120 bytes
.../utils/src/cf_math.h | 157 +-
.../src/lighthouse/lighthouse_geometry.c | 15 +-
.../src/lighthouse/lighthouse_geometry.h | 5 +-
142 files changed, 5982 insertions(+), 569 deletions(-)
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/Core/CM3/core_cm3.h
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/cmsis_gcc.h
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cm4.h
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmFunc.h
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmInstr.h
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmSimd.h
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ak8963.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/amg8833.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/app_channel.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/app_handler.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/attitude_pid_controller.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi055_accel.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi055_gyro.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_accel.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_fifo.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_gyro.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi160.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmm150.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmp280.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmp3.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bootloader.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bstdr_comm_support.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/buzzer.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/collision_avoidance.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/comm.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/commander.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/console.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_indi.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_mellinger.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_pid.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_student.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/cppm.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander_generic.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander_rpyt.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_localization_service.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtpservice.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/eeprom.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/estimator.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/estimator_complementary.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/eventtrigger.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/extrx.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/freeRTOSdebug.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/i2c_drv.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/i2cdev.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/led.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ledseq.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/lh_bootloader.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/log.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/lps25h.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/maxsonar.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/mem.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/mpu6500.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/msp.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ow_common.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ow_syslink.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/param.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca9555.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca95x4.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca9685.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/peer_localization.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pid.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/piezo.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/platformservice.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pmw3901.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_controller_indi.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_controller_pid.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_estimator_altitude.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/power_distribution_stock.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/proximity.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/queuemonitor.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/radiolink.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/range.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sensfusion6.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sensors.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sound_cf2.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/stabilizer.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/static_mem.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/storage.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/student_attitude_controller.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/student_pid.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/supervisor.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/swd.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/syslink.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sysload.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/system.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart1.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart2.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart_syslink.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usb.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usb_bsp.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usbd_desc.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usblink.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usec_time.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l0x.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_calibration.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_core.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_debug.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_preset_modes.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_strings.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_core.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_core_support.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_error_strings.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_register_funcs.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_silicon_core.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_wait.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1x.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/watchdog.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/worker.o
create mode 100644 uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ws2812_cf2.o
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/config/trace.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/config/trace.h
index 65fa9ffb2..96a4bc589 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/config/trace.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/config/trace.h
@@ -49,9 +49,9 @@
#define ITM_BLOCKING_ON_QUEUE_RECEIVE 0x0300
#define ITM_BLOCKING_ON_QUEUE_SEND 0x0400
-#define traceQUEUE_SEND(xQueue) ITM_SEND(3, ITM_QUEUE_SEND | ((xQUEUE *) xQueue)->uxQueueNumber)
-#define traceQUEUE_SEND_FAILED(xQueue) ITM_SEND(3, ITM_QUEUE_FAILED | ((xQUEUE *) xQueue)->uxQueueNumber)
-#define traceBLOCKING_ON_QUEUE_RECEIVE(xQueue) ITM_SEND(3, ITM_BLOCKING_ON_QUEUE_RECEIVE | ((xQUEUE *) xQueue)->uxQueueNumber)
-#define traceBLOCKING_ON_QUEUE_SEND(xQueue) ITM_SEND(3, ITM_BLOCKING_ON_QUEUE_SEND | ((xQUEUE *) xQueue)->uxQueueNumber)
+// #define traceQUEUE_SEND(xQueue) ITM_SEND(3, ITM_QUEUE_SEND | ((xQUEUE *) xQueue)->uxQueueNumber)
+// #define traceQUEUE_SEND_FAILED(xQueue) ITM_SEND(3, ITM_QUEUE_FAILED | ((xQUEUE *) xQueue)->uxQueueNumber)
+// #define traceBLOCKING_ON_QUEUE_RECEIVE(xQueue) ITM_SEND(3, ITM_BLOCKING_ON_QUEUE_RECEIVE | ((xQUEUE *) xQueue)->uxQueueNumber)
+// #define traceBLOCKING_ON_QUEUE_SEND(xQueue) ITM_SEND(3, ITM_BLOCKING_ON_QUEUE_SEND | ((xQUEUE *) xQueue)->uxQueueNumber)
#endif
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/deck/drivers/interface/locodeck.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/deck/drivers/interface/locodeck.h
index d2bb34493..ad869a62a 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/deck/drivers/interface/locodeck.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/deck/drivers/interface/locodeck.h
@@ -38,7 +38,8 @@
#include "FreeRTOS.h"
-#include "libdw1000.h"
+//COMMENTED FIRMWARE
+//#include "libdw1000.h"
#include "stabilizer_types.h"
// Timestamp counter frequency
@@ -89,8 +90,9 @@ uint8_t locoDeckGetActiveAnchorIdList(uint8_t unorderedAnchorList[], const int m
// Callbacks for uwb algorithms
typedef struct uwbAlgorithm_s {
- void (*init)(dwDevice_t *dev);
- uint32_t (*onEvent)(dwDevice_t *dev, uwbEvent_t event);
+ //COMMENTED FIRMWARE
+ // void (*init)(dwDevice_t *dev);
+ // uint32_t (*onEvent)(dwDevice_t *dev, uwbEvent_t event);
bool (*isRangingOk)();
bool (*getAnchorPosition)(const uint8_t anchorId, point_t* position);
uint8_t (*getAnchorIdList)(uint8_t unorderedAnchorList[], const int maxListSize);
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/cppm.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/cppm.h
index 0971d6b88..0f7d9d952 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/cppm.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/cppm.h
@@ -26,6 +26,7 @@
*/
#include <stdint.h>
+#include <stdbool.h>
void cppmInit(void);
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/i2c_drv.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/i2c_drv.h
index 5942b399a..11fea627f 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/i2c_drv.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/i2c_drv.h
@@ -1,12 +1,20 @@
#ifndef I2C_H
#define I2C_H
+#include<stdbool.h>
+
#include "FreeRTOS.h"
#include "semphr.h"
#include "queue.h"
/* ST includes */
#include "stm32fxxx.h"
+//ADDED
+// #include "stm32f4xx_dma.h"
+// #include "stm32f4xx_gpio.h"
+// #include "stm32f4xx_rcc.h"
+// #include "stm32f4xx_i2c.h"
+
#define I2C_NO_INTERNAL_ADDRESS 0xFFFF
typedef enum
@@ -32,7 +40,7 @@ typedef struct _I2cMessage
uint8_t nbrOfRetries; //< The slave address of the device on the I2C bus.
I2cDirection direction; //< Direction of message
I2cStatus status; //< i2c status
- xQueueHandle clientQueue; //< Queue to send received messages to.
+ //xQueueHandle clientQueue; //< Queue to send received messages to.
bool isInternal16bit; //< Is internal address 16 bit. If false 8 bit.
uint16_t internalAddress; //< Internal address of device.
uint8_t *buffer; //< Pointer to the buffer from where data will be read for transmission, or into which received data will be placed.
@@ -73,7 +81,7 @@ typedef struct
StaticSemaphore_t isBusFreeSemaphoreBuffer;
SemaphoreHandle_t isBusFreeMutex; //< Mutex to protect bus
StaticSemaphore_t isBusFreeMutexBuffer;
- DMA_InitTypeDef DMAStruct; //< DMA configuration structure used during transfer setup.
+ //DMA_InitTypeDef DMAStruct; //< DMA configuration structure used during transfer setup.
} I2cDrv;
// Definitions of i2c busses found in c file.
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/led.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/led.h
index c4b543494..7f13995bb 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/led.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/interface/led.h
@@ -27,6 +27,7 @@
#define __LED_H__
#include <stdbool.h>
+#include <stm32f4xx_gpio.h>
//Led polarity configuration constant
#define LED_POL_POS 0
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/ak8963.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/ak8963.c
index 7aa6b20c9..300211067 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/ak8963.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/ak8963.c
@@ -233,7 +233,7 @@ void ak8963Reset()
{
//COMMENTED FIRMWARE
//i2cdevWriteBits(I2Cx, devAddr, AK8963_RA_CNTL, AK8963_CNTL_MODE_BIT,
- AK8963_CNTL_MODE_LENGTH, AK8963_MODE_POWERDOWN);
+ // AK8963_CNTL_MODE_LENGTH, AK8963_MODE_POWERDOWN);
}
// ASTC register
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/cppm.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/cppm.c
index a3cf95cee..94397bcd7 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/cppm.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/cppm.c
@@ -104,10 +104,11 @@ void cppmInit(void)
// TIM_Cmd(CPPM_TIMER, ENABLE);
}
-bool cppmIsAvailible(void)
-{
- return isAvailible;
-}
+//COMMENTED FIRMWARE
+// bool cppmIsAvailible(void)
+// {
+// return isAvailible;
+// }
int cppmGetTimestamp(uint16_t *timestamp)
{
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/i2c_drv.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/i2c_drv.c
index 869a29ba6..978c1e204 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/i2c_drv.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/i2c_drv.c
@@ -15,13 +15,11 @@
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library.
- *
- * i2c_drv.c - i2c driver implementation
+ * MERCHANTABILITY or FITNESS FOR static TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
+// static TIM_OCInitTypeDef TIM_OCInitStructure;
+// static GPIO_InitTypeDef GPIO_InitStructure;
+// static DMA_InitTypeDef DMA_InitStructure;
+// static NVIC_InitTypeDef NVIC_InitStructure;tation
*
* @note
* For some reason setting CR1 reg in sequence with
@@ -70,10 +68,11 @@
#define I2CDEV_CLK_TS (10)
static void gpioWaitForHigh(GPIO_TypeDef *gpio, uint16_t pin, uint16_t timeout_us)
{
- uint64_t start = usecTimestamp();
- while (GPIO_ReadInputDataBit(gpio, pin) == Bit_RESET && usecTimestamp() - start <= timeout_us)
- {
- }
+ //COMMENTED FIRMWARE
+ // uint64_t start = usecTimestamp();
+ // while (GPIO_ReadInputDataBit(gpio, pin) == Bit_RESET && usecTimestamp() - start <= timeout_us)
+ // {
+ // }
}
@@ -124,26 +123,27 @@ static void i2cdrvDmaIsrHandler(I2cDrv* i2c);
// Cost definitions of busses
static const I2cDef sensorBusDef =
{
- .i2cPort = I2C3,
- .i2cPerif = RCC_APB1Periph_I2C3,
- .i2cEVIRQn = I2C3_EV_IRQn,
- .i2cERIRQn = I2C3_ER_IRQn,
- .i2cClockSpeed = I2C_DEFAULT_SENSORS_CLOCK_SPEED,
- .gpioSCLPerif = RCC_AHB1Periph_GPIOA,
- .gpioSCLPort = GPIOA,
- .gpioSCLPin = GPIO_Pin_8,
- .gpioSCLPinSource = GPIO_PinSource8,
- .gpioSDAPerif = RCC_AHB1Periph_GPIOC,
- .gpioSDAPort = GPIOC,
- .gpioSDAPin = GPIO_Pin_9,
- .gpioSDAPinSource = GPIO_PinSource9,
- .gpioAF = GPIO_AF_I2C3,
- .dmaPerif = RCC_AHB1Periph_DMA1,
- .dmaChannel = DMA_Channel_3,
- .dmaRxStream = DMA1_Stream2,
- .dmaRxIRQ = DMA1_Stream2_IRQn,
- .dmaRxTCFlag = DMA_FLAG_TCIF2,
- .dmaRxTEFlag = DMA_FLAG_TEIF2,
+ //COMMENTED FIRMWARE
+ // .i2cPort = I2C3,
+ // .i2cPerif = RCC_APB1Periph_I2C3,
+ // .i2cEVIRQn = I2C3_EV_IRQn,
+ // .i2cERIRQn = I2C3_ER_IRQn,
+ // .i2cClockSpeed = I2C_DEFAULT_SENSORS_CLOCK_SPEED,
+ // .gpioSCLPerif = RCC_AHB1Periph_GPIOA,
+ // .gpioSCLPort = GPIOA,
+ // .gpioSCLPin = GPIO_Pin_8,
+ // .gpioSCLPinSource = GPIO_PinSource8,
+ // .gpioSDAPerif = RCC_AHB1Periph_GPIOC,
+ // .gpioSDAPort = GPIOC,
+ // .gpioSDAPin = GPIO_Pin_9,
+ // .gpioSDAPinSource = GPIO_PinSource9,
+ // .gpioAF = GPIO_AF_I2C3,
+ // .dmaPerif = RCC_AHB1Periph_DMA1,
+ // .dmaChannel = DMA_Channel_3,
+ // .dmaRxStream = DMA1_Stream2,
+ // .dmaRxIRQ = DMA1_Stream2_IRQn,
+ // .dmaRxTCFlag = DMA_FLAG_TCIF2,
+ // .dmaRxTEFlag = DMA_FLAG_TEIF2,
};
I2cDrv sensorsBus =
@@ -153,33 +153,34 @@ I2cDrv sensorsBus =
static const I2cDef deckBusDef =
{
- .i2cPort = I2C1,
- .i2cPerif = RCC_APB1Periph_I2C1,
- .i2cEVIRQn = I2C1_EV_IRQn,
- .i2cERIRQn = I2C1_ER_IRQn,
- .i2cClockSpeed = I2C_DEFAULT_DECK_CLOCK_SPEED,
- .gpioSCLPerif = RCC_AHB1Periph_GPIOB,
- .gpioSCLPort = GPIOB,
- .gpioSCLPin = GPIO_Pin_6,
- .gpioSCLPinSource = GPIO_PinSource6,
- .gpioSDAPerif = RCC_AHB1Periph_GPIOB,
- .gpioSDAPort = GPIOB,
- .gpioSDAPin = GPIO_Pin_7,
- .gpioSDAPinSource = GPIO_PinSource7,
- .gpioAF = GPIO_AF_I2C1,
- .dmaPerif = RCC_AHB1Periph_DMA1,
- .dmaChannel = DMA_Channel_1,
-#ifdef USDDECK_USE_ALT_PINS_AND_SPI
- .dmaRxStream = DMA1_Stream5,
- .dmaRxIRQ = DMA1_Stream5_IRQn,
- .dmaRxTCFlag = DMA_FLAG_TCIF5,
- .dmaRxTEFlag = DMA_FLAG_TEIF5,
-#else
- .dmaRxStream = DMA1_Stream0,
- .dmaRxIRQ = DMA1_Stream0_IRQn,
- .dmaRxTCFlag = DMA_FLAG_TCIF0,
- .dmaRxTEFlag = DMA_FLAG_TEIF0,
-#endif
+ //COMMENTED FIRMWARE
+// .i2cPort = I2C1,
+// .i2cPerif = RCC_APB1Periph_I2C1,
+// .i2cEVIRQn = I2C1_EV_IRQn,
+// .i2cERIRQn = I2C1_ER_IRQn,
+// .i2cClockSpeed = I2C_DEFAULT_DECK_CLOCK_SPEED,
+// .gpioSCLPerif = RCC_AHB1Periph_GPIOB,
+// .gpioSCLPort = GPIOB,
+// .gpioSCLPin = GPIO_Pin_6,
+// .gpioSCLPinSource = GPIO_PinSource6,
+// .gpioSDAPerif = RCC_AHB1Periph_GPIOB,
+// .gpioSDAPort = GPIOB,
+// .gpioSDAPin = GPIO_Pin_7,
+// .gpioSDAPinSource = GPIO_PinSource7,
+// .gpioAF = GPIO_AF_I2C1,
+// .dmaPerif = RCC_AHB1Periph_DMA1,
+// .dmaChannel = DMA_Channel_1,
+// #ifdef USDDECK_USE_ALT_PINS_AND_SPI
+// .dmaRxStream = DMA1_Stream5,
+// .dmaRxIRQ = DMA1_Stream5_IRQn,
+// .dmaRxTCFlag = DMA_FLAG_TCIF5,
+// .dmaRxTEFlag = DMA_FLAG_TEIF5,
+// #else
+// .dmaRxStream = DMA1_Stream0,
+// .dmaRxIRQ = DMA1_Stream0_IRQn,
+// .dmaRxTCFlag = DMA_FLAG_TCIF0,
+// .dmaRxTEFlag = DMA_FLAG_TEIF0,
+// #endif
};
@@ -191,32 +192,35 @@ I2cDrv deckBus =
static void i2cdrvStartTransfer(I2cDrv *i2c)
{
- ASSERT_DMA_SAFE(i2c->txMessage.buffer);
-
- if (i2c->txMessage.direction == i2cRead)
- {
- i2c->DMAStruct.DMA_BufferSize = i2c->txMessage.messageLength;
- i2c->DMAStruct.DMA_Memory0BaseAddr = (uint32_t)i2c->txMessage.buffer;
- DMA_Init(i2c->def->dmaRxStream, &i2c->DMAStruct);
- DMA_Cmd(i2c->def->dmaRxStream, ENABLE);
- }
-
- I2C_ITConfig(i2c->def->i2cPort, I2C_IT_BUF, DISABLE);
- I2C_ITConfig(i2c->def->i2cPort, I2C_IT_EVT, ENABLE);
- i2c->def->i2cPort->CR1 = (I2C_CR1_START | I2C_CR1_PE);
+ //COMMENTED FIRMWARE
+ // ASSERT_DMA_SAFE(i2c->txMessage.buffer);
+
+ // if (i2c->txMessage.direction == i2cRead)
+ // {
+ // i2c->DMAStruct.DMA_BufferSize = i2c->txMessage.messageLength;
+ // i2c->DMAStruct.DMA_Memory0BaseAddr = (uint32_t)i2c->txMessage.buffer;
+ // DMA_Init(i2c->def->dmaRxStream, &i2c->DMAStruct);
+ // DMA_Cmd(i2c->def->dmaRxStream, ENABLE);
+ // }
+
+ // I2C_ITConfig(i2c->def->i2cPort, I2C_IT_BUF, DISABLE);
+ // I2C_ITConfig(i2c->def->i2cPort, I2C_IT_EVT, ENABLE);
+ // i2c->def->i2cPort->CR1 = (I2C_CR1_START | I2C_CR1_PE);
}
static void i2cTryNextMessage(I2cDrv* i2c)
{
- i2c->def->i2cPort->CR1 = (I2C_CR1_STOP | I2C_CR1_PE);
- I2C_ITConfig(i2c->def->i2cPort, I2C_IT_EVT | I2C_IT_BUF, DISABLE);
+ //COMMENTED FIRMWARE
+ // i2c->def->i2cPort->CR1 = (I2C_CR1_STOP | I2C_CR1_PE);
+ // I2C_ITConfig(i2c->def->i2cPort, I2C_IT_EVT | I2C_IT_BUF, DISABLE);
}
static void i2cNotifyClient(I2cDrv* i2c)
{
- portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
- xSemaphoreGiveFromISR(i2c->isBusFreeSemaphore, &xHigherPriorityTaskWoken);
- portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+ //COMMENTED FIRMWARE
+ // portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
+ // xSemaphoreGiveFromISR(i2c->isBusFreeSemaphore, &xHigherPriorityTaskWoken);
+ // portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
static void i2cdrvTryToRestartBus(I2cDrv* i2c)
@@ -281,76 +285,78 @@ static void i2cdrvTryToRestartBus(I2cDrv* i2c)
static void i2cdrvDmaSetupBus(I2cDrv* i2c)
{
+ //COMMENTED FIRMWARE
+ // NVIC_InitTypeDef NVIC_InitStructure;
- NVIC_InitTypeDef NVIC_InitStructure;
-
- RCC_AHB1PeriphClockCmd(i2c->def->dmaPerif, ENABLE);
-
- // RX DMA Channel Config
- i2c->DMAStruct.DMA_Channel = i2c->def->dmaChannel;
- i2c->DMAStruct.DMA_PeripheralBaseAddr = (uint32_t)&i2c->def->i2cPort->DR;
- i2c->DMAStruct.DMA_Memory0BaseAddr = 0;
- i2c->DMAStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
- i2c->DMAStruct.DMA_BufferSize = 0;
- i2c->DMAStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
- i2c->DMAStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
- i2c->DMAStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
- i2c->DMAStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
- i2c->DMAStruct.DMA_Mode = DMA_Mode_Normal;
- i2c->DMAStruct.DMA_Priority = DMA_Priority_High;
- i2c->DMAStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
- i2c->DMAStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
- i2c->DMAStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
- i2c->DMAStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
-
- NVIC_InitStructure.NVIC_IRQChannel = i2c->def->dmaRxIRQ;
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_HIGH_PRI;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
+ // RCC_AHB1PeriphClockCmd(i2c->def->dmaPerif, ENABLE);
+
+ // // RX DMA Channel Config
+ // i2c->DMAStruct.DMA_Channel = i2c->def->dmaChannel;
+ // i2c->DMAStruct.DMA_PeripheralBaseAddr = (uint32_t)&i2c->def->i2cPort->DR;
+ // i2c->DMAStruct.DMA_Memory0BaseAddr = 0;
+ // i2c->DMAStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
+ // i2c->DMAStruct.DMA_BufferSize = 0;
+ // i2c->DMAStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+ // i2c->DMAStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
+ // i2c->DMAStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
+ // i2c->DMAStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
+ // i2c->DMAStruct.DMA_Mode = DMA_Mode_Normal;
+ // i2c->DMAStruct.DMA_Priority = DMA_Priority_High;
+ // i2c->DMAStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
+ // i2c->DMAStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
+ // i2c->DMAStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
+ // i2c->DMAStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
+
+ // NVIC_InitStructure.NVIC_IRQChannel = i2c->def->dmaRxIRQ;
+ // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_HIGH_PRI;
+ // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ // NVIC_Init(&NVIC_InitStructure);
}
static void i2cdrvInitBus(I2cDrv* i2c)
{
- i2cdrvTryToRestartBus(i2c);
+ //COMMENTED FIRMWARE
+ // i2cdrvTryToRestartBus(i2c);
- i2c->isBusFreeSemaphore = xSemaphoreCreateBinaryStatic(&i2c->isBusFreeSemaphoreBuffer);
- i2c->isBusFreeMutex = xSemaphoreCreateMutexStatic(&i2c->isBusFreeMutexBuffer);
+ // i2c->isBusFreeSemaphore = xSemaphoreCreateBinaryStatic(&i2c->isBusFreeSemaphoreBuffer);
+ // i2c->isBusFreeMutex = xSemaphoreCreateMutexStatic(&i2c->isBusFreeMutexBuffer);
}
static void i2cdrvdevUnlockBus(GPIO_TypeDef* portSCL, GPIO_TypeDef* portSDA, uint16_t pinSCL, uint16_t pinSDA)
{
- GPIO_SetBits(portSDA, pinSDA);
- /* Check SDA line to determine if slave is asserting bus and clock out if so */
- while(GPIO_ReadInputDataBit(portSDA, pinSDA) == Bit_RESET)
- {
- /* Set clock high */
- GPIO_SetBits(portSCL, pinSCL);
- /* Wait for any clock stretching to finish. */
- gpioWaitForHigh(portSCL, pinSCL, 10 * 1000);
- sleepus(I2CDEV_CLK_TS);
-
- /* Generate a clock cycle */
- GPIO_ResetBits(portSCL, pinSCL);
- sleepus(I2CDEV_CLK_TS);
- GPIO_SetBits(portSCL, pinSCL);
- sleepus(I2CDEV_CLK_TS);
- }
-
- /* Generate a start then stop condition */
- GPIO_SetBits(portSCL, pinSCL);
- sleepus(I2CDEV_CLK_TS);
- GPIO_ResetBits(portSDA, pinSDA);
- sleepus(I2CDEV_CLK_TS);
- GPIO_ResetBits(portSCL, pinSCL);
- sleepus(I2CDEV_CLK_TS);
-
- /* Set data and clock high and wait for any clock stretching to finish. */
- GPIO_SetBits(portSDA, pinSDA);
- GPIO_SetBits(portSCL, pinSCL);
- gpioWaitForHigh(portSCL, pinSCL, 10 * 1000);
- /* Wait for data to be high */
- gpioWaitForHigh(portSDA, pinSDA, 10 * 1000);
+ //COMMENTED FIRMWARE
+ // GPIO_SetBits(portSDA, pinSDA);
+ // /* Check SDA line to determine if slave is asserting bus and clock out if so */
+ // while(GPIO_ReadInputDataBit(portSDA, pinSDA) == Bit_RESET)
+ // {
+ // /* Set clock high */
+ // GPIO_SetBits(portSCL, pinSCL);
+ // /* Wait for any clock stretching to finish. */
+ // gpioWaitForHigh(portSCL, pinSCL, 10 * 1000);
+ // sleepus(I2CDEV_CLK_TS);
+
+ // /* Generate a clock cycle */
+ // GPIO_ResetBits(portSCL, pinSCL);
+ // sleepus(I2CDEV_CLK_TS);
+ // GPIO_SetBits(portSCL, pinSCL);
+ // sleepus(I2CDEV_CLK_TS);
+ // }
+
+ // /* Generate a start then stop condition */
+ // GPIO_SetBits(portSCL, pinSCL);
+ // sleepus(I2CDEV_CLK_TS);
+ // GPIO_ResetBits(portSDA, pinSDA);
+ // sleepus(I2CDEV_CLK_TS);
+ // GPIO_ResetBits(portSCL, pinSCL);
+ // sleepus(I2CDEV_CLK_TS);
+
+ // /* Set data and clock high and wait for any clock stretching to finish. */
+ // GPIO_SetBits(portSDA, pinSDA);
+ // GPIO_SetBits(portSCL, pinSCL);
+ // gpioWaitForHigh(portSCL, pinSCL, 10 * 1000);
+ // /* Wait for data to be high */
+ // gpioWaitForHigh(portSDA, pinSDA, 10 * 1000);
}
//-----------------------------------------------------------
@@ -366,16 +372,17 @@ void i2cdrvCreateMessage(I2cMessage *message,
uint32_t length,
const uint8_t *buffer)
{
- ASSERT_DMA_SAFE(buffer);
-
- message->slaveAddress = slaveAddress;
- message->direction = direction;
- message->isInternal16bit = false;
- message->internalAddress = I2C_NO_INTERNAL_ADDRESS;
- message->messageLength = length;
- message->status = i2cAck;
- message->buffer = (uint8_t *)buffer;
- message->nbrOfRetries = I2C_MAX_RETRIES;
+ //COMMENTED FIRMWARE
+ // ASSERT_DMA_SAFE(buffer);
+
+ // message->slaveAddress = slaveAddress;
+ // message->direction = direction;
+ // message->isInternal16bit = false;
+ // message->internalAddress = I2C_NO_INTERNAL_ADDRESS;
+ // message->messageLength = length;
+ // message->status = i2cAck;
+ // message->buffer = (uint8_t *)buffer;
+ // message->nbrOfRetries = I2C_MAX_RETRIES;
}
void i2cdrvCreateMessageIntAddr(I2cMessage *message,
@@ -386,47 +393,48 @@ void i2cdrvCreateMessageIntAddr(I2cMessage *message,
uint32_t length,
const uint8_t *buffer)
{
- ASSERT_DMA_SAFE(buffer);
-
- message->slaveAddress = slaveAddress;
- message->direction = direction;
- message->isInternal16bit = IsInternal16;
- message->internalAddress = intAddress;
- message->messageLength = length;
- message->status = i2cAck;
- message->buffer = (uint8_t *)buffer;
- message->nbrOfRetries = I2C_MAX_RETRIES;
-}
-
-bool i2cdrvMessageTransfer(I2cDrv* i2c, I2cMessage* message)
-{
- bool status = false;
-
//COMMENTED FIRMWARE
- // xSemaphoreTake(i2c->isBusFreeMutex, portMAX_DELAY); // Protect message data
- // // Copy message
- // memcpy((char*)&i2c->txMessage, (char*)message, sizeof(I2cMessage));
- // // We can now start the ISR sending this message.
- // i2cdrvStartTransfer(i2c);
- // // Wait for transaction to be done
- // if (xSemaphoreTake(i2c->isBusFreeSemaphore, I2C_MESSAGE_TIMEOUT) == pdTRUE)
- // {
- // if (i2c->txMessage.status == i2cAck)
- // {
- // status = true;
- // }
- // }
- // else
- // {
- // i2cdrvClearDMA(i2c);
- // i2cdrvTryToRestartBus(i2c);
- // //TODO: If bus is really hanged... fail safe
- // }
- // xSemaphoreGive(i2c->isBusFreeMutex);
-
- return status;
+ // ASSERT_DMA_SAFE(buffer);
+
+ // message->slaveAddress = slaveAddress;
+ // message->direction = direction;
+ // message->isInternal16bit = IsInternal16;
+ // message->internalAddress = intAddress;
+ // message->messageLength = length;
+ // message->status = i2cAck;
+ // message->buffer = (uint8_t *)buffer;
+ // message->nbrOfRetries = I2C_MAX_RETRIES;
}
+// bool i2cdrvMessageTransfer(I2cDrv* i2c, I2cMessage* message)
+// {
+// bool status = false;
+
+// //COMMENTED FIRMWARE
+// // xSemaphoreTake(i2c->isBusFreeMutex, portMAX_DELAY); // Protect message data
+// // // Copy message
+// // memcpy((char*)&i2c->txMessage, (char*)message, sizeof(I2cMessage));
+// // // We can now start the ISR sending this message.
+// // i2cdrvStartTransfer(i2c);
+// // // Wait for transaction to be done
+// // if (xSemaphoreTake(i2c->isBusFreeSemaphore, I2C_MESSAGE_TIMEOUT) == pdTRUE)
+// // {
+// // if (i2c->txMessage.status == i2cAck)
+// // {
+// // status = true;
+// // }
+// // }
+// // else
+// // {
+// // i2cdrvClearDMA(i2c);
+// // i2cdrvTryToRestartBus(i2c);
+// // //TODO: If bus is really hanged... fail safe
+// // }
+// // xSemaphoreGive(i2c->isBusFreeMutex);
+
+// return status;
+// }
+
static void i2cdrvEventIsrHandler(I2cDrv* i2c)
{
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/i2cdev.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/i2cdev.c
index 81dd6ab1a..dfb5bddbb 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/i2cdev.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/i2cdev.c
@@ -89,7 +89,7 @@ bool i2cdevRead(I2C_Dev *dev, uint8_t devAddress, uint16_t len, uint8_t *data)
//COMMENTED FIRMWARE
//i2cdrvCreateMessage(&message, devAddress, i2cRead, len, data);
- return i2cdrvMessageTransfer(dev, &message);
+ return true;//i2cdrvMessageTransfer(dev, &message);
}
bool i2cdevReadReg8(I2C_Dev *dev, uint8_t devAddress, uint8_t memAddress,
@@ -100,19 +100,19 @@ bool i2cdevReadReg8(I2C_Dev *dev, uint8_t devAddress, uint8_t memAddress,
// i2cdrvCreateMessageIntAddr(&message, devAddress, false, memAddress,
// i2cRead, len, data);
- return i2cdrvMessageTransfer(dev, &message);
+ return true;//i2cdrvMessageTransfer(dev, &message);
}
bool i2cdevReadReg16(I2C_Dev *dev, uint8_t devAddress, uint16_t memAddress,
uint16_t len, uint8_t *data)
{
//COMMENTED FIRMWARE
- // I2cMessage message;
+ I2cMessage message;
// i2cdrvCreateMessageIntAddr(&message, devAddress, true, memAddress,
// i2cRead, len, data);
- return i2cdrvMessageTransfer(dev, &message);
+ return true;//i2cdrvMessageTransfer(dev, &message);
}
bool i2cdevWriteByte(I2C_Dev *dev, uint8_t devAddress, uint8_t memAddress,
@@ -158,7 +158,7 @@ bool i2cdevWrite(I2C_Dev *dev, uint8_t devAddress, uint16_t len, const uint8_t *
//COMMENTED FIRMWARE
//i2cdrvCreateMessage(&message, devAddress, i2cWrite, len, data);
- return i2cdrvMessageTransfer(dev, &message);
+ return true;//i2cdrvMessageTransfer(dev, &message);
}
bool i2cdevWriteReg8(I2C_Dev *dev, uint8_t devAddress, uint8_t memAddress,
@@ -170,7 +170,7 @@ bool i2cdevWriteReg8(I2C_Dev *dev, uint8_t devAddress, uint8_t memAddress,
// i2cdrvCreateMessageIntAddr(&message, devAddress, false, memAddress,
// i2cWrite, len, data);
- return i2cdrvMessageTransfer(dev, &message);
+ return true;//i2cdrvMessageTransfer(dev, &message);
}
bool i2cdevWriteReg16(I2C_Dev *dev, uint8_t devAddress, uint16_t memAddress,
@@ -182,5 +182,5 @@ bool i2cdevWriteReg16(I2C_Dev *dev, uint8_t devAddress, uint16_t memAddress,
// i2cdrvCreateMessageIntAddr(&message, devAddress, true, memAddress,
// i2cWrite, len, data);
- return i2cdrvMessageTransfer(dev, &message);
+ return true;//i2cdrvMessageTransfer(dev, &message);
}
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart1.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart1.c
index dabca42bb..1f0460072 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart1.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart1.c
@@ -48,8 +48,9 @@
*/
//#define ENABLE_UART1_DMA
-static xQueueHandle uart1queue;
-STATIC_MEM_QUEUE_ALLOC(uart1queue, 64, sizeof(uint8_t));
+//COMMENTED FIRMWARE
+//static xQueueHandle uart1queue;
+//STATIC_MEM_QUEUE_ALLOC(uart1queue, 64, sizeof(uint8_t));
static bool isInit = false;
static bool hasOverrun = false;
@@ -190,12 +191,13 @@ bool uart1Test(void)
bool uart1GetDataWithTimeout(uint8_t *c, const uint32_t timeoutTicks)
{
- if (xQueueReceive(uart1queue, c, timeoutTicks) == pdTRUE)
- {
- return true;
- }
+ //COMMENTED FIRMWARE
+ // if (xQueueReceive(uart1queue, c, timeoutTicks) == pdTRUE)
+ // {
+ // return true;
+ // }
- *c = 0;
+ // *c = 0;
return false;
}
@@ -257,7 +259,8 @@ int uart1Putchar(int ch)
void uart1Getchar(char * ch)
{
- xQueueReceive(uart1queue, ch, portMAX_DELAY);
+ //COMMENTED FIRMWARE
+ //xQueueReceive(uart1queue, ch, portMAX_DELAY);
}
bool uart1DidOverrun()
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart2.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart2.c
index 3eca14c49..7ae49ee2f 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart2.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart2.c
@@ -52,7 +52,7 @@ static StaticSemaphore_t waitUntilSendDoneBuffer;
static bool isInit = false;
-static DMA_InitTypeDef DMA_InitStructureShare;
+//static DMA_InitTypeDef DMA_InitStructureShare;
static uint8_t dmaBuffer[128];
static bool isUartDmaInitialized;
static uint32_t initialDMACount;
@@ -70,8 +70,9 @@ static void uart2HandleDataFromISR(uint8_t c, BaseType_t * const pxHigherPriorit
#else
-static xQueueHandle uart2queue;
-STATIC_MEM_QUEUE_ALLOC(uart2queue, 64, sizeof(uint8_t));
+//COMMENTED FIRMWARE
+// static xQueueHandle uart2queue;
+// STATIC_MEM_QUEUE_ALLOC(uart2queue, 64, sizeof(uint8_t));
static bool hasOverrun = false;
@@ -337,12 +338,13 @@ void uart2HandleDataFromISR(uint8_t c, BaseType_t * const pxHigherPriorityTaskWo
bool uart2GetDataWithTimeout(uint8_t *c, const uint32_t timeoutTicks)
{
- if (xQueueReceive(uart2queue, c, timeoutTicks) == pdTRUE)
- {
- return true;
- }
+ //COMMENTED FIRMWARE
+ // if (xQueueReceive(uart2queue, c, timeoutTicks) == pdTRUE)
+ // {
+ // return true;
+ // }
- *c = 0;
+ // *c = 0;
return false;
}
@@ -353,7 +355,8 @@ bool uart2GetDataWithDefaultTimeout(uint8_t *c)
void uart2Getchar(char * ch)
{
- xQueueReceive(uart2queue, ch, portMAX_DELAY);
+ //COMMENTED FIRMWARE
+ //xQueueReceive(uart2queue, ch, portMAX_DELAY);
}
bool uart2DidOverrun()
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart_syslink.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart_syslink.c
index c960da880..f7f4a36e9 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart_syslink.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/uart_syslink.c
@@ -63,7 +63,7 @@ static uint8_t *outDataIsr;
static uint8_t dataIndexIsr;
static uint8_t dataSizeIsr;
static bool isUartDmaInitialized;
-static DMA_InitTypeDef DMA_InitStructureShare;
+//static DMA_InitTypeDef DMA_InitStructureShare;
static uint32_t initialDMACount;
static uint32_t remainingDMACount;
static bool dmaIsPaused;
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/vl53l0x.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/vl53l0x.c
index 49b006c39..a7c236c5f 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/vl53l0x.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/vl53l0x.c
@@ -120,7 +120,7 @@ bool vl53l0xInit(VL53L0xDev* dev, I2C_Dev *I2Cx, bool io_2V8)
// }
// /* Move initialized sensor to a new I2C address */
- // int newAddress;
+ int newAddress;
// taskENTER_CRITICAL();
// newAddress = nextI2CAddress++;
@@ -429,7 +429,7 @@ bool vl53l0xSetSignalRateLimit(VL53L0xDev* dev, float limit_Mcps)
// if (limit_Mcps < 0 || limit_Mcps > 511.99f) { return false; }
// // Q9.7 fixed point format (9 integer bits, 7 fractional bits)
- // uint16_t fixed_pt = limit_Mcps * (1 << 7);
+ uint16_t fixed_pt = limit_Mcps * (1 << 7);
return vl53l0xWriteReg16Bit(dev, VL53L0X_RA_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT, fixed_pt);
}
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/ws2812_cf2.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/ws2812_cf2.c
index c3f217631..e0f28a0c6 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/ws2812_cf2.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/drivers/src/ws2812_cf2.c
@@ -37,11 +37,11 @@
//#define TIM1_CCR1_Address 0x40012C34 // physical memory address of Timer 3 CCR1 register
-static TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
-static TIM_OCInitTypeDef TIM_OCInitStructure;
-static GPIO_InitTypeDef GPIO_InitStructure;
-static DMA_InitTypeDef DMA_InitStructure;
-static NVIC_InitTypeDef NVIC_InitStructure;
+// static TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
+// static TIM_OCInitTypeDef TIM_OCInitStructure;
+// static GPIO_InitTypeDef GPIO_InitStructure;
+// static DMA_InitTypeDef DMA_InitStructure;
+// static NVIC_InitTypeDef NVIC_InitStructure;
static xSemaphoreHandle allLedDone = NULL;
@@ -176,9 +176,7 @@ static uint8_t (*color_led)[3] = NULL;
void ws2812Send(uint8_t (*color)[3], uint16_t len)
{
//COMMENTED FIRMWARE
- // int i;
- // if(len<1) return;
-
+ // int i;#include <stm32f4xx_gpio.h>
// //Wait for previous transfer to be finished
// xSemaphoreTake(allLedDone, portMAX_DELAY);
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usb_bsp.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usb_bsp.c
index 3bc037b0e..3d8964a74 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usb_bsp.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usb_bsp.c
@@ -100,149 +100,150 @@
void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev)
{
-#ifdef USE_STM3210C_EVAL
-
- RCC_OTGFSCLKConfig(RCC_OTGFSCLKSource_PLLVCO_Div3);
- RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE) ;
-
-#else // USE_STM322xG_EVAL
- GPIO_InitTypeDef GPIO_InitStructure;
- #ifdef USE_USB_OTG_FS
- RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA , ENABLE);
-
- /* Configure SOF ID DM DP Pins */
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 |
- GPIO_Pin_12;
-
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
- GPIO_Init(GPIOA, &GPIO_InitStructure);
-
- // AF10
-
- GPIO_PinAFConfig(GPIOA,GPIO_PinSource11,GPIO_AF_OTG1_FS) ;
- GPIO_PinAFConfig(GPIOA,GPIO_PinSource12,GPIO_AF_OTG1_FS) ;
-
- /* Configure VBUS Pin */
- /*GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
- GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
- GPIO_Init(GPIOA, &GPIO_InitStructure); */
-
- /* Configure ID pin */
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
- GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_Init(GPIOA, &GPIO_InitStructure);
- GPIO_PinAFConfig(GPIOA,GPIO_PinSource10,GPIO_AF_OTG1_FS) ;
-
- RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
- RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE) ;
- #else // USE_USB_OTG_HS
-
- #ifdef USE_ULPI_PHY // ULPI
- RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
- RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOH |
- RCC_AHB1Periph_GPIOI, ENABLE);
-
-
- GPIO_PinAFConfig(GPIOA,GPIO_PinSource3, GPIO_AF_OTG2_HS) ; // D0
- GPIO_PinAFConfig(GPIOA,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // CLK
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // D1
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource1, GPIO_AF_OTG2_HS) ; // D2
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // D7
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource10,GPIO_AF_OTG2_HS) ; // D3
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // D4
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource12,GPIO_AF_OTG2_HS) ; // D5
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_OTG2_HS) ; // D6
- GPIO_PinAFConfig(GPIOH,GPIO_PinSource4, GPIO_AF_OTG2_HS) ; // NXT
- GPIO_PinAFConfig(GPIOI,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // DIR
- GPIO_PinAFConfig(GPIOC,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // STP
-
- // CLK
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 ;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_Init(GPIOA, &GPIO_InitStructure);
-
- // D0
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 ;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
- GPIO_Init(GPIOA, &GPIO_InitStructure);
-
-
-
- // D1 D2 D3 D4 D5 D6 D7
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 |
- GPIO_Pin_5 | GPIO_Pin_10 |
- GPIO_Pin_11| GPIO_Pin_12 |
- GPIO_Pin_13 ;
-
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
- GPIO_Init(GPIOB, &GPIO_InitStructure);
-
-
- // STP
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 ;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_Init(GPIOC, &GPIO_InitStructure);
-
- //NXT
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_Init(GPIOH, &GPIO_InitStructure);
-
-
- //DIR
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 ;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_Init(GPIOI, &GPIO_InitStructure);
-
-
- RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS |
- RCC_AHB1Periph_OTG_HS_ULPI, ENABLE) ;
-
- #else
-
- RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB , ENABLE);
-
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 |
- GPIO_Pin_14 |
- GPIO_Pin_15;
-
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_Init(GPIOB, &GPIO_InitStructure);
-
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource12, GPIO_AF_OTG2_FS) ;
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_OTG2_FS) ;
- GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_OTG2_FS) ;
-
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
- GPIO_Init(GPIOB, &GPIO_InitStructure);
+ //COMMENTED FIRMWARE
+// #ifdef USE_STM3210C_EVAL
+
+// RCC_OTGFSCLKConfig(RCC_OTGFSCLKSource_PLLVCO_Div3);
+// RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE) ;
+
+// #else // USE_STM322xG_EVAL
+// GPIO_InitTypeDef GPIO_InitStructure;
+// #ifdef USE_USB_OTG_FS
+// RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA , ENABLE);
+
+// /* Configure SOF ID DM DP Pins */
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 |
+// GPIO_Pin_12;
+
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+// GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+// // AF10
+
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource11,GPIO_AF_OTG1_FS) ;
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource12,GPIO_AF_OTG1_FS) ;
+
+// /* Configure VBUS Pin */
+// /*GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+// GPIO_Init(GPIOA, &GPIO_InitStructure); */
+
+// /* Configure ID pin */
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_Init(GPIOA, &GPIO_InitStructure);
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource10,GPIO_AF_OTG1_FS) ;
+
+// RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
+// RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE) ;
+// #else // USE_USB_OTG_HS
+
+// #ifdef USE_ULPI_PHY // ULPI
+// RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
+// RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOH |
+// RCC_AHB1Periph_GPIOI, ENABLE);
+
+
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource3, GPIO_AF_OTG2_HS) ; // D0
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // CLK
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // D1
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource1, GPIO_AF_OTG2_HS) ; // D2
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // D7
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource10,GPIO_AF_OTG2_HS) ; // D3
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // D4
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource12,GPIO_AF_OTG2_HS) ; // D5
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_OTG2_HS) ; // D6
+// GPIO_PinAFConfig(GPIOH,GPIO_PinSource4, GPIO_AF_OTG2_HS) ; // NXT
+// GPIO_PinAFConfig(GPIOI,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // DIR
+// GPIO_PinAFConfig(GPIOC,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // STP
+
+// // CLK
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+// // D0
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+// GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+
+
+// // D1 D2 D3 D4 D5 D6 D7
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 |
+// GPIO_Pin_5 | GPIO_Pin_10 |
+// GPIO_Pin_11| GPIO_Pin_12 |
+// GPIO_Pin_13 ;
+
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+// GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+
+// // STP
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+// //NXT
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOH, &GPIO_InitStructure);
+
+
+// //DIR
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOI, &GPIO_InitStructure);
+
+
+// RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS |
+// RCC_AHB1Periph_OTG_HS_ULPI, ENABLE) ;
+
+// #else
+
+// RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB , ENABLE);
+
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 |
+// GPIO_Pin_14 |
+// GPIO_Pin_15;
+
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource12, GPIO_AF_OTG2_FS) ;
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_OTG2_FS) ;
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_OTG2_FS) ;
+
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
+// GPIO_Init(GPIOB, &GPIO_InitStructure);
- RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS, ENABLE) ;
+// RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS, ENABLE) ;
- #endif
- #endif //USB_OTG_HS
-#endif //USE_STM322xG_EVAL
+// #endif
+// #endif //USB_OTG_HS
+// #endif //USE_STM322xG_EVAL
}
/**
* @brief USB_OTG_BSP_EnableInterrupt
@@ -252,33 +253,34 @@ void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev)
*/
void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev)
{
- NVIC_InitTypeDef NVIC_InitStructure;
-
- NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
-#ifdef USE_USB_OTG_HS
- NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_IRQn;
-#else
- NVIC_InitStructure.NVIC_IRQChannel = OTG_FS_IRQn;
-#endif
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_MID_PRI;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
- NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
- NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_EP1_OUT_IRQn;
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_MID_PRI;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-
- NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
- NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_EP1_IN_IRQn;
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_MID_PRI;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-#endif
+ //COMMENTED FIRMWARE
+// NVIC_InitTypeDef NVIC_InitStructure;
+
+// NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
+// #ifdef USE_USB_OTG_HS
+// NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_IRQn;
+// #else
+// NVIC_InitStructure.NVIC_IRQChannel = OTG_FS_IRQn;
+// #endif
+// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_MID_PRI;
+// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+// NVIC_Init(&NVIC_InitStructure);
+// #ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
+// NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
+// NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_EP1_OUT_IRQn;
+// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_MID_PRI;
+// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+// NVIC_Init(&NVIC_InitStructure);
+
+// NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
+// NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_EP1_IN_IRQn;
+// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_MID_PRI;
+// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+// NVIC_Init(&NVIC_InitStructure);
+// #endif
}
/**
* @brief USB_OTG_BSP_uDelay
@@ -288,16 +290,17 @@ void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev)
*/
void USB_OTG_BSP_uDelay (const uint32_t usec)
{
- uint32_t count = 0;
- const uint32_t utime = (120 * usec / 7);
- do
- {
- if ( ++count > utime )
- {
- return ;
- }
- }
- while (1);
+ //COMMENTED FIRMWARE
+ // uint32_t count = 0;
+ // const uint32_t utime = (120 * usec / 7);
+ // do
+ // {
+ // if ( ++count > utime )
+ // {
+ // return ;
+ // }
+ // }
+ // while (1);
}
@@ -309,7 +312,8 @@ void USB_OTG_BSP_uDelay (const uint32_t usec)
*/
void USB_OTG_BSP_mDelay (const uint32_t msec)
{
- USB_OTG_BSP_uDelay(msec * 1000);
+ //COMMENTED FIRMWARE
+ //USB_OTG_BSP_uDelay(msec * 1000);
}
/**
* @}
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usbd_desc.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usbd_desc.c
index 105df0872..42e681c5d 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usbd_desc.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usbd_desc.c
@@ -257,19 +257,20 @@ static const char bin2hex[] = {'0', '1', '2', '3', '4', '5', '6', '7',
*/
uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length)
{
- char serial_nr[25];
- char *chip_id = (char*)MCU_ID_ADDRESS;
- int i;
+ //COMMENTED FIRMWARE
+ // char serial_nr[25];
+ // char *chip_id = (char*)MCU_ID_ADDRESS;
+ // int i;
- serial_nr[24] = 0;
+ // serial_nr[24] = 0;
- for (i=0; i<12; i++)
- {
- serial_nr[0+(i*2)] = bin2hex[(chip_id[i]>>4)&0x0F];
- serial_nr[1+(i*2)] = bin2hex[chip_id[i]&0x0F];
- }
+ // for (i=0; i<12; i++)
+ // {
+ // serial_nr[0+(i*2)] = bin2hex[(chip_id[i]>>4)&0x0F];
+ // serial_nr[1+(i*2)] = bin2hex[chip_id[i]&0x0F];
+ // }
- USBD_GetString ((uint8_t *)serial_nr, USBD_StrDesc, length);
+ // USBD_GetString ((uint8_t *)serial_nr, USBD_StrDesc, length);
return USBD_StrDesc;
}
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usec_time.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usec_time.c
index 736434172..433654616 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usec_time.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/hal/src/usec_time.c
@@ -93,7 +93,8 @@ uint64_t usecTimestamp(void)
void __attribute__((used)) TIM7_IRQHandler(void)
{
- TIM_ClearITPendingBit(TIM7, TIM_IT_Update);
+ //COMMENTED FIRMWARE
+ // TIM_ClearITPendingBit(TIM7, TIM_IT_Update);
- __sync_fetch_and_add(&usecTimerHighCount, 1);
+ // __sync_fetch_and_add(&usecTimerHighCount, 1);
}
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/Core/CM3/core_cm3.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/Core/CM3/core_cm3.h
new file mode 100644
index 000000000..172526d5e
--- /dev/null
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/Core/CM3/core_cm3.h
@@ -0,0 +1,1763 @@
+/**************************************************************************//**
+ * @file core_cm3.h
+ * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM3_H_GENERIC
+#define __CORE_CM3_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+ \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
+ CMSIS violates the following MISRA-C:2004 rules:
+
+ \li Required Rule 8.5, object/function definition in header file.<br>
+ Function definitions in header files are used to allow 'inlining'.
+
+ \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+ Unions are used for effective representation of core registers.
+
+ \li Advisory Rule 19.7, Function-like macro defined.<br>
+ Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ * CMSIS definitions
+ ******************************************************************************/
+/**
+ \ingroup Cortex_M3
+ @{
+ */
+
+/* CMSIS CM3 definitions */
+#define __CM3_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
+#define __CM3_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
+#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \
+ __CM3_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
+
+#define __CORTEX_M (0x03U) /*!< Cortex-M Core */
+
+
+#if defined ( __CC_ARM )
+ #define __ASM __asm /*!< asm keyword for ARM Compiler */
+ #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+ #define __STATIC_INLINE static __inline
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #define __ASM __asm /*!< asm keyword for ARM Compiler */
+ #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+ #define __STATIC_INLINE static __inline
+
+#elif defined ( __GNUC__ )
+ #define __ASM __asm /*!< asm keyword for GNU Compiler */
+ #define __INLINE inline /*!< inline keyword for GNU Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __ICCARM__ )
+ #define __ASM __asm /*!< asm keyword for IAR Compiler */
+ #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __TMS470__ )
+ #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __TASKING__ )
+ #define __ASM __asm /*!< asm keyword for TASKING Compiler */
+ #define __INLINE inline /*!< inline keyword for TASKING Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __CSMC__ )
+ #define __packed
+ #define __ASM _asm /*!< asm keyword for COSMIC Compiler */
+ #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
+ #define __STATIC_INLINE static inline
+
+#else
+ #error Unknown compiler
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not.
+ This core does not support an FPU at all
+*/
+#define __FPU_USED 0U
+
+#if defined ( __CC_ARM )
+ #if defined __TARGET_FPU_VFP
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #endif
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #if defined __ARM_PCS_VFP
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #endif
+
+#elif defined ( __GNUC__ )
+ #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #endif
+
+#elif defined ( __ICCARM__ )
+ #if defined __ARMVFP__
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #endif
+
+#elif defined ( __TMS470__ )
+ #if defined __TI_VFP_SUPPORT__
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #endif
+
+#elif defined ( __TASKING__ )
+ #if defined __FPU_VFP__
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #endif
+
+#elif defined ( __CSMC__ )
+ #if ( __CSMC__ & 0x400U)
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #endif
+
+#endif
+
+#include "core_cmInstr.h" /* Core Instruction Access */
+#include "core_cmFunc.h" /* Core Function Access */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM3_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM3_H_DEPENDANT
+#define __CORE_CM3_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+ #ifndef __CM3_REV
+ #define __CM3_REV 0x0200U
+ #warning "__CM3_REV not defined in device header file; using default!"
+ #endif
+
+ #ifndef __MPU_PRESENT
+ #define __MPU_PRESENT 0U
+ #warning "__MPU_PRESENT not defined in device header file; using default!"
+ #endif
+
+ #ifndef __NVIC_PRIO_BITS
+ #define __NVIC_PRIO_BITS 4U
+ #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+ #endif
+
+ #ifndef __Vendor_SysTickConfig
+ #define __Vendor_SysTickConfig 0U
+ #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+ #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+ \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+ <strong>IO Type Qualifiers</strong> are used
+ \li to specify the access to peripheral variables.
+ \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+ #define __I volatile /*!< Defines 'read only' permissions */
+#else
+ #define __I volatile const /*!< Defines 'read only' permissions */
+#endif
+#define __O volatile /*!< Defines 'write only' permissions */
+#define __IO volatile /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define __IM volatile const /*! Defines 'read only' structure member permissions */
+#define __OM volatile /*! Defines 'write only' structure member permissions */
+#define __IOM volatile /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M3 */
+
+
+
+/*******************************************************************************
+ * Register Abstraction
+ Core Register contain:
+ - Core Register
+ - Core NVIC Register
+ - Core SCB Register
+ - Core SysTick Register
+ - Core Debug Register
+ - Core MPU Register
+ ******************************************************************************/
+/**
+ \defgroup CMSIS_core_register Defines and Type Definitions
+ \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_CORE Status and Control Registers
+ \brief Core Register type definitions.
+ @{
+ */
+
+/**
+ \brief Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
+ uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
+ uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
+ uint32_t C:1; /*!< bit: 29 Carry condition code flag */
+ uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
+ uint32_t N:1; /*!< bit: 31 Negative condition code flag */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos 31U /*!< APSR: N Position */
+#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
+
+#define APSR_Z_Pos 30U /*!< APSR: Z Position */
+#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
+
+#define APSR_C_Pos 29U /*!< APSR: C Position */
+#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
+
+#define APSR_V_Pos 28U /*!< APSR: V Position */
+#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
+
+#define APSR_Q_Pos 27U /*!< APSR: Q Position */
+#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
+
+
+/**
+ \brief Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
+ uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
+
+
+/**
+ \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
+ uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
+ uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
+ uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
+ uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
+ uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
+ uint32_t C:1; /*!< bit: 29 Carry condition code flag */
+ uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
+ uint32_t N:1; /*!< bit: 31 Negative condition code flag */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos 31U /*!< xPSR: N Position */
+#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
+#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos 29U /*!< xPSR: C Position */
+#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos 28U /*!< xPSR: V Position */
+#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
+#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */
+#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos 24U /*!< xPSR: T Position */
+#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
+
+
+/**
+ \brief Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
+ uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
+ uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
+ \brief Type definitions for the NVIC Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+ __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
+ uint32_t RESERVED0[24U];
+ __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
+ uint32_t RSERVED1[24U];
+ __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
+ uint32_t RESERVED2[24U];
+ __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
+ uint32_t RESERVED3[24U];
+ __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
+ uint32_t RESERVED4[56U];
+ __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
+ uint32_t RESERVED5[644U];
+ __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
+} NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SCB System Control Block (SCB)
+ \brief Type definitions for the System Control Block Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+ __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
+ __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
+ __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
+ __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
+ __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
+ __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
+ __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
+ __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
+ __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
+ __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
+ __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
+ __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
+ __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
+ __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
+ __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
+ __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
+ __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
+ __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
+ __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
+ uint32_t RESERVED0[5U];
+ __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#if (__CM3_REV < 0x0201U) /* core r2p1 */
+#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */
+#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */
+
+#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
+#else
+#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+ \brief Type definitions for the System Control and ID Register not in the SCB
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+ uint32_t RESERVED0[1U];
+ __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
+#if ((defined __CM3_REV) && (__CM3_REV >= 0x200U))
+ __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
+#else
+ uint32_t RESERVED1[1U];
+#endif
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SysTick System Tick Timer (SysTick)
+ \brief Type definitions for the System Timer Registers.
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+ __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
+ __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
+ __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
+ __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
+ \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+ __OM union
+ {
+ __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
+ __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
+ __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
+ } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
+ uint32_t RESERVED0[864U];
+ __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
+ uint32_t RESERVED1[15U];
+ __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
+ uint32_t RESERVED2[15U];
+ __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
+ uint32_t RESERVED3[29U];
+ __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
+ __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
+ __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
+ uint32_t RESERVED4[43U];
+ __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
+ __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
+ uint32_t RESERVED5[6U];
+ __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
+ __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
+ __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
+ __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
+ __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
+ __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
+ __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
+ __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
+ __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
+ __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
+ __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
+ __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
+ \brief Type definitions for the Data Watchpoint and Trace (DWT)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+ __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
+ __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
+ __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
+ __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
+ __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
+ __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
+ __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
+ __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
+ __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
+ __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
+ __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
+ uint32_t RESERVED0[1U];
+ __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
+ __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
+ __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
+ uint32_t RESERVED1[1U];
+ __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
+ __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
+ __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
+ uint32_t RESERVED2[1U];
+ __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
+ __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
+ __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_TPI Trace Port Interface (TPI)
+ \brief Type definitions for the Trace Port Interface (TPI)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+ __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
+ __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
+ uint32_t RESERVED0[2U];
+ __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
+ uint32_t RESERVED1[55U];
+ __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
+ uint32_t RESERVED2[131U];
+ __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
+ __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
+ __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
+ uint32_t RESERVED3[759U];
+ __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
+ __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
+ __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
+ uint32_t RESERVED4[1U];
+ __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
+ __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
+ __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
+ uint32_t RESERVED5[39U];
+ __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
+ __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
+ uint32_t RESERVED7[8U];
+ __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
+ __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
+
+#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if (__MPU_PRESENT == 1U)
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_MPU Memory Protection Unit (MPU)
+ \brief Type definitions for the Memory Protection Unit (MPU)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+ __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
+ __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
+ __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
+ __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
+ __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
+ __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
+ __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
+ __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
+ \brief Type definitions for the Core Debug Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+ __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
+ __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
+ __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
+ __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_core_bitfield Core register bit field macros
+ \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+ @{
+ */
+
+/**
+ \brief Mask and shift a bit field value for use in a register bit range.
+ \param[in] field Name of the register bit field.
+ \param[in] value Value of the bit field.
+ \return Masked and shifted value.
+*/
+#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
+
+/**
+ \brief Mask and shift a register value to extract a bit filed value.
+ \param[in] field Name of the register bit field.
+ \param[in] value Value of register.
+ \return Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_core_base Core Definitions
+ \brief Definitions for base addresses, unions, and structures.
+ @{
+ */
+
+/* Memory mapping of Cortex-M3 Hardware */
+#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
+#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
+#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
+#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
+#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
+#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
+#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
+#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
+
+#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
+#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
+#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
+#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
+#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
+#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
+#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
+#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
+
+#if (__MPU_PRESENT == 1U)
+ #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
+ #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ * Hardware Abstraction Layer
+ Core Function Interface contains:
+ - Core NVIC Functions
+ - Core SysTick Functions
+ - Core Debug Functions
+ - Core Register Access Functions
+ ******************************************************************************/
+/**
+ \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ########################## NVIC functions #################################### */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+ \brief Functions that manage interrupts and exceptions via the NVIC.
+ @{
+ */
+
+/**
+ \brief Set Priority Grouping
+ \details Sets the priority grouping field using the required unlock sequence.
+ The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+ Only values from 0..7 are used.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Priority grouping field.
+ */
+__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ uint32_t reg_value;
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+
+ reg_value = SCB->AIRCR; /* read old register configuration */
+ reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+ reg_value = (reg_value |
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
+ SCB->AIRCR = reg_value;
+}
+
+
+/**
+ \brief Get Priority Grouping
+ \details Reads the priority grouping field from the NVIC Interrupt Controller.
+ \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+{
+ return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+ \brief Enable External Interrupt
+ \details Enables a device-specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Disable External Interrupt
+ \details Disables a device-specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+ NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Get Pending Interrupt
+ \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
+ \param [in] IRQn Interrupt number.
+ \return 0 Interrupt status is not pending.
+ \return 1 Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+ return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+}
+
+
+/**
+ \brief Set Pending Interrupt
+ \details Sets the pending bit of an external interrupt.
+ \param [in] IRQn Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+ NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Clear Pending Interrupt
+ \details Clears the pending bit of an external interrupt.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+ NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Get Active Interrupt
+ \details Reads the active register in NVIC and returns the active bit.
+ \param [in] IRQn Interrupt number.
+ \return 0 Interrupt status is not active.
+ \return 1 Interrupt status is active.
+ */
+__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+{
+ return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+}
+
+
+/**
+ \brief Set Interrupt Priority
+ \details Sets the priority of an interrupt.
+ \note The priority cannot be set for every core interrupt.
+ \param [in] IRQn Interrupt number.
+ \param [in] priority Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ if ((int32_t)(IRQn) < 0)
+ {
+ SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+ else
+ {
+ NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+}
+
+
+/**
+ \brief Get Interrupt Priority
+ \details Reads the priority of an interrupt.
+ The interrupt number can be positive to specify an external (device specific) interrupt,
+ or negative to specify an internal (core) interrupt.
+ \param [in] IRQn Interrupt number.
+ \return Interrupt Priority.
+ Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+ if ((int32_t)(IRQn) < 0)
+ {
+ return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+ }
+ else
+ {
+ return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
+ }
+}
+
+
+/**
+ \brief Encode Priority
+ \details Encodes the priority for an interrupt with the given priority group,
+ preemptive priority value, and subpriority value.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Used priority group.
+ \param [in] PreemptPriority Preemptive priority value (starting from 0).
+ \param [in] SubPriority Subpriority value (starting from 0).
+ \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+ return (
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
+ );
+}
+
+
+/**
+ \brief Decode Priority
+ \details Decodes an interrupt priority value with a given priority group to
+ preemptive priority value and subpriority value.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+ \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+ \param [in] PriorityGroup Used priority group.
+ \param [out] pPreemptPriority Preemptive priority value (starting from 0).
+ \param [out] pSubPriority Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+ *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+ *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
+}
+
+
+/**
+ \brief System Reset
+ \details Initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+ __DSB(); /* Ensure all outstanding memory accesses included
+ buffered write are completed before reset */
+ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+ SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
+ __DSB(); /* Ensure completion of memory access */
+
+ for(;;) /* wait until reset */
+ {
+ __NOP();
+ }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ################################## SysTick function ############################################ */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+ \brief Functions that configure the System.
+ @{
+ */
+
+#if (__Vendor_SysTickConfig == 0U)
+
+/**
+ \brief System Tick Configuration
+ \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+ Counter is in free running mode to generate periodic interrupts.
+ \param [in] ticks Number of ticks between two interrupts.
+ \return 0 Function succeeded.
+ \return 1 Function failed.
+ \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+ function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+ must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+ if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+ {
+ return (1UL); /* Reload value impossible */
+ }
+
+ SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
+ NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
+ SysTick_CTRL_TICKINT_Msk |
+ SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ return (0UL); /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_core_DebugFunctions ITM Functions
+ \brief Functions that access the ITM debug interface.
+ @{
+ */
+
+extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
+#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+ \brief ITM Send Character
+ \details Transmits a character via the ITM channel 0, and
+ \li Just returns when no debugger is connected that has booked the output.
+ \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+ \param [in] ch Character to transmit.
+ \returns Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+ if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
+ ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
+ {
+ while (ITM->PORT[0U].u32 == 0UL)
+ {
+ __NOP();
+ }
+ ITM->PORT[0U].u8 = (uint8_t)ch;
+ }
+ return (ch);
+}
+
+
+/**
+ \brief ITM Receive Character
+ \details Inputs a character via the external variable \ref ITM_RxBuffer.
+ \return Received character.
+ \return -1 No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+ int32_t ch = -1; /* no character available */
+
+ if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+ {
+ ch = ITM_RxBuffer;
+ ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
+ }
+
+ return (ch);
+}
+
+
+/**
+ \brief ITM Check Character
+ \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+ \return 0 No character available.
+ \return 1 Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+ if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+ {
+ return (0); /* no character available */
+ }
+ else
+ {
+ return (1); /* character available */
+ }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM3_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
\ No newline at end of file
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/Core/CM3/stm32f10x.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/Core/CM3/stm32f10x.h
index 127e3a35b..9596452dc 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/Core/CM3/stm32f10x.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/Core/CM3/stm32f10x.h
@@ -342,7 +342,8 @@ typedef __I uint16_t vuc16; /*!< Read Only */
typedef __I uint8_t vuc8; /*!< Read Only */
#ifndef __cplusplus
-typedef enum {FALSE = 0, TRUE = !FALSE} bool;
+//COMMENTED FIRMWARE
+//typedef enum {FALSE = 0, TRUE = !FALSE} bool;
#endif
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/cmsis_gcc.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/cmsis_gcc.h
new file mode 100644
index 000000000..aa7c94fd5
--- /dev/null
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/cmsis_gcc.h
@@ -0,0 +1,1373 @@
+/**************************************************************************//**
+ * @file cmsis_gcc.h
+ * @brief CMSIS Cortex-M Core Function/Instruction Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#ifndef __CMSIS_GCC_H
+#define __CMSIS_GCC_H
+
+/* ignore some GCC warnings */
+#if defined ( __GNUC__ )
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
+
+/* ########################### Core Function Access ########################### */
+/** \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+ @{
+ */
+
+/**
+ \brief Enable IRQ Interrupts
+ \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
+{
+ __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/**
+ \brief Disable IRQ Interrupts
+ \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
+{
+ __ASM volatile ("cpsid i" : : : "memory");
+}
+
+
+/**
+ \brief Get Control Register
+ \details Returns the content of the Control Register.
+ \return Control Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, control" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Control Register
+ \details Writes the given value to the Control Register.
+ \param [in] control Control Register value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+ __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+/**
+ \brief Get IPSR Register
+ \details Returns the content of the IPSR Register.
+ \return IPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Get APSR Register
+ \details Returns the content of the APSR Register.
+ \return APSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Get xPSR Register
+ \details Returns the content of the xPSR Register.
+
+ \return xPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Get Process Stack Pointer
+ \details Returns the current value of the Process Stack Pointer (PSP).
+ \return PSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Process Stack Pointer
+ \details Assigns the given value to the Process Stack Pointer (PSP).
+ \param [in] topOfProcStack Process Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+ __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
+}
+
+
+/**
+ \brief Get Main Stack Pointer
+ \details Returns the current value of the Main Stack Pointer (MSP).
+ \return MSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Main Stack Pointer
+ \details Assigns the given value to the Main Stack Pointer (MSP).
+
+ \param [in] topOfMainStack Main Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+ __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
+}
+
+
+/**
+ \brief Get Priority Mask
+ \details Returns the current state of the priority mask bit from the Priority Mask Register.
+ \return Priority Mask value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, primask" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Priority Mask
+ \details Assigns the given value to the Priority Mask Register.
+ \param [in] priMask Priority Mask
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+ __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (__CORTEX_M >= 0x03U)
+
+/**
+ \brief Enable FIQ
+ \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
+{
+ __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/**
+ \brief Disable FIQ
+ \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
+{
+ __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/**
+ \brief Get Base Priority
+ \details Returns the current value of the Base Priority register.
+ \return Base Priority register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Base Priority
+ \details Assigns the given value to the Base Priority register.
+ \param [in] basePri Base Priority value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
+{
+ __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
+}
+
+
+/**
+ \brief Set Base Priority with condition
+ \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+ or the new value increases the BASEPRI priority level.
+ \param [in] basePri Base Priority value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
+{
+ __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
+}
+
+
+/**
+ \brief Get Fault Mask
+ \details Returns the current value of the Fault Mask register.
+ \return Fault Mask register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Fault Mask
+ \details Assigns the given value to the Fault Mask register.
+ \param [in] faultMask Fault Mask value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+ __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+#endif /* (__CORTEX_M >= 0x03U) */
+
+
+#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
+
+/**
+ \brief Get FPSCR
+ \details Returns the current value of the Floating Point Status/Control register.
+ \return Floating Point Status/Control register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ uint32_t result;
+
+ /* Empty asm statement works as a scheduling barrier */
+ __ASM volatile ("");
+ __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
+ __ASM volatile ("");
+ return(result);
+#else
+ return(0);
+#endif
+}
+
+
+/**
+ \brief Set FPSCR
+ \details Assigns the given value to the Floating Point Status/Control register.
+ \param [in] fpscr Floating Point Status/Control value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ /* Empty asm statement works as a scheduling barrier */
+ __ASM volatile ("");
+ __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
+ __ASM volatile ("");
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
+
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ########################## Core Instruction Access ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+ Access to dedicated instructions
+ @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+ \brief No Operation
+ \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
+{
+ __ASM volatile ("nop");
+}
+
+
+/**
+ \brief Wait For Interrupt
+ \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
+{
+ __ASM volatile ("wfi");
+}
+
+
+/**
+ \brief Wait For Event
+ \details Wait For Event is a hint instruction that permits the processor to enter
+ a low-power state until one of a number of events occurs.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
+{
+ __ASM volatile ("wfe");
+}
+
+
+/**
+ \brief Send Event
+ \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
+{
+ __ASM volatile ("sev");
+}
+
+
+/**
+ \brief Instruction Synchronization Barrier
+ \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+ so that all instructions following the ISB are fetched from cache or memory,
+ after the instruction has been completed.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
+{
+ __ASM volatile ("isb 0xF":::"memory");
+}
+
+
+/**
+ \brief Data Synchronization Barrier
+ \details Acts as a special kind of Data Memory Barrier.
+ It completes when all explicit memory accesses before this instruction complete.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
+{
+ __ASM volatile ("dsb 0xF":::"memory");
+}
+
+
+/**
+ \brief Data Memory Barrier
+ \details Ensures the apparent order of the explicit memory operations before
+ and after the instruction, without ensuring their completion.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
+{
+ __ASM volatile ("dmb 0xF":::"memory");
+}
+
+
+/**
+ \brief Reverse byte order (32 bit)
+ \details Reverses the byte order in integer value.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
+ return __builtin_bswap32(value);
+#else
+ uint32_t result;
+
+ __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+#endif
+}
+
+
+/**
+ \brief Reverse byte order (16 bit)
+ \details Reverses the byte order in two unsigned short values.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
+{
+ uint32_t result;
+
+ __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+}
+
+
+/**
+ \brief Reverse byte order in signed short value
+ \details Reverses the byte order in a signed short value with sign extension to integer.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ return (short)__builtin_bswap16(value);
+#else
+ int32_t result;
+
+ __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+#endif
+}
+
+
+/**
+ \brief Rotate Right in unsigned value (32 bit)
+ \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+ \param [in] value Value to rotate
+ \param [in] value Number of Bits to rotate
+ \return Rotated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+ return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+ \brief Breakpoint
+ \details Causes the processor to enter Debug state.
+ Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+ \param [in] value is ignored by the processor.
+ If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value) __ASM volatile ("bkpt "#value)
+
+
+/**
+ \brief Reverse bit order of value
+ \details Reverses the bit order of the given value.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+ uint32_t result;
+
+#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+ __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+#else
+ int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
+
+ result = value; /* r will be reversed bits of v; first get LSB of v */
+ for (value >>= 1U; value; value >>= 1U)
+ {
+ result <<= 1U;
+ result |= value & 1U;
+ s--;
+ }
+ result <<= s; /* shift when v's highest bits are zero */
+#endif
+ return(result);
+}
+
+
+/**
+ \brief Count leading zeros
+ \details Counts the number of leading zeros of a data value.
+ \param [in] value Value to count the leading zeros
+ \return number of leading zeros in value
+ */
+#define __CLZ __builtin_clz
+
+
+#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+
+/**
+ \brief LDR Exclusive (8 bit)
+ \details Executes a exclusive LDR instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
+{
+ uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+ /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+ accepted by assembler. So has to use following less efficient pattern.
+ */
+ __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+ return ((uint8_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDR Exclusive (16 bit)
+ \details Executes a exclusive LDR instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
+{
+ uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+ /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+ accepted by assembler. So has to use following less efficient pattern.
+ */
+ __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+ return ((uint16_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDR Exclusive (32 bit)
+ \details Executes a exclusive LDR instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
+ return(result);
+}
+
+
+/**
+ \brief STR Exclusive (8 bit)
+ \details Executes a exclusive STR instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+ return(result);
+}
+
+
+/**
+ \brief STR Exclusive (16 bit)
+ \details Executes a exclusive STR instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+ return(result);
+}
+
+
+/**
+ \brief STR Exclusive (32 bit)
+ \details Executes a exclusive STR instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+ return(result);
+}
+
+
+/**
+ \brief Remove the exclusive lock
+ \details Removes the exclusive lock which is created by LDREX.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
+{
+ __ASM volatile ("clrex" ::: "memory");
+}
+
+
+/**
+ \brief Signed Saturate
+ \details Saturates a signed value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (1..32)
+ \return Saturated value
+ */
+#define __SSAT(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+
+/**
+ \brief Unsigned Saturate
+ \details Saturates an unsigned value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (0..31)
+ \return Saturated value
+ */
+#define __USAT(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+
+/**
+ \brief Rotate Right with Extend (32 bit)
+ \details Moves each bit of a bitstring right by one bit.
+ The carry input is shifted in at the left end of the bitstring.
+ \param [in] value Value to rotate
+ \return Rotated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
+{
+ uint32_t result;
+
+ __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+}
+
+
+/**
+ \brief LDRT Unprivileged (8 bit)
+ \details Executes a Unprivileged LDRT instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
+{
+ uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+ /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+ accepted by assembler. So has to use following less efficient pattern.
+ */
+ __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+ return ((uint8_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDRT Unprivileged (16 bit)
+ \details Executes a Unprivileged LDRT instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
+{
+ uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+ /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+ accepted by assembler. So has to use following less efficient pattern.
+ */
+ __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+ return ((uint16_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDRT Unprivileged (32 bit)
+ \details Executes a Unprivileged LDRT instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
+ return(result);
+}
+
+
+/**
+ \brief STRT Unprivileged (8 bit)
+ \details Executes a Unprivileged STRT instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
+{
+ __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief STRT Unprivileged (16 bit)
+ \details Executes a Unprivileged STRT instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
+{
+ __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief STRT Unprivileged (32 bit)
+ \details Executes a Unprivileged STRT instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
+{
+ __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
+}
+
+#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ################### Compiler specific Intrinsics ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+ Access to dedicated SIMD instructions
+ @{
+*/
+
+#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({ \
+ int32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
+{
+ uint32_t result;
+
+ __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
+{
+ uint32_t result;
+
+ __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
+{
+ int32_t result;
+
+ __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
+{
+ int32_t result;
+
+ __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+#define __PKHBT(ARG1,ARG2,ARG3) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+ __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
+ __RES; \
+ })
+
+#define __PKHTB(ARG1,ARG2,ARG3) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+ if (ARG3 == 0) \
+ __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
+ else \
+ __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
+ __RES; \
+ })
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+ int32_t result;
+
+ __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+#endif /* (__CORTEX_M >= 0x04) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#if defined ( __GNUC__ )
+#pragma GCC diagnostic pop
+#endif
+
+#endif /* __CMSIS_GCC_H */
\ No newline at end of file
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cm4.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cm4.h
new file mode 100644
index 000000000..873eec99d
--- /dev/null
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cm4.h
@@ -0,0 +1,1937 @@
+/**************************************************************************//**
+ * @file core_cm4.h
+ * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM4_H_GENERIC
+#define __CORE_CM4_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+ \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
+ CMSIS violates the following MISRA-C:2004 rules:
+
+ \li Required Rule 8.5, object/function definition in header file.<br>
+ Function definitions in header files are used to allow 'inlining'.
+
+ \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+ Unions are used for effective representation of core registers.
+
+ \li Advisory Rule 19.7, Function-like macro defined.<br>
+ Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ * CMSIS definitions
+ ******************************************************************************/
+/**
+ \ingroup Cortex_M4
+ @{
+ */
+
+/* CMSIS CM4 definitions */
+#define __CM4_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
+#define __CM4_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
+#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
+ __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
+
+#define __CORTEX_M (0x04U) /*!< Cortex-M Core */
+
+
+#if defined ( __CC_ARM )
+ #define __ASM __asm /*!< asm keyword for ARM Compiler */
+ #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+ #define __STATIC_INLINE static __inline
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #define __ASM __asm /*!< asm keyword for ARM Compiler */
+ #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+ #define __STATIC_INLINE static __inline
+
+#elif defined ( __GNUC__ )
+ #define __ASM __asm /*!< asm keyword for GNU Compiler */
+ #define __INLINE inline /*!< inline keyword for GNU Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __ICCARM__ )
+ #define __ASM __asm /*!< asm keyword for IAR Compiler */
+ #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __TMS470__ )
+ #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __TASKING__ )
+ #define __ASM __asm /*!< asm keyword for TASKING Compiler */
+ #define __INLINE inline /*!< inline keyword for TASKING Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __CSMC__ )
+ #define __packed
+ #define __ASM _asm /*!< asm keyword for COSMIC Compiler */
+ #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
+ #define __STATIC_INLINE static inline
+
+#else
+ #error Unknown compiler
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not.
+ For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+ #if defined __TARGET_FPU_VFP
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #if defined __ARM_PCS_VFP
+ #if (__FPU_PRESENT == 1)
+ #define __FPU_USED 1U
+ #else
+ #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __GNUC__ )
+ #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __ICCARM__ )
+ #if defined __ARMVFP__
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __TMS470__ )
+ #if defined __TI_VFP_SUPPORT__
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __TASKING__ )
+ #if defined __FPU_VFP__
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __CSMC__ )
+ #if ( __CSMC__ & 0x400U)
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#endif
+
+#include "core_cmInstr.h" /* Core Instruction Access */
+#include "core_cmFunc.h" /* Core Function Access */
+#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM4_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM4_H_DEPENDANT
+#define __CORE_CM4_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+ #ifndef __CM4_REV
+ #define __CM4_REV 0x0000U
+ #warning "__CM4_REV not defined in device header file; using default!"
+ #endif
+
+ #ifndef __FPU_PRESENT
+ #define __FPU_PRESENT 0U
+ #warning "__FPU_PRESENT not defined in device header file; using default!"
+ #endif
+
+ #ifndef __MPU_PRESENT
+ #define __MPU_PRESENT 0U
+ #warning "__MPU_PRESENT not defined in device header file; using default!"
+ #endif
+
+ #ifndef __NVIC_PRIO_BITS
+ #define __NVIC_PRIO_BITS 4U
+ #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+ #endif
+
+ #ifndef __Vendor_SysTickConfig
+ #define __Vendor_SysTickConfig 0U
+ #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+ #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+ \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+ <strong>IO Type Qualifiers</strong> are used
+ \li to specify the access to peripheral variables.
+ \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+ #define __I volatile /*!< Defines 'read only' permissions */
+#else
+ #define __I volatile const /*!< Defines 'read only' permissions */
+#endif
+#define __O volatile /*!< Defines 'write only' permissions */
+#define __IO volatile /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define __IM volatile const /*! Defines 'read only' structure member permissions */
+#define __OM volatile /*! Defines 'write only' structure member permissions */
+#define __IOM volatile /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M4 */
+
+
+
+/*******************************************************************************
+ * Register Abstraction
+ Core Register contain:
+ - Core Register
+ - Core NVIC Register
+ - Core SCB Register
+ - Core SysTick Register
+ - Core Debug Register
+ - Core MPU Register
+ - Core FPU Register
+ ******************************************************************************/
+/**
+ \defgroup CMSIS_core_register Defines and Type Definitions
+ \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_CORE Status and Control Registers
+ \brief Core Register type definitions.
+ @{
+ */
+
+/**
+ \brief Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
+ uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
+ uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
+ uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
+ uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
+ uint32_t C:1; /*!< bit: 29 Carry condition code flag */
+ uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
+ uint32_t N:1; /*!< bit: 31 Negative condition code flag */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos 31U /*!< APSR: N Position */
+#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
+
+#define APSR_Z_Pos 30U /*!< APSR: Z Position */
+#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
+
+#define APSR_C_Pos 29U /*!< APSR: C Position */
+#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
+
+#define APSR_V_Pos 28U /*!< APSR: V Position */
+#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
+
+#define APSR_Q_Pos 27U /*!< APSR: Q Position */
+#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos 16U /*!< APSR: GE Position */
+#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
+
+
+/**
+ \brief Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
+ uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
+
+
+/**
+ \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
+ uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
+ uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
+ uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
+ uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
+ uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
+ uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
+ uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
+ uint32_t C:1; /*!< bit: 29 Carry condition code flag */
+ uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
+ uint32_t N:1; /*!< bit: 31 Negative condition code flag */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos 31U /*!< xPSR: N Position */
+#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
+#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos 29U /*!< xPSR: C Position */
+#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos 28U /*!< xPSR: V Position */
+#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
+#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */
+#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos 24U /*!< xPSR: T Position */
+#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */
+#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
+
+
+/**
+ \brief Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
+ uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
+ uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
+ uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
+ \brief Type definitions for the NVIC Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+ __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
+ uint32_t RESERVED0[24U];
+ __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
+ uint32_t RSERVED1[24U];
+ __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
+ uint32_t RESERVED2[24U];
+ __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
+ uint32_t RESERVED3[24U];
+ __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
+ uint32_t RESERVED4[56U];
+ __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
+ uint32_t RESERVED5[644U];
+ __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
+} NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SCB System Control Block (SCB)
+ \brief Type definitions for the System Control Block Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+ __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
+ __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
+ __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
+ __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
+ __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
+ __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
+ __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
+ __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
+ __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
+ __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
+ __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
+ __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
+ __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
+ __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
+ __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
+ __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
+ __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
+ __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
+ __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
+ uint32_t RESERVED0[5U];
+ __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+ \brief Type definitions for the System Control and ID Register not in the SCB
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+ uint32_t RESERVED0[1U];
+ __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
+ __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */
+
+#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SysTick System Tick Timer (SysTick)
+ \brief Type definitions for the System Timer Registers.
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+ __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
+ __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
+ __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
+ __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
+ \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+ __OM union
+ {
+ __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
+ __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
+ __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
+ } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
+ uint32_t RESERVED0[864U];
+ __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
+ uint32_t RESERVED1[15U];
+ __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
+ uint32_t RESERVED2[15U];
+ __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
+ uint32_t RESERVED3[29U];
+ __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
+ __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
+ __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
+ uint32_t RESERVED4[43U];
+ __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
+ __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
+ uint32_t RESERVED5[6U];
+ __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
+ __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
+ __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
+ __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
+ __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
+ __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
+ __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
+ __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
+ __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
+ __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
+ __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
+ __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
+ \brief Type definitions for the Data Watchpoint and Trace (DWT)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+ __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
+ __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
+ __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
+ __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
+ __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
+ __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
+ __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
+ __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
+ __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
+ __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
+ __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
+ uint32_t RESERVED0[1U];
+ __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
+ __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
+ __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
+ uint32_t RESERVED1[1U];
+ __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
+ __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
+ __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
+ uint32_t RESERVED2[1U];
+ __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
+ __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
+ __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_TPI Trace Port Interface (TPI)
+ \brief Type definitions for the Trace Port Interface (TPI)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+ __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
+ __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
+ uint32_t RESERVED0[2U];
+ __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
+ uint32_t RESERVED1[55U];
+ __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
+ uint32_t RESERVED2[131U];
+ __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
+ __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
+ __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
+ uint32_t RESERVED3[759U];
+ __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
+ __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
+ __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
+ uint32_t RESERVED4[1U];
+ __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
+ __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
+ __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
+ uint32_t RESERVED5[39U];
+ __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
+ __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
+ uint32_t RESERVED7[8U];
+ __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
+ __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
+
+#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if (__MPU_PRESENT == 1U)
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_MPU Memory Protection Unit (MPU)
+ \brief Type definitions for the Memory Protection Unit (MPU)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+ __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
+ __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
+ __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
+ __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
+ __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
+ __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
+ __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
+ __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if (__FPU_PRESENT == 1U)
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_FPU Floating Point Unit (FPU)
+ \brief Type definitions for the Floating Point Unit (FPU)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+ uint32_t RESERVED0[1U];
+ __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
+ __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
+ __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
+ __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
+ __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+#endif
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
+ \brief Type definitions for the Core Debug Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+ __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
+ __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
+ __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
+ __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_core_bitfield Core register bit field macros
+ \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+ @{
+ */
+
+/**
+ \brief Mask and shift a bit field value for use in a register bit range.
+ \param[in] field Name of the register bit field.
+ \param[in] value Value of the bit field.
+ \return Masked and shifted value.
+*/
+#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
+
+/**
+ \brief Mask and shift a register value to extract a bit filed value.
+ \param[in] field Name of the register bit field.
+ \param[in] value Value of register.
+ \return Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_core_base Core Definitions
+ \brief Definitions for base addresses, unions, and structures.
+ @{
+ */
+
+/* Memory mapping of Cortex-M4 Hardware */
+#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
+#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
+#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
+#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
+#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
+#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
+#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
+#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
+
+#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
+#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
+#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
+#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
+#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
+#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
+#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
+#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
+
+#if (__MPU_PRESENT == 1U)
+ #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
+ #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
+#endif
+
+#if (__FPU_PRESENT == 1U)
+ #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
+ #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ * Hardware Abstraction Layer
+ Core Function Interface contains:
+ - Core NVIC Functions
+ - Core SysTick Functions
+ - Core Debug Functions
+ - Core Register Access Functions
+ ******************************************************************************/
+/**
+ \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ########################## NVIC functions #################################### */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+ \brief Functions that manage interrupts and exceptions via the NVIC.
+ @{
+ */
+
+/**
+ \brief Set Priority Grouping
+ \details Sets the priority grouping field using the required unlock sequence.
+ The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+ Only values from 0..7 are used.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Priority grouping field.
+ */
+__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ uint32_t reg_value;
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+
+ reg_value = SCB->AIRCR; /* read old register configuration */
+ reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+ reg_value = (reg_value |
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
+ SCB->AIRCR = reg_value;
+}
+
+
+/**
+ \brief Get Priority Grouping
+ \details Reads the priority grouping field from the NVIC Interrupt Controller.
+ \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+{
+ return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+ \brief Enable External Interrupt
+ \details Enables a device-specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Disable External Interrupt
+ \details Disables a device-specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+ NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Get Pending Interrupt
+ \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
+ \param [in] IRQn Interrupt number.
+ \return 0 Interrupt status is not pending.
+ \return 1 Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+ return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+}
+
+
+/**
+ \brief Set Pending Interrupt
+ \details Sets the pending bit of an external interrupt.
+ \param [in] IRQn Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+ NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Clear Pending Interrupt
+ \details Clears the pending bit of an external interrupt.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+ NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Get Active Interrupt
+ \details Reads the active register in NVIC and returns the active bit.
+ \param [in] IRQn Interrupt number.
+ \return 0 Interrupt status is not active.
+ \return 1 Interrupt status is active.
+ */
+__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+{
+ return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+}
+
+
+/**
+ \brief Set Interrupt Priority
+ \details Sets the priority of an interrupt.
+ \note The priority cannot be set for every core interrupt.
+ \param [in] IRQn Interrupt number.
+ \param [in] priority Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ if ((int32_t)(IRQn) < 0)
+ {
+ SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+ else
+ {
+ NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+}
+
+
+/**
+ \brief Get Interrupt Priority
+ \details Reads the priority of an interrupt.
+ The interrupt number can be positive to specify an external (device specific) interrupt,
+ or negative to specify an internal (core) interrupt.
+ \param [in] IRQn Interrupt number.
+ \return Interrupt Priority.
+ Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+ if ((int32_t)(IRQn) < 0)
+ {
+ return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+ }
+ else
+ {
+ return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
+ }
+}
+
+
+/**
+ \brief Encode Priority
+ \details Encodes the priority for an interrupt with the given priority group,
+ preemptive priority value, and subpriority value.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Used priority group.
+ \param [in] PreemptPriority Preemptive priority value (starting from 0).
+ \param [in] SubPriority Subpriority value (starting from 0).
+ \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+ return (
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
+ );
+}
+
+
+/**
+ \brief Decode Priority
+ \details Decodes an interrupt priority value with a given priority group to
+ preemptive priority value and subpriority value.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+ \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+ \param [in] PriorityGroup Used priority group.
+ \param [out] pPreemptPriority Preemptive priority value (starting from 0).
+ \param [out] pSubPriority Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+ *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+ *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
+}
+
+
+/**
+ \brief System Reset
+ \details Initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+ __DSB(); /* Ensure all outstanding memory accesses included
+ buffered write are completed before reset */
+ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+ SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
+ __DSB(); /* Ensure completion of memory access */
+
+ for(;;) /* wait until reset */
+ {
+ __NOP();
+ }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ################################## SysTick function ############################################ */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+ \brief Functions that configure the System.
+ @{
+ */
+
+#if (__Vendor_SysTickConfig == 0U)
+
+/**
+ \brief System Tick Configuration
+ \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+ Counter is in free running mode to generate periodic interrupts.
+ \param [in] ticks Number of ticks between two interrupts.
+ \return 0 Function succeeded.
+ \return 1 Function failed.
+ \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+ function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+ must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+ if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+ {
+ return (1UL); /* Reload value impossible */
+ }
+
+ SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
+ NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
+ SysTick_CTRL_TICKINT_Msk |
+ SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ return (0UL); /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_core_DebugFunctions ITM Functions
+ \brief Functions that access the ITM debug interface.
+ @{
+ */
+
+extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
+#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+ \brief ITM Send Character
+ \details Transmits a character via the ITM channel 0, and
+ \li Just returns when no debugger is connected that has booked the output.
+ \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+ \param [in] ch Character to transmit.
+ \returns Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+ if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
+ ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
+ {
+ while (ITM->PORT[0U].u32 == 0UL)
+ {
+ __NOP();
+ }
+ ITM->PORT[0U].u8 = (uint8_t)ch;
+ }
+ return (ch);
+}
+
+
+/**
+ \brief ITM Receive Character
+ \details Inputs a character via the external variable \ref ITM_RxBuffer.
+ \return Received character.
+ \return -1 No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+ int32_t ch = -1; /* no character available */
+
+ if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+ {
+ ch = ITM_RxBuffer;
+ ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
+ }
+
+ return (ch);
+}
+
+
+/**
+ \brief ITM Check Character
+ \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+ \return 0 No character available.
+ \return 1 Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+ if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+ {
+ return (0); /* no character available */
+ }
+ else
+ {
+ return (1); /* character available */
+ }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM4_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
\ No newline at end of file
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmFunc.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmFunc.h
new file mode 100644
index 000000000..01c26e1cf
--- /dev/null
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmFunc.h
@@ -0,0 +1,87 @@
+/**************************************************************************//**
+ * @file core_cmFunc.h
+ * @brief CMSIS Cortex-M Core Function Access Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CMFUNC_H
+#define __CORE_CMFUNC_H
+
+
+/* ########################### Core Function Access ########################### */
+/** \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+ @{
+*/
+
+/*------------------ RealView Compiler -----------------*/
+#if defined ( __CC_ARM )
+ #include "cmsis_armcc.h"
+
+/*------------------ ARM Compiler V6 -------------------*/
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #include "cmsis_armcc_V6.h"
+
+/*------------------ GNU Compiler ----------------------*/
+#elif defined ( __GNUC__ )
+ #include "cmsis_gcc.h"
+
+/*------------------ ICC Compiler ----------------------*/
+#elif defined ( __ICCARM__ )
+ #include <cmsis_iar.h>
+
+/*------------------ TI CCS Compiler -------------------*/
+#elif defined ( __TMS470__ )
+ #include <cmsis_ccs.h>
+
+/*------------------ TASKING Compiler ------------------*/
+#elif defined ( __TASKING__ )
+ /*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+/*------------------ COSMIC Compiler -------------------*/
+#elif defined ( __CSMC__ )
+ #include <cmsis_csm.h>
+
+#endif
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+#endif /* __CORE_CMFUNC_H */
\ No newline at end of file
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmInstr.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmInstr.h
new file mode 100644
index 000000000..b973d9bfd
--- /dev/null
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmInstr.h
@@ -0,0 +1,87 @@
+/**************************************************************************//**
+ * @file core_cmInstr.h
+ * @brief CMSIS Cortex-M Core Instruction Access Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CMINSTR_H
+#define __CORE_CMINSTR_H
+
+
+/* ########################## Core Instruction Access ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+ Access to dedicated instructions
+ @{
+*/
+
+/*------------------ RealView Compiler -----------------*/
+#if defined ( __CC_ARM )
+ #include "cmsis_armcc.h"
+
+/*------------------ ARM Compiler V6 -------------------*/
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #include "cmsis_armcc_V6.h"
+
+/*------------------ GNU Compiler ----------------------*/
+#elif defined ( __GNUC__ )
+ #include "cmsis_gcc.h"
+
+/*------------------ ICC Compiler ----------------------*/
+#elif defined ( __ICCARM__ )
+ #include <cmsis_iar.h>
+
+/*------------------ TI CCS Compiler -------------------*/
+#elif defined ( __TMS470__ )
+ #include <cmsis_ccs.h>
+
+/*------------------ TASKING Compiler ------------------*/
+#elif defined ( __TASKING__ )
+ /*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+/*------------------ COSMIC Compiler -------------------*/
+#elif defined ( __CSMC__ )
+ #include <cmsis_csm.h>
+
+#endif
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+#endif /* __CORE_CMINSTR_H */
\ No newline at end of file
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmSimd.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmSimd.h
new file mode 100644
index 000000000..4ef5d4ef9
--- /dev/null
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/lib/CMSIS/STM32F4xx/Include/core_cmSimd.h
@@ -0,0 +1,96 @@
+/**************************************************************************//**
+ * @file core_cmSimd.h
+ * @brief CMSIS Cortex-M SIMD Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CMSIMD_H
+#define __CORE_CMSIMD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+
+/* ################### Compiler specific Intrinsics ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+ Access to dedicated SIMD instructions
+ @{
+*/
+
+/*------------------ RealView Compiler -----------------*/
+#if defined ( __CC_ARM )
+ #include "cmsis_armcc.h"
+
+/*------------------ ARM Compiler V6 -------------------*/
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #include "cmsis_armcc_V6.h"
+
+/*------------------ GNU Compiler ----------------------*/
+#elif defined ( __GNUC__ )
+ #include "cmsis_gcc.h"
+
+/*------------------ ICC Compiler ----------------------*/
+#elif defined ( __ICCARM__ )
+ #include <cmsis_iar.h>
+
+/*------------------ TI CCS Compiler -------------------*/
+#elif defined ( __TMS470__ )
+ #include <cmsis_ccs.h>
+
+/*------------------ TASKING Compiler ------------------*/
+#elif defined ( __TASKING__ )
+ /*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+/*------------------ COSMIC Compiler -------------------*/
+#elif defined ( __CSMC__ )
+ #include <cmsis_csm.h>
+
+#endif
+
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CMSIMD_H */
\ No newline at end of file
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/interface/bootloader.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/interface/bootloader.h
index cb993271e..41acf9f84 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/interface/bootloader.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/interface/bootloader.h
@@ -28,6 +28,7 @@
/* ST includes */
#include "stm32f4xx.h"
+#include "stm32f4xx_syscfg.h"
/**
* @brief Check if memory is set after software
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/bootloader.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/bootloader.c
index 57e168c9a..83f1d4c54 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/bootloader.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/bootloader.c
@@ -52,14 +52,15 @@
* @param bl_addr The bootloader address to jump to
*/
static void branch_to_bootloader(uint32_t r0, uint32_t bl_addr){
- __asm volatile (
- "ldr r2, [r1, #0]\n" // get address of stack pointer
- "msr msp, r2\n" // get stack pointer
- "ldr r2, [r1, #4]\n" // get address of destination
- "bx r2\n" // branch to bootloader
- );
- //unreachable code
- while(1);
+ //COMMENTED FIRMWARE
+ // __asm volatile (
+ // "ldr r2, [r1, #0]\n" // get address of stack pointer
+ // "msr msp, r2\n" // get stack pointer
+ // "ldr r2, [r1, #4]\n" // get address of destination
+ // "bx r2\n" // branch to bootloader
+ // );
+ // //unreachable code
+ // while(1);
}
void check_enter_bootloader(){
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/controller.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/controller.c
index 58d97da17..5e2ec0f37 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/controller.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/controller.c
@@ -40,11 +40,12 @@ void controllerInit(ControllerType controller) {
currentController = DEFAULT_CONTROLLER;
}
- ControllerType forcedController = CONTROLLER_NAME;
- if (forcedController != ControllerTypeAny) {
- DEBUG_PRINT("Controller type forced\n");
- currentController = forcedController;
- }
+ //COMMENTED FIRMWARE
+ // ControllerType forcedController = CONTROLLER_NAME;
+ // if (forcedController != ControllerTypeAny) {
+ // DEBUG_PRINT("Controller type forced\n");
+ // currentController = forcedController;
+ // }
initController();
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/crtpservice.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/crtpservice.c
index d864f232e..720d7de7e 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/crtpservice.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/crtpservice.c
@@ -35,6 +35,7 @@
#include "crtpservice.h"
#include "static_mem.h"
#include "param.h"
+#include "config.h"
typedef enum {
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/estimator.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/estimator.c
index cad7e09a7..fb2df521d 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/estimator.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/estimator.c
@@ -103,11 +103,12 @@ void stateEstimatorSwitchTo(StateEstimatorType estimator) {
newEstimator = DEFAULT_ESTIMATOR;
}
- StateEstimatorType forcedEstimator = ESTIMATOR_NAME;
- if (forcedEstimator != anyEstimator) {
- DEBUG_PRINT("Estimator type forced\n");
- newEstimator = forcedEstimator;
- }
+ //COMMENTED FIRMWARE
+ // StateEstimatorType forcedEstimator = ESTIMATOR_NAME;
+ // if (forcedEstimator != anyEstimator) {
+ // DEBUG_PRINT("Estimator type forced\n");
+ // newEstimator = forcedEstimator;
+ // }
initEstimator(newEstimator);
StateEstimatorType previousEstimator = currentEstimator;
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/stabilizer.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/stabilizer.c
index 060da59fd..158edb2cb 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/stabilizer.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/stabilizer.c
@@ -213,7 +213,9 @@ static void stabilizerTask(void* param)
{
uint32_t tick;
uint32_t lastWakeTime;
- vTaskSetApplicationTaskTag(0, (void*)TASK_STABILIZER_ID_NBR);
+
+ //CHANGED FIRMWARE
+ vTaskSetApplicationTaskTag(0, (void*)3);
//Wait for the system to be fully started to start stabilization loop
systemWaitStart();
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/system.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/system.c
index 84c8c7950..6531dc825 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/system.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/modules/src/system.c
@@ -115,18 +115,19 @@ void systemInit(void)
crtpInit();
consoleInit();
- DEBUG_PRINT("----------------------------\n");
- DEBUG_PRINT("%s is up and running!\n", platformConfigGetDeviceTypeName());
-
- if (V_PRODUCTION_RELEASE) {
- DEBUG_PRINT("Production release %s\n", V_STAG);
- } else {
- DEBUG_PRINT("Build %s:%s (%s) %s\n", V_SLOCAL_REVISION,
- V_SREVISION, V_STAG, (V_MODIFIED)?"MODIFIED":"CLEAN");
- }
- DEBUG_PRINT("I am 0x%08X%08X%08X and I have %dKB of flash!\n",
- *((int*)(MCU_ID_ADDRESS+8)), *((int*)(MCU_ID_ADDRESS+4)),
- *((int*)(MCU_ID_ADDRESS+0)), *((short*)(MCU_FLASH_SIZE_ADDRESS)));
+ //COMMENTED FIRMWARE
+ // DEBUG_PRINT("----------------------------\n");
+ // DEBUG_PRINT("%s is up and running!\n", platformConfigGetDeviceTypeName());
+
+ // if (V_PRODUCTION_RELEASE) {
+ // DEBUG_PRINT("Production release %s\n", V_STAG);
+ // } else {
+ // DEBUG_PRINT("Build %s:%s (%s) %s\n", V_SLOCAL_REVISION,
+ // V_SREVISION, V_STAG, (V_MODIFIED)?"MODIFIED":"CLEAN");
+ // }
+ // DEBUG_PRINT("I am 0x%08X%08X%08X and I have %dKB of flash!\n",
+ // *((int*)(MCU_ID_ADDRESS+8)), *((int*)(MCU_ID_ADDRESS+4)),
+ // *((int*)(MCU_ID_ADDRESS+0)), *((short*)(MCU_FLASH_SIZE_ADDRESS)));
configblockInit();
storageInit();
@@ -332,7 +333,8 @@ bool systemIsArmed()
void vApplicationIdleHook( void )
{
- static uint32_t tickOfLatestWatchdogReset = M2T(0);
+ //COMMENTED FIRMWARE
+ static uint32_t tickOfLatestWatchdogReset = 0;//M2T(0);
portTickType tickCount = xTaskGetTickCount();
@@ -360,22 +362,23 @@ PARAM_GROUP_START(cpu)
/**
* @brief Size in kB of the device flash memory
*/
-PARAM_ADD_CORE(PARAM_UINT16 | PARAM_RONLY, flash, MCU_FLASH_SIZE_ADDRESS)
-
-/**
- * @brief Byte `0 - 3` of device unique id
- */
-PARAM_ADD_CORE(PARAM_UINT32 | PARAM_RONLY, id0, MCU_ID_ADDRESS+0)
-
-/**
- * @brief Byte `4 - 7` of device unique id
- */
-PARAM_ADD_CORE(PARAM_UINT32 | PARAM_RONLY, id1, MCU_ID_ADDRESS+4)
-
-/**
- * @brief Byte `8 - 11` of device unique id
- */
-PARAM_ADD_CORE(PARAM_UINT32 | PARAM_RONLY, id2, MCU_ID_ADDRESS+8)
+//COMMENTED FIRMWARE
+// PARAM_ADD_CORE(PARAM_UINT16 | PARAM_RONLY, flash, MCU_FLASH_SIZE_ADDRESS)
+
+// /**
+// * @brief Byte `0 - 3` of device unique id
+// */
+// PARAM_ADD_CORE(PARAM_UINT32 | PARAM_RONLY, id0, MCU_ID_ADDRESS+0)
+
+// /**
+// * @brief Byte `4 - 7` of device unique id
+// */
+// PARAM_ADD_CORE(PARAM_UINT32 | PARAM_RONLY, id1, MCU_ID_ADDRESS+4)
+
+// /**
+// * @brief Byte `8 - 11` of device unique id
+// */
+// PARAM_ADD_CORE(PARAM_UINT32 | PARAM_RONLY, id2, MCU_ID_ADDRESS+8)
PARAM_GROUP_STOP(cpu)
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/Makefile b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/Makefile
index fefa38311..d8930a3e0 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/Makefile
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/Makefile
@@ -20,6 +20,18 @@ CFLAGS = -mcpu=cortex-a72 \
-I$(INCLUDEPATH11) \
-I$(INCLUDEPATH12) \
-I$(INCLUDEPATH13) \
+ -I$(INCLUDEPATH14) \
+ -I$(INCLUDEPATH15) \
+ -I$(INCLUDEPATH16) \
+ -I$(INCLUDEPATH17) \
+ -I$(INCLUDEPATH18) \
+ -I$(INCLUDEPATH19) \
+ -I$(INCLUDEPATH20) \
+ -I$(INCLUDEPATH21) \
+ -I$(INCLUDEPATH22) \
+ -I$(INCLUDEPATH23) \
+ -I$(INCLUDEPATH24) \
+ -I$(INCLUDEPATH25) \
-D__LINUX__
BUILTIN_OPS = -fno-builtin-memset
ASMFLAGS = -mcpu=cortex-a72
@@ -37,6 +49,19 @@ INCLUDEPATH10 ?= ../utils/src/
INCLUDEPATH11 ?= ../modules/interface/
INCLUDEPATH12 ?= ../lib/CMSIS/Core/CM3/
INCLUDEPATH13 ?= ../lib/CMSIS/STM32F4xx/Include/
+INCLUDEPATH14 ?= ../lib/STM32F4xx_StdPeriph_Driver/inc/
+INCLUDEPATH15 ?= ../deck/interface/
+INCLUDEPATH16 ?= ../utils/src/lighthouse
+INCLUDEPATH17 ?= ../drivers/bosch/interface
+INCLUDEPATH18 ?= ../lib/vl53l1/core/inc
+INCLUDEPATH19 ?= ../lib/vl53l1/
+INCLUDEPATH20 ?= ../lib/STM32_USB_OTG_Driver/inc/
+INCLUDEPATH21 ?= ../lib/STM32_USB_Device_Library/Core/inc/
+INCLUDEPATH22 ?= ../platform
+INCLUDEPATH23 ?= ../modules/interface/lighthouse
+INCLUDEPATH24 ?= ../deck/drivers/interface
+INCLUDEPATH25 ?= ../modules/interface/kalman_core
+
PLATFORM ?= cf2
@@ -79,7 +104,7 @@ OBJS += build/platform_utils.o build/platform_$(PLATFORM).o #build/platform_$(CP
# Drivers
PRO += build/exti.o build/nvic.o build/motors.o
-OBJS += build/led.o build/mpu6500.o build/i2cdev.o build/ws2812_cf2.o build/lps25h.o build/i2c_drv.o
+OBJS += build/led.o build/mpu6500.o build/i2c_drv.o build/i2cdev.o build/ws2812_cf2.o build/lps25h.o
OBJS += build/ak8963.o build/eeprom.o build/maxsonar.o build/piezo.o
OBJS += build/uart_syslink.o build/swd.o build/uart1.o build/uart2.o build/watchdog.o
OBJS += build/cppm.o
@@ -92,13 +117,13 @@ OBJS += build/amg8833.o build/lh_bootloader.o
OBJS += build/usb_bsp.o build/usblink.o build/usbd_desc.o build/usb.o
# Hal
-OBJS += build/crtp.o build/ledseq.o build/freeRTOSdebug.o build/buzzer.o
-OBJS += build/pm_$(CPU).o build/syslink.o build/radiolink.o build/ow_syslink.o build/ow_common.o build/proximity.o build/usec_time.o
+OBJS += build/ledseq.o build/freeRTOSdebug.o build/buzzer.o build/crtp.o
+OBJS += build/syslink.o build/radiolink.o build/ow_syslink.o build/ow_common.o build/proximity.o build/usec_time.o #build/pm_$(CPU).o
OBJS += build/sensors.o
OBJS += build/storage.o
# libdw
-OBJS += build/libdw1000.o build/libdw1000Spi.o
+#OBJS += build/libdw1000.o build/libdw1000Spi.o
# vl53l1 lib
OBJS += build/vl53l1_api_core.o build/vl53l1_api.o build/vl53l1_core.o build/vl53l1_silicon_core.o build/vl53l1_api_strings.o
@@ -122,8 +147,8 @@ OBJS += build/estimator.o build/estimator_complementary.o
OBJS += build/controller.o build/controller_pid.o build/controller_mellinger.o build/controller_indi.o
OBJS += build/student_attitude_controller.o build/student_pid.o
OBJS += build/controller_student.o
-OBJS += build/power_distribution_$(POWER_DISTRIBUTION).o
-OBJS += build/collision_avoidance.o health.o
+OBJS += build/power_distribution_stock.o
+OBJS += build/collision_avoidance.o #health.o
# Kalman estimator
OBJS += build/estimator_kalman.o build/kalman_core.o build/kalman_supervisor.o
@@ -264,9 +289,6 @@ build/%.o : ../../../Source/portable/GCC/ARM_CA72_64_BIT/%.c
build/%.o : ../../../Source/portable/GCC/ARM_CA72_64_BIT/%.S
$(CROSS)as $(ASMFLAGS) -c -o $@ $<
-build/%.o : ../../../Source/portable/MemMang/%.c
- $(CROSS)gcc $(CFLAGS) -c -o $@ $<
-
##########Crazyflie files
build/%.o : ../deck/api/%.c
@@ -294,7 +316,7 @@ build/%.o : ../init/%.c
$(CROSS)gcc $(CFLAGS) -c -o $@ $<
-build/%.o : ../modules/src%.c
+build/%.o : ../modules/src/%.c
$(CROSS)gcc $(CFLAGS) -c -o $@ $<
build/%.o : ../modules/src/kalman_core/%.c
@@ -315,6 +337,9 @@ build/%.o : ../utils/src/lighthouse/%.c
build/%.o : ../utils/src/tdoa/%.c
$(CROSS)gcc $(CFLAGS) -c -o $@ $<
+build/%.o : ../lib/vl53l1/core/src/%.c
+ $(CROSS)gcc $(CFLAGS) -c -o $@ $<
+
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ak8963.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ak8963.o
new file mode 100644
index 0000000000000000000000000000000000000000..af5b85f1ac43be7b205048a23e5fe5409240c4e2
GIT binary patch
literal 2344
zcmb`J&1(}u6u>7<wXGmjPeKolAech4BoW1mhm@qofY#DR&??wXGBK;kZrGjH_M$!b
z2Z;Uy9z1yTq$i;V&mw}J^)K+_E;=uH&)K{U6srTf@4esqnD0#<E?&MkmP!d~De+oZ
zi>MHp39A?TYEevz39*~L{pq+&f22o>os~G_wqX9f?07BcgWG%M|E-_b|KBzr53j!;
zzo?W-=Vhj{bWPTRpwno(o-bQLD0N%Og={YjT3*L!VWaJ7)zBNElJia>Tgc_-oqR!N
z+_0N9T5fh0xRaOQ$>$1Z?4ENC&d9j<{)=<4(<4t1@Uc<hhNlz!P@jxCiBM-e5r5c_
zqp^M|;u!L2%$P)(MJ^e?fIP?e67nMBw~#M09w1*wPUG1@-edd;a_~c=aXvRX%<FNV
zTK)?8GsfQ`f64e4<hzW2MgAT+jq@k+&x}u*ErIcTV|)fVZ2{GpLq2UJG~z|%lJOey
z9CBI*4>{z;>pVcd%;KLSUuW?zkoQ>p8{|7IUby$p&7VE(G{ng*)T_RyQLU*+mjd56
zm&yx#gsZC40tcEErORs5Yp813lB(YdtW|ckyQ19YwndkW>G^jO;Ch1GNRTy4u5PNZ
z)d}veYFBSWmP3z=VHkuKT?v{BtyQIC){2T0O~!cG^vYi3);p?NDA`gA&AS_s?kYc)
zmSARGETd_e`bjtxNz)yQBsdgF%P<tVCWI4hcePtLQilWCCQYj?Eu5xV9O2ZXNH~q4
z+n>hZ(EY=E#^l1$I>>4i(SC&Ij@;9vpgdtDgzzurTb4&@9G@}{xJ&!ZpEJ2oGiRQ7
zqyBHkq0y=TxE%HMmjrQOus-ltgYG?izoAW;hmRe&JOFPYK2S#k^H2Y1iX%oDmHz`b
Kg#XmBa^g3VJ7bUl
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/amg8833.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/amg8833.o
new file mode 100644
index 0000000000000000000000000000000000000000..2376aa95779ed0de3a03b696450abe50f484d5e8
GIT binary patch
literal 4144
zcmbuCU2GIp6oAjnR49K^=#NcXmuVqV3M}n{xHV{|TYie6g=|+e!K6Fg4%>z9PiB`=
zERhwBueRC;o(Lu;(7r(8gFJvD`asYp5)BU|wuQuoM58H)O<3zWJLk5S>6RC7GdcHu
z=jWb#=FH6Y%$@^#RYd_Y6!;qESAqguSv5a5@>2tr!!mfFsbi5ESUagH4GI{|P-M)Y
zx@?`U{Y+PG@SD-~kPYTE7@j->!>Ah>KVvlK25(-vp>_R2deS{W9oeBxvn$q!u%&n^
zz>tY{0o*G9>pBAfK6yX4Ue-DJTpul3<>Yf;Q^r(`rQkK)sf<o*F!uO}I$8wKtQ7&B
zV`Oq^Hdu@LGCbqBRyszkT$<n4pn+nv;6?g0>d2-7rJ-blG>6m1=Ojne@?&AOVmXwI
zR84obj6OaR7|jiSpRa?c*Lw8B{fD~oY|c5s_YvlU{`s1!OPqY>)^I*JdHIr^8@x8E
z;C$lpRh#NLwNZ_?8M<c^Z1g<bro}ho{4JbMuYegkC;U_C3E;XGFMv9{U_=GKht8mI
z-nA%cP3I$hcm{o1bWbf_Zl4zRF<n0J9G?%_hxYga=hG{U8QN=VV<7%;TWdTw_`@Y}
zPEjB8=qEw*kBfF4=B*az^PcN9vZ*Vs?woM)&2y>?)#FJu%$%$NTUQ}O_xcg`Z7F2$
z(EWal_1KAZC;thpqG4PsA3J+2?N2Xp`gK+<J$_(z7X6%i_N3aFq1>o{m3s7pa$AS>
zo-ja2DT39yU-yuX;!%IMVm|r)kHGMEeCCO$(L5f(=S5c<sJ3wBVvzb=q5Dx>JLeBu
zpp<GY;?+`rQLdmI*Y#|b;G#a_yrQ3t%5|O28I`e#)!DU&(RZpEa<r#fV|+&JKGq_z
z3x)$Fr$3{6F&nA-aT04rHh(LyqqwBO^9a{euW;46PPGWuWN(N4XK#1=L06spi|aiX
z-rs(WYW6GE>!*KbL*Js0sM%DtkrOo&xr+KwZA8A0@R=Of)CPs?M9<fxR)!4wQl;m#
z1)rIl`Mz-8Q`t8FvTwq^*4Eec`h6X5>!D<_FVbtq68h1kt!H{Iy=804P9BZ*;mnTo
z#xhnUbHcXtX0LCnud%7w+vL;hO*_67XN{XS5%)Ifq-kpOy^2+M&Y&EM;IG+2CR)Ka
zDS(E5g@%Ta++#%^6nZ05oEO~Y@M4}U<ZF;C(!O#;4VEm3Q-Nfylz$~#RHH0eU=2V`
zK=wN8gluGPFyF%RHI#+ov>~TBDYg^)zRP@wc^S(X^DDeQ$1;hsQ2g{F`~&2)?;$Qs
z4afPEd5ZZ;=I5DbnLl9u70N>UUT6ChexPWG{O{nL_8np_;{V3{0`oAgY5a~C*^65#
z@+3rD=hoVlw+2|vJj`6guVJ2IF7nZt4>A9e<7{SbaEprge&lPUJ`^2HbtEp<LV_8O
z`u*Ftdn2%605<eMJlSJ`ZJ9j~^F?~B{vb|+R@9$oemH64<LYPKJG4M$(@wAwW_O>p
zKasI)`$Q@OJ+bt&pxcVZ6434oL4U|hAKz{DnWrFaW#(MkY2!$rW!iJ-8T|pP-|9<u
zwLv7ANM~$(pA=Ge5NuEO#}d(&e#<taRz7Y%ZAizW39F~wj5hf~$-R9^Gm}46sMoUN
zv2-SBLoAV**Tr!Qs>Gq#0PYM?DOqS~-{<!a40MIsg6&<c2Rjb$33l#3*fG!dv>%eW
zxSv&cADnlHb0Zu1epVx2&T|rBo)dT8Ar43}FGbERktYMpD_s0z=CrT$lM#j%i6fp@
zcbp50#JR_u@|5HMxd?wM@e-bsC_{f5?l{!{g3}K<G3q6bALO|aV(zX_4|DgqdYQZH
zGq4E1#hmhdX>M15yAqe{FtrGODsef^N`Ak%>rk@@Z<M$k$B?+3Pnfy;yjh9Uw?>R}
z5|`tQFA{$THznmS_w#Ov(>F_us}iRly<*&xxE!a5UtARbWnql+J&DV42AI=%<v8F?
zpNeP9Zj>3@k-cJO<Gab5u?8~W?J+YZc)QbS@Y+dd5lP15Rw5(q{ePx9I#VmSzxW0+
z8mBpbXSMKKMztgpLm05UyUdx0@5WMG(mutkuVncOb1pYifNQ)j`N+e)rr!?~)9ruV
zmA8oD_HRN3F>WVe1~=GW<SP{Ju=I}@`8Ns!mbcjOh>MH;W$E6VT<ZBJTN@vY@}T|^
m`H1>ancZhc1SvKY?-yb;#J<jozR89Cd--7t2t$@`|Nj7tYe}8}
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/app_channel.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/app_channel.o
new file mode 100644
index 0000000000000000000000000000000000000000..405bdb39a048848bfff405a9952f31fc3d161772
GIT binary patch
literal 2776
zcmbuA&u<$=6vy9s1GK96)h2005Lv1yN&~TM^CP&IZW<u1)Y3FDQlx;I&1QnF`d8PR
z;K~)T;2(%XkWj?|<rG^8aj4WwsVb;AaI~P}Mp`%^ajHxxmayQx-8b=euun|1J8wQS
z@B7|7&urG-IP+#m(?B*2u0wkyDZr=u+P3MLChUiO&??=iwsfd8X0>WV*J>J+H+JVk
z)n0)0PeM@nQ-@kPWHuiRK=b-hsG#fS+6Qp|uHIk!d=x78^m2W1<HM_4M<GsgJNn@o
z_2i>NxgNp?HS3MpiR$kB$?Agvv)L-$-o`b(gNFWNtMs)O{}(+pifcD0k3TRE%3&8{
ze*}Mx@96p{X@;(tA0NWJ3YeF*1(k(iv)PZ@G&k4-mu>+hb}%m)t5y1T`<8y;&gzyK
zw`x$?(fevYhkAd%v$1*g9<C$5PU|Tz`Cu*Ap9iQI=0yC2sl`c8&iVP@tQt_B@oIPg
znxy$F=B-nn=!bin(R#{tQ!Ce(z@J|jhUVHyE#5dlwfM%%QEIkIH@$k?^)&qYHBeXX
zoAxaCyMX(p*b9ml&I3$MP98T#rrvtnNaS*9J87k|#&XUv+@vrj#_~>XIh97sv6CrR
z*zSrWjCeRU7K=pV;b_blv7F2pT9ISNh=-#F%|s)yS3LEuFFJcYaQ~l93-pdB6F|qm
zPEAK8wLR$pit=zf=nen7z7M$;(2>_*khvTio<G0~%tv@E`8e}a%%$H6=F`lBnd$Hd
z({@Mx2LpAu!c*^J|5SU~o^`1UFLvRdb>Uwkr?_S8scrfle20CfxZii-KOrX_gExxb
z39s!kH<`;i_29UZet#D}ik$S<S?6`u2P>byfTuW{73r`ILq!-`f`Z5{on3K75%QLO
zQMlokUVHWBwmlvJr+9uvtO&@h3THW;d!J-jWfq;MJvZ<d&5DebPv#tvur3P7h>V@T
z4EeO>;<d>XgtMBm1vyRZNj&5}C9=Xv*|Z`MWk%Q{wJLb!*;s;uF%PUfWfjhGmgj66
z?_*HrbT;L(=cFSnSNPlZ6X(eOL_qO$*3M;8+4nfOSIHw>&qG+>;B9%9d7r|Em_MiR
z2=f8tPq0nhnE?0ist*zY9y||o%vF6l-_)K#{il7?dvCK%aq*kD*S=y)-Pbkd>b`C>
zCmnf)3H=@5!TjZUSM`U`pPH&a&7AZP`%Ap{9CKCYoh~|Q=4yTN%t>GVrW9bCxvKvK
zb2ZOv0i9r-AzZkeajiw{UB~Z}(sD%F3gfMFA-rU{7K9fI1qkC=%ZRKS*z5l>4Rof|
z9#uq49{<33%jw{mA~t{zoo^GLV2iNeNXVx&Bq{klm$e*buKs80Wk27${Z`U}7g<yF
zKf?a!+peA^<4YVxgEZwmlU(}GOTfL1AM87&T4b2#{xS4_93L59?tecrHFpa28-Fw=
YWgvpsl%aQLJNeIXpyR&V-dpwm7vnj200000
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/app_handler.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/app_handler.o
new file mode 100644
index 0000000000000000000000000000000000000000..6dd74f2cc5b9b2a13d70422255f66645a2332b82
GIT binary patch
literal 2224
zcmd6oOKTHR6vt08^;yA3ePI<xsnS9_B!NOB3Zt#ILY3MF3JUFXG9g1VnKE-L2^9=}
zf~2_c3kbS%rwh^ILR<^F_9H0W*hQ@8B<CjA>C}xIPr3Zh{oQlVeVt4nU!S~@Oe8>B
z0$xL>Cn>=9T^-+Sx+ZkPerT+|f7#HWj_7HtRo6&=ZEc-6t7~5xtM8iQ8{M$k15jH?
zn%Qp&7<Q6S-;I4-tA_El=Q`9s0@Tl8!+yOBs?!=&KR>xpou+&`_7{?n-RL$q8>=5)
ztZVaMk%P6oO!EKP_~_^*y?^}noIdOOMY~|RB|Yy4x+pmM)uH9U&$~tR0=wV}#}+Gr
zqi2oGP$rem8tIJQZw1~EdZ~c{;znAhk#s6E{P&~M+jYT@t+*&H_GJMy{EIUUGezxS
z6Kt=LBgm6V{?p1t4V2<xeyXWE@$KuL!T5x-AGw1*=6gBs!ajCTG{6drSZm$w{0hb;
zlz1viX&UU2Zd>QjJJjxV9A^ja?ZC^(&*REED%pdUKovDEKNb9Z!7Am7PGH#3S0*rP
zg-g(v12?=`as~L|OeLIWJ|ir9>Do#@?*xAi&?M$zB@~W#*K!3$2ZB=G!g_^=6f@=&
ztqP%L?lPg#z_EmbvBI@^zw-Wj@nO_`AK-D~huJ4Ns&J|uX@l(aV7yudDdxu`e1!S2
z2*0f4k$WIyDqMZlF@-1DCz)iQ@~e5K6t3o(Rk)fb$DHm#o}EyUdGuUhgcVO%i>M-K
zX+e4czK9{5vH&Az2@8zHFa#s;sYBsuV+0J__L|uCJ<ll#Ugn=g#|(G`<(JY*X|@C&
zu}V>Efmkm#dRG&hY7_j}Q<NNy>WN%gS0@RgUBpH_`o(%ngE7YG+9QMLQO@Z6b&e<~
z-w#4^eIAB1I+Qab0qZ&|AEP}g=gWPVI1;!2Pdua6p4oEbe2FK}q51OnAo)FB;JyT`
za$Qx`x|HE>IN&EMT?4(HTwmTl@#x)Aj#muVsH2!%S0efb#La)k{|fHNK-TE|--pt!
AhyVZp
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/attitude_pid_controller.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/attitude_pid_controller.o
new file mode 100644
index 0000000000000000000000000000000000000000..afa9e029952886e02031e66b1a178026c99a6c6d
GIT binary patch
literal 9456
zcmeHMZ)jB66~8kRb-IchHU44U#y9F}Y&9lsg`_O>MU8(zY8c(t;<m|bX52}e$%L1e
z)ifV=WN8ulVI$p^KtD8F3LV8lJ`@_--IA4U8>p0gXcwV{ozi{?B4t~(Yd(bZ{N6h!
zb8<5eSNcilmGRv3d%ycT=bn4-yf-gzbe=vQkHw6%nE9otdV(4==v4b|&~?p5v%xHk
zzI%NkVXoaj8@t|M%vdSzw)d<zhc{9GlkH~y$Q$MKrMNrq7R%{6*J+&FVHT2PSI_Qk
z>@<5D6Jt(e%#_kG>K~y`C9(B}sWZ<$yb!-mVcve7#zG?)-w}=jzdBaNZ3)I<Ob79Y
zX`J~+Iep~C@27v#QuY$0`2y+Jkp{*i7Gm~LE|tXQ8^{M^GZ(*`e#b3)$it!Q%dssA
z`(gV1EO?ujFyx9jF2zTj)w3@Iu~v~zygt<!tKY@(C|8Pw96ud@bHGO(dMLl14}azj
z(OASl9VAX7h|?UzK@BU3O~JTIg5r(s3Fd-)rGMr1avB_&=iCl=!J*nbyl~`tDQ?<7
z+3wEYKihGAVf2IYbfWvi9ZurUl=ql1ZoBvkqrX~Of2{d~MEnNU9czA%)_NV)7d4*S
zTUR(mwoIS92Uit7NA`R4!8-pZVQxH3#BKy@PjxBLywFckE~pc<V#Mts{QbCjPk68{
zVZtk2ET@z0`x+;RgSD+sr5b-8H|I(;PeXpP-DyPKOrS5dq4|@KJ%L!5JLY|lYB9I>
zSmEx$&H~lqy|50y3+hn1I2GvCr<}&`EG$;__t88T7q_BL@>v-D^|Jc-sLNJemqg(t
z&FwmU?jEeG)@75KuOu3H{ThN=lqgT+7@Pia`fnf6-dlVtox(hwRO7msIcEs3d^F_+
zb0;jjhA`9CXkId#u-9-tuf)x@9@25@%t){oNDme@be~ZFA9YoI)D_yOrIUnqwZ6gn
zJfZdnm=EXvHt9ax<j$AYn-Q$Ty{%ZAqqH{13JasZ4c26O@vV)&r`p3lVEY%cykF<Z
zHegL`e_`}D;rgsK^Vq*V*dJ7rPh;<|b>|mGZ<UE3XhT0i8okC`%hkCf*`zztyUrb1
zWz5KK`W&SX&JFR+U|+V|%lJ9;(Y#`RfA_Zr+4ix`63_3=;{rGK`z${z{z&Fhzz!_2
z0!vqi{NiA@3W{#V_xt?eY>>m!bq$hekXLco@8SUBpR)X8?1%YP2Q2wKV9DnJ$gj!{
z^Ce&8gZ#-Cd2@y1*k+9lu>Z8<rHFa`zYbwxqUx|ZqHa$+{-pciX`gRY{!w)>CypNd
zqSJKZ%P%|UipBoke5P-}xmffZKc90t4h(w5i+%mn^Lq1rey-Oa_Hs^p^PvNWT3Xwi
zTMs!+8Lx1FdM*3*0dH<~aHX~7(BX&;#W0?k>&(9vYq1hFpQw#V(7#$OK}vSp9sr24
zvLy`NVXTG+1rv#{)K3vRrs7JZCdT8CqbBx6>Vq#zf`5r|SvSEkHem#X7q&3Zl{jty
zF~v_xLWCzwl1EofsIwCPdZ1Iqm+L%J72sZ|vl1@^I#qnR&bkPlmH3;1P8DCSvwnrn
z4+z<)_Rl@8!%f2LSFnw_Mc4-O??svMdFK2vf{%xhTKvC9;Qx%!iBn#+be@U8H$~vj
z5svwOOcqTl)ylYRzy`kl6|%MJkd43xBJgh$j<^mV$rAZ!KVp1>H@f6=D?;ZF%%8OQ
z_ZgpN{A4I^HqZe<+<HF3yBRm~92PvZ^%e(wJbC53=3cY=ve}(AeM6@P`uyPe?98w~
zIP8ayirlBiD(-c6_ZMFq3RFbWC@gpe?d~4Tc$vZqmO=xb2pnBXC&;1u#OX6fI!<?=
zIez?X=eh249Y;=gcH;>*O)01GkW2l5Nwy0Qv;uxDb4j{qbN;CTKlhrK=|A09pqcS_
z*kBAg#9t~*HHmY%A-@KEwCH*C4d1~}xm~A@L4x8O%MJB;IXqiuUmnbIeuQ^=UeSvd
zLZ%Q|S%q|NDCc9cR;&Pz;s=w`10r-g`ul4~J(2S}=mwVYiyp5v?H$>lIA6Tgf*mDi
zWQ&Dw<NXGHc#jDI*@x|fKhGSPSGd2O@Xso|hx_1%-=QHe#<<NNSNt8^hq=vtn_p45
z!+n?s+y~#`K8$>?+Bp4A4jS@Ih27x)HpcC^FDd>`#m`6ZFDw2o#h-}a-&DAx_)`)1
zOay+1aeIB`d(_?!4<h*M_=auohi#18b?agrb=#xz?@{<(g=dw{PK94qe64d;;aX=>
z>F7GYtN2Yy|F*)l&VK&Bx98i!xV`^-7`Nv;sBo=cRyz7z++^Hdmr2GqQ$6+homTp~
zKC=qfag#h4`Rntwj&WQ6dB*K|?N_+g&qnCTebTPyPnmD;pEBdP?|)vcm)t*XonI)O
zor*sdp>vyYTW413q?FE|7)Kp+K6eyf$Ng&rzoPiNls>&P3!1Gzr}+B&_Fe@4W5w6|
z>Olnmk>cz9P{+?5cKzjf#NM9`%(wTCJa6Jp33!?>h0`<+Tfxih%h?2;B20K~7JrI;
zSK;9AX1`0}h&#jnd4+>7@$w1>{|@_u3dj07?3dU|{&VbKRXF&P&$z;&|A_qwg@Z5o
zOe!3Fxo=G=9Q(&%e@5ZpZ;OS%tir*Ud@2eDzlr%W56laE$w%^)`Hu1Uq@}~|QeMI@
z^99iZj{WQ~-o{q=GEZ0G;7k5p3P=7k?4MUS_!2L#aPaT2Kd5k=7l-{4TghjR{i_NG
zU-B7OIP@Q}KcR5&C7(%!gI{ZXaULD!&9IexYOOE$l266r*IHljB_GLG^rbFIOQ*!X
zW8wAeiym}Rgwfv?g4V`X^tZ9^Dja;lyA+Q4IP9NSIQa6Nm{&OXl84L#adEyRpOVFw
z{H`h-e932A;m|+H{)EE8mwYA_4!-0)rEr`t$!A94;P<dUt8nlopNhi4&$B<LaPTFc
zM+ygjjQymAv%6GpS+9D&(4_d#mi*fk4t>efRXF&9cPSivhyC*k2Ve4+`AI&K$Drcl
zd`Uhfg+pKRyQ*;TC7*GHgMX6!35A0%`AjMte93!C;W%HC&y2#s?_qyd;owU?6@`PJ
zXMaxN;7dM_6b`=B#WW9%6#UGqWPLBRdFgq%{!Fu<yX>20`n8)e&94p(nP#sD2lUqF
zHgZ9tR|U=VtGN1?q2;iL-^w8ryc(#*tzHP(y~RQyH{f&H|FdyOfsVL(GZ;#`p)p^u
zUWL{(E(X7G>*(VOz;<>+*tv|NQhSy@h?9gvP1b7<^?@e<s^(j9<r28M?I#DCQR5|^
zjEPH!Z7W%59<uPu93St=bQ3*+JLw|&cKk`6x7?pZL&l5mQm0n^PI7@N90>J;q>PvP
zy+T;6_)}}>0=37*|0;26#cz5p7;bcY#J1xX39A)<nu(8#|ILW_Nj{)DKHe7F@vlb2
zpZN@3p!T@<ZxW~0{O9;(jE;|YL3aFc!Z809`sg;xueL8}kovrw%dEX8F{EW}I53ao
ssNvjUN$mKTroHzFGUM1V)DBzX5<k3(cg(fN&)`dv+B>0H`rjV^U$wo;9{>OV
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi055_accel.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi055_accel.o
new file mode 100644
index 0000000000000000000000000000000000000000..adb015efdc98f5a0e053268219b16160a3b1221f
GIT binary patch
literal 8456
zcmb_ieQZ<L6+iYfA%zT5$3O@negVd4S|T9viZ`^rB=k$#rY^YMR4T>Bgpw8rN!%?d
zNSHR2klIN^jkHOvL>PgV{Dn4e?MhqHj(%+Gq->$xhmdNMKr5}?=m>?h1n+m=yEi_0
ziBUD}NzT3Rch5cdeBXPYvhU9C-sSapNIxEWiE?imB|1=%>sxl$qB(REP3(F7_=G_{
zm*&#=CBqna(xBAVLTh{@+F9k~j}}?uX)mRs#nyNq+HHO-+^~WC=M2xlVOqQ{I>!os
z=%cnuda5i*cYKgBsLG^d;}*X)UQ<pb7O;I@Y6Ir)@FvUBMoHDBxz_l^o;P0{G@3pr
z0sdt+yC`TH@AGeY0i`DPyz0ob$#Z-RGF^!q$4glj$d&X#KFG8YEz3k`FK_l9zXEw4
zfLy@BLC8}_6e(Roe(-PnF;S?PD9}C68jpEP=Z+W)tIm0Ao=!scjsm)w<z4_;S?(tx
zcNFg*dTSo-s38CL>)A-iL!rx?>yH!0FKwzjekI;;d}7aOTYg}+{Fv)!nyb)-G1iUs
z(YlO4zIx2RTtefQM__O0b_v*+K?50M!2tP^joA+Bf@^vSvP2CE?e|*Y^oSMSZ&2+W
ztdox-Pt3Ez)Vb7O=c^lTprxCr&{IX7<$fZgYV;#3d{_C#;X4cKhewPOn{RrA!n`i?
z@7_`F@1}yP{^;VG(T^ys*J7P6m#|M9o$NIN75)aSQAfc|%$o@7zy}{ezdq=9N%^eu
zrleoTP-Y*6(;iBVKqq2fq0jMSam&6!y9}~`t|#e*OiEWB3v9Ou5ets}UYm@C>?sN-
z;qOa|zsWHGpQaJ3QTVM7E$eNsaf*7t&t4-~PVKeejrAkZ^!~<u3n?6(M_p+nP{q1W
z?D?JT%k(KL906VMW25a2`28^Yh}VIb*RfRqe(3|x7}hcoBcDRn0BHUtWS-dL$eTS$
zVV2jL1$ph<a%>V+GTX9)k1hK`#B4FO`F`H;IC3l^bug8kScgiCHG_6?{3P}8_$cJ=
z-@c?~6l=0gIlnlDv|drj$k;W=X{!D>`lR}wtNs|;y1ATxIh#XgKgX#Ff0{Q@%H(=b
zh?eUC+Cv4_f6zw2t1(4%d&(%hUE0(vx5C;MWYP~fhM-H^J+oO)PtI3D&rAVDSSP6`
zVZ6BldKS~9o~&c)+Wc>7{?R#3J>ZxaR56j{w#*724kjDDMOYuX(?p&}e5Ln1UWt5~
zTm$iv_T=JaKieAfcsv6;b4>BLZR?_`GDv;drh~9!AKKT^M$w)`YodKcwJ)Ky=};qh
zJcW0Tb^dvY4r=??lhu_y;(httChCfbIAXi8KM1kJ{$O3%AFS(}kTY|HdMva$zf9DU
zbDIXcGCv&b8r?kD)kM^W8h&&9#1m!ly}pt=@V*T1^(Xe1)#E+xrLIH3_5-Ut(Op&v
zY)b)Tm_uDo?RN5ob;uW2SCmc@drnT~Z)_9iu4mxN5*ojP9A+K*?sasCatj?yw2Sad
z7a%7}sV!PckpuH65-dW01=;}i8u*55{^g*jXEKIRL(_<nY|vxp0Ox9I1J!a(zOsb#
zOy~MrPOb;IrcdWF=;9H$o(-MHp7;53UW;q$LOW(hgLPr1Jw`!)KT*w5s_=IwmfH2T
zn`TvwF3-s^_GLD74z-+R^KPWtCe-pb?sa01Yk$;me8n>Nevu7jz?-p3s#uo+pUD`-
z+U!%Ni;QPO8fU)DXHf8oT!q}&-!u)&&EqV0KULIBk?(V?3Ek4hqJhZu?9XieHnw1Z
z=QDph{&|mj*4d+&ruK3+#Qc~y)75j1fQIdL0d=Z7QQ<#Y+%U}cxbO{6nAe=^p#bN<
zxeUHEsqHXo$4q{3`|`|Z`TfAO{Zu|hr^v<W_OYaW{+$h_;S>4}h0@Rgc3qct*;>+{
z`IK!m)gIE`XFhT4t!=^f%Gn#WS;Rx)pI95VW}9D~aO|z)^a11z_LRn%V)m=psrTa>
z+v%&sYvO`q8#|X)Q>}fTsui`;6|-ZbGG>E$V>UH1-6zt9sdG1q+29l#Ml!jWeL>kU
zmClCX$Aj!AmfeT?spCJ%v3o0GP{!|v+0X?Mzgu8;rW-~4o^P}|-wu$!8}WO()K_)X
zH~1j?@cgsB&IfUpoXHpN+EIJf$q#q!;QV0Pekz-yQ|ceNI+4X%zxcXSD`Kl=t`)U^
zmv%49Yxl9g=4|zlvQ-3_wvDbI$yu)a{=kVP9rqm5eV}2R^}{aj>|X3YR(|L3h2ny$
zqlI<DZzszArwe^mocHb;cxD*9P!n{1aIN6=xPBa?GXK$lHQXItoU5Ox7x1NB>rBw<
zGndYjXRc=#&Ex|@j@xmo<_3oH=L6Foqow{AP{X@%hUT;JG1PIc=T0r3UB#Hp-QGXt
ze6(zl^3Rey{&`ROXK8-_{9(E;WL}K@{ziGRbV>~MzMJ!P=9*Jm#@=!BUpSEFd=NG1
z%-fiUxJ)m9BOF^;dV6JH<1oRWKHM)jPB;eG|2%ILxuty*cndL(bCUKe)0pg6!CU(*
z2%oXPXUYeshELU{_RXBF?R=Q$*gG?SW_zawrM)Syy%VS0_L#bNCSG^)R_6!n#{S^_
zlw(8c7I-aZ@28Z#6R%=E>W9pmB-<NybJw82N%$7$T5Z2Au%Bhy7&+!s=L(!z?R-N0
z`nIz__<4W$<3x5*PR0cTrrh6Nc5J~|B{?<uIoLlR{h8lLdgt76?neB7E$N-uz8A9P
z<^L;5@6@XIZy-<Pmy+J`<xjysg)^s)r>7ww?@h66He&DL(Z%*2J|BGfUiKu$;j=EE
zkNnaX9K%O%yKA_+5a%=z%ijZkefG}YO275+UDLj&6V5m4%*|(QK6B$+h<)Zp+kxL0
z&fHJHcNrrvV5)lr-%m_@JHR)FKO-;xvft}{y7FSv`q(4O*4O)}rzt?6vFz^q1HbcK
zjnCI#pw)K+Zhby{55T>P<yndI^GftrLY@n=(c=7k3@zWs58>?0-*wL8oL!GQSK7ci
z8u#Bre2&Jqkwbir26hDBOBxW<M~ZXb1N43T5YA_WJJO*Q4lQAC<+E${QKq%J(lyl8
z2OgO?^>Ezso(3BG`-SGw5B+(KdLlos(?CJ|DrQ~}=fXbRyP<cZp6{JOF18D=orWA4
zWvATt7Ipu|-8;tqv+v%XflAm4-%(OA+zsov#ogP3HVxlR#w_lDCSpVDkR+;=_Z@vF
z)%QWB?Jgz1zIU^~B|Xc@?-!Mf{G9;2C!f0;8op(&y8HY0n~~Pm9r5k4mR;ty)^;<o
zz1gf=y}P}2Tgwjg+T+_>63y|%W9`jmxO&~{b!*m!tJkhGSH;?Qu10UoEw?aUz1HNB
zwQJV#At>L&-v)j3S$3vzgLriMV~{Z&1Y&@b`@wfMJk$A<0QCZos-d$so%6?_S>ny<
zuC$x!IKu`NI7H&_E$H(H9{n6p9o%hg{GfV&Pqp_e+`@&M9|WEK?8IN@)2Hwk6~0g5
z_bF2hD*QQx7b{bADiK~$_(7$DUUx|0QKiC(IS!*wG@qND_g<&L=RHTB6ACX^{Ff_y
z$nOyLDSFznvt>;v)D(-yn|D;lX+<Y>G$)!`b|sp2x9n<)x9-~3@-VH~s_7oapiSG<
z-u!TfMtRC~)ImC0w<SOf5>4&kExTGKk=*><tv_jQZ`#?qwOLc=#yXmJb+oo?nUvr;
zfwsmHvFVdo6Q#wp89dgJh$SAIqKGZ4QU?^8rG$6H67lV9Bs!?<y9BLrjcwU$0-vjG
zjdrh!6Q-9q>Wcli`K(g$!+4S4(=Twj?vTJG|7TRZx%s~=a7kaR;?PaMLEw^J$88DZ
zoGs*hUeR+LO8l(gBjrD%;@rJ%shaG@9}>8f=YYT^{}Te2^g{xd^w$I~>1zvT_7}cw
z+K*e#A%ROi7X>cY#kbQ*K9b%NxTN19a7q8Jz$JZ=dSN*w{RV+c`mF+&^xXoN^tw*D
z`41@~9VbeCI;(IUCmJ8i!#|>gaND_C;8M<%z@?mL1up3WD%srpqj~V>1upsgP2h6f
zRbQLgzY&2;`n>{|{GS)Nq<>f7lAh+})|K?@1up3y%7gdj!A}cZ^8ZBOl7G?sJn{%!
z(sv46@*m2BlXJizw;$K!!J~QbgL!bD+GpKy{v&})Ig8Z(%k+xGHo$EPcjv`=g}d|O
zKEX%YXRp8||NcC9fDc-D-1fOg;F3R8cXaJc#I~SKv^(u~-D_{&5vxu#cP6OX-ixcZ
zbaYU4d#m#jZ{4}G89V0x=P|(sCY*M%vw-olTgmUdkq!g>N=wk=t<Rc7oX&mf#C=ii
zLtOrO9bJz~75z$utL;{yL?>M9>H+2<pWE=lJpb4EYcZF3s$&Cs&ZF0#;xi0s`86GX
zkm31jG@#m(O8(6*T+1(8_u4$AG~i6Ust9>qj(@$rwjXaxZryoi@k0I!zvzXWS6f!q
VwHuD@ndV#S{}$>cG5Ric^k0>jklz3R
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi055_gyro.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi055_gyro.o
new file mode 100644
index 0000000000000000000000000000000000000000..22be17d4676a572d895b71fc48949915942fdba8
GIT binary patch
literal 3008
zcmb_d-)~e!6h6DRl>Q)s+ZwSn=|Bi6tKGDPiq{YsK;^~oP*z_s>2BNGc9XVC?_MLD
zKJ=oP_(&7pT>>W1__#(%6$%>TKOphJ#9b)HH>2CA8>#De?wwhNWqDC2X}>eyoSFH~
zH|MrXuf6elG!h{_BJ>$OoN1Owwi|H}O6s6?+FZPGZPTLVN+(q-mbLP}Ma9WBS$!3_
zrI%u<ZL(U5QZcndRtvzXn6!@{rr2F8vT})@8%{kX?H^lcVK;ry<I|BlWsBm1{L%54
ztRCp4E(vZaN(<m(xv1Y$vby4xPFdYtynS`e8oSd4{;yi?**;-?$3M;Vw6G3n642y8
z&;2LpIkyvebv@^M3jc$i-R*u%Ybr01U5Zfgo<%DJJw9UgM>4`67+>6j+L5>HNBvRQ
ze39URu9Z;hrcrBH@0X$fry|#CH_4VQRII4;OQ;w1R11voGX=b7b*%(<+@xik7u?a;
zOYT9OT_Q>@#VEfNhfb?IUO9F2+UDX{fzRce(oQ1h$YEM2|6NPs9ahq<WV6O@Xe{8Y
zH0}`a>=$V4MlR##VyLgSN;c~gt<V?rO6WledIOD&tdVh#wENm<;i^T+y53b<7RnRW
zdk$-y*V5vT_Mv}#Xy-la+x^&j*ZH3NtJ40d(;uzxN4>oNV`}X<Pg~;a(8AiemqL%j
zI#bZi+yiJQ6;}}p75}dI4Iuk}tAmQV#tPm5Uc@TsZGrbqwNX*veFY=lx3ratAGONg
zfJvM^S|mE;S#5_*pGCj4wO6Qf;oDaBAQHYAJRrk^OITY+oo0=^?!={iWg8vPHFA9$
z54OLk&rNlp_f&64)f>dP55Di9g_#E5OOc0taw|$n2YGyF8J==4@jC0c()Q?`W?k&%
zH}I?g{2G`7-cq;*6qw&oxC-Qa{=TC`7qq{}Nakyoqo3bBMfpq6tNV!kVZSB5YxbKM
z;rAN8r`yn1zD&y!$nVWwq#`s@J}vWipO@Fu9h4uB()I9fO4tK@x9$Pf#WD8)^M3@0
zlfrT0`0<xT|A~`tiexrBJ28{a%!{e4E4&#;93430W~VZ<h}?;pjOR>v@3@Yz6T<_;
zgF|*=Xjt^8-MIlogZuY0pBNInGBh|mqAz$7^55td`nA?<-NGM|X2ZfGHyajCY8=}G
z;z{RhX-ubBz&y?~ZBgrE`Okof89F~y8F9s5P;<>6QM^!+@BszmEyeqaFN8ErD_)?1
zc>E9oy$1~LRaT^oeaxqn6&F=Ljn8EUM@Gh`^KLdVL3_{A-pM-WcmY4=I@38#=9-bb
zdn}io@{o!Iog2`Z`AnUtZ$6WK*Kx<@vXhR^tuN)A`CQf=o5;>jWv2D&w7zvR?WI}z
z+p4Zzzz$staLwS2f9Zs8CK#OGY2=?Vcr*VCgE!Cjl&^e_nO`t?Gyi9UH}kvIJ2dLo
z@6(0z&90hN`MnMNC&oGE`IN}z=e+bd&~rna(UI%SrW2lX)}usVXJR~;qlB9cCllGZ
zIcMH8Jo+!8z-CB(q!vC;@-K`Hr9Yez?a+b3T|iEeYOdk?tzjhia15Su*v1o#ogvUZ
zAoJ=O6iall`KKJ@){_vtfFC~d-|ip6UcO(o6QXdur0zH0m{+uZl@|OH=lz44Q22`4
zf4YI^TplJi-p%U;wcl5Xd@uKpzF+&tTx0E^NGSh5<%u!$y_$L&L9_jTs*8^4M1_s}
F{{hjZSc3on
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_accel.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_accel.o
new file mode 100644
index 0000000000000000000000000000000000000000..1443f6724a4db006f18a1c55662478f6e6f54fda
GIT binary patch
literal 6816
zcmbVQZA=`;8Gd*7u!(UT=lC$j1Qu*X@zqAy#*(+T!h+K{m8wVv8m0CRIF7>*z`)%(
z_>5bYh9p0lN+w0A)IY`zR>MWAtO}`dn}l=hL{%GAQLI}1(aLu=PNb?;li0+*#AN%t
zyECv^L)3PqWoDn5dEaN=ubE@yJKuX;RTPqsLcgV@FNqTArAvL&>6)~L?jxn#%$*^c
zA>GVX5`CK4aJnq5wO-N5YT|Zb_^s&$jmGoJDR{G4nZBuMsrkd|^i%sN7%4K1jxsZM
zQPm3C_L(o!J{qUmlP}v5{ZG99F^y(2T4CyzrldZy?Vn>jc1ER^&Y)>Tu>Kn4o}rC9
z+t!%I)c_4v(eq^%)nB1<D#YC2Qwr71V~$GJhaDxRF-B^^nLl>y8GWXDPh)__uU1$0
zJYm}{vzT+UxnX+#aO3pC@Wt1dccrfVg<r|P3ViHYGBV(Fvw(8^eN&^9T59Hg3G8j~
zQ^2o5qm~Zv%g)mHb#Sl7Ji>b#{N`YrjuJ9pz6qWi#$M)TO+zC(6(t&P*D+VInkMtf
zXkSOk4wa0yYBFvXn7MYMWJXg$k{|aOm*1nz2j91CdxPZ8?Huf_1!(35Y#0XD)$jw`
z7CdJbhG(bu!%pm<j21}!)U|PN7Jghs)YMUGo_LQa_}=={WiP;%FRV9>Yg%3^TS`GI
zANGXrUAw>N*uAoxVwu&a%P3LNyfA#hv7<K@n9suS@0@tZ_A9UtIrh07(WdX9Z#{rL
zAV%zd#jxXehZM(Fh2Y4XmCa^Ohkq{<)gdlI?6cdE{qWg)j;`BrmRah=S618L$kq$2
zruh+NJhz#0pAReJZ2Ka}%O@&QUNwy(Dhg%nA2-ESrJz#Z)f0b|f|~>I;g9l~qrryD
z8w<@G%Va-hwc=D8<joB$#*Gn|8^`2@1-oTwPD#qb9M;2Q*}Ha&3OziY241y!*H0Y(
z1LGK7PJcDlY=J&r<K4#`Y~rki9oQ!6pw-0oSkyhFjGK9`?(9&55m$>sag{<G*SxPb
zb>mL9S3P1eu3BZ%hB?TSHk9$sv3^0Jnd^v~D#Q)PJjXlxf%83sxKcz;W{6t6vB+~|
zTsn3`E||ciP0oB}w`39bn-N>pfriUf>l-ge5bN!$$Ox}-<NaSEj{g@vfB(v@5&sRJ
zwq^JrADvwL%#%Y>KgVSquYpb24%}B@mr>Ya7J3m=u}Rn=qZK)EDfhqSJ}W5e0M~>x
zVtfv^Wn1u?QP_g*6|Qz;`xB3D&X@Em&QmvM*p_Y$r4;K9=h4h0bgPh~<WWlz>WHP%
zIM-Lssa#KB`q;y!p{zBHp=#53w!$>(skq0)+{qF;h&mZW&JN}y-t9FsxOEM+@cNC=
zvjO?N2kjTg9oEZx$ZBON%6I+9I#K?e`4ljXN-F7TTSYBb*U?}%Y9Pm)8nBu;-f}&U
zO=mP!*u~9NmdO~`2iDyMPV=Z~2Jlk6*I)+?97bqE&zUdm7O7(rvU!|2-oPBr?InK2
zDc!>_tDwG)G#LKzu|!31j7matB8Pb|@MFsa_WlZDknLWt(I6F=Cobe{XD@Oee}+!B
zk>r!UW4ExKa$0HV0>+pZ^ZO0@Qa9U;?Z>v8T1UI))|Bt^>dwyFjvY6k?ia5m<8`cM
z4vzm(r}>QGTFGZlyHmH_Gqno7cg`G~BODj(|9GisSStIYuxAqZE|qqZ1zR^$GW#lx
zH$n#2S&lzmI|>{9jN=}))O)_LF8*f!jKHS~d^zdFH_jc*mGONOa{uAsd%?qRx!Qpo
zb85$D3r?;EM^ySWi!(#TdDBYDGi~7W4s<hDQ}xsg=*}KClh?jwo=1&HwySjBUvrr2
z!tn2%^F`(f<(uchyN)2!<^8U6R`8v|$vfMg;rdpE7P*^xU+}6#jkJ)PoJ;e2`CKVN
z{1?0DxwpO}ciL3*d?rA3yoTc_v$p~HUA8l`S25%oUQc4(DDFHQlf|gvqmDg_Qon{?
z#9^=%GBU6M%XH(mD0O=i<!;w2<9rsdj?ZzAxbmd(U`8tm5&X#U%XYiH$;?fvs#EXZ
zg-<vKFQRq%R5*P8hVQxh2JmvvN9M(HIvY*n#p4yhck>%BUqVg35y%UjJ^oN|DnAgq
zL=Wwnt9Q>H=E!<*A9G@K3u?&1@Y{~fneW^P8Q?O*^+}%ZS=7j9-TgUvHU_y|8^)Y-
zT*aN{9mglx5pr^QQp6|g;xSn#I3Hv^W?eR7k9E0clY$&`>mrZA4>LayI^lokd}28=
zZW}Sji81hyHq7$5gmYP4-&LV}(pi!Dm1$JfKGduinFV}SE2JN+y!*gl75chml>sXx
zYOkO`V<nmG6>TcL#W5*u!+a6frzGb_GL!b}WLyJp=J-wAL*Kx?U2rGO$NhEFV9wXE
zhpK(+n{}NKA6f{!oLu=gd?tNm!%xWl#q&J?KXN{t5oh}v=;!-O8n%=E;c?lQzG8n*
z-oKcqj=wk$W&Kjg0`{g8AFzdC@1pZ|4<+rrXoo4OApYH4b?+JTg_Ogc-E+?<OnrRU
z<wA&Y&f$67$rgq$IWgmMa{CeRYqUn;d#+uDsYnIx6hTU|fBDYG828(8)}r<WE!39@
zRSB6?e<h2tN!-18oX2$B3n%Z|yTh1kt#$8NnTv!RbY-wS?(1R=#|O@Z5Pj)ebN${m
z1b(b%E|O02I>q5ZA&!X~@pSU~k#zDj(cswB*rAVy(n;LM2hUDDf9QG2E6DVulV=fk
zBfuh4&mH<`IGwc7pPPE|PzMDH#xPciZ<?|WT}69w>V-oZX$APbRLDNj19Y(QcxAIv
zj^9%F?bCQNuaJIdHGO>2YU+H{YC602ow8B9?RZ~3Nt>$h^4bwv-GjI<H1WM9ec%Lm
z7Y5RgpV$VUOsJ@J!Y;fY_7ASt&N=Z4Vy@1%ce4#=an7(kb=dnBaM-|k4(#9mZT*o0
zPkvu->F@82bcMT*>Ye>DJ<%1_8@3O``a8RO(Thd8x)aez;#e%I8#Oz(@2uTn)a=-)
zKN61hZAY(m>sH2VcIZ5^qju+RsbHB_0T!T7VY+)C4S}}Y13NAU0}b4RuXm7p<)C1Y
z>XEN|R%(>z`Et8kon|HcUcK8eU-9tq&d><I>U_^$d<U^Y7x){ZJt**u_?{7MMBtNR
zYcC0$lZ@rmBFXuY<1eGn_y@vta{f7iw+VvBc@dsJ;N|%lfhQc4C?oJTVTwCK|CbV9
z?M{5nZD<3=S<ZU=(BsE){t|5$_$h(+3OU~uIR2^OJiTImRNw;wm-3$zxL)8+JSFD;
zLg42F-X-uEIe)DSlnXmidtZ0$o;|JMNF>@@6QM1~>FBZE-qwLctToaVjr7zEgky=C
zTH4Y<&Yadr=aJS(|3Ff%JQ7W~t6O8yBXNnkbGwgrCnOSIcHU47IR$w~JG+mxa-PZQ
zOJbw3SbwZFo(Lz7Es9?n{W|WdjrVsZzy=znv?b+z(Qw?+ckj?Z|4=m6+SlK)42h0#
zB7E<P?xP98U5*I?L*0o;7Y`+3{k?LGNyno{<Je6i+BXo5VMnpA>5`+}eT(oC^LVtk
zGZBq1?g;`=rTT>N7e`(H*1_NWY(gts?tDKc@ItiS+<Zdd#Xh`C;N?CXXS(yS{B>^E
z`Fm~!{O$^PsmM#eoVpe8ffeux5ANOXHnB;+9o}34-y`zd&*vq9`|Wm0;C{P(umXO|
zBj3wYmPWsv2~jfr{L>!XYybBJ?w50G1$>{VTmJn%A#lH(mjv#&!-T*~d~x!|3i2<l
zFuzUIMgM;9tbo_vw|pF09^7l^e|m7Q-JTZp)o+JO9^5NO)?K!P*os4Bo2a{-FJ9ad
zxPM>yLa1Nwlm}nDs6fLx56)+~d_M5tWfDYt%Yzqt@WB1<2kZ6Df5d}(=kM|0-uY{V
z5m`>qBcE#G$-YFm9c?1!wq3Fpi}r?V64B!cs&UF{O?x~}HL-s8Bhug37d<M^U9ZUh
zr>|oXsLAwN6k&?qK5q~JbMH-y(`XaATq?{Z$mu;TjBklL!oFrbB21}N%zs$mqC5$d
z=%i1t9AFvVXB$3PrhmO9)(iEEOQe1Y>_CTQit;OAlI#6){p<0M1ZREi;!3ykoX~&R
zhfDt6)~}nFWW@SOG01v3RHc4tKTcOaM?hpf$bX4Gl#1L>hpXs14NqHc{a-~=HF_tb
I?-NJ=0Wi5NSpWb4
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_fifo.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_fifo.o
new file mode 100644
index 0000000000000000000000000000000000000000..672ea0da74bf6e7904622a04315af970c8f4cec5
GIT binary patch
literal 888
zcmbVKy-ve05WX}OlnJpRv6zWgB9;>gsbwLkf-Z;&CI*y*M2XbY$T3oxcm*DTx8S*W
z0yw9(8aZaErSo_9-F-g)ecasL4m=Oc@ZcM^kzoPW9Wrj|7)G!Uu$a#;$#`-9NFF#}
zW@S>XNWle>WlpYxSHX*FiJr*HO6Hk-6FHgDD2P}%qhUnGiKqkg*kq!38WNQWS#+`O
z?ef%ihVb+2%K6R{0QfL)l_T%}!w>s>T32j3eJ-kk(+q$%@3l-)L@72{8c*hH3G^kA
z3DC4@fM&d|^OfwcxdU^88g&PImNvFx6Ly}jrA~2HoPF}R&Gsi-e}*L^v|aV*s8wq+
zwC;#?@YE&IH~qWldd)Ab`_!oJN158I8pj)e14Mi8D#dhzLtSUU^fmDjIxhW{F0{X|
Gt^Wg~mpF(3
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_gyro.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi088_gyro.o
new file mode 100644
index 0000000000000000000000000000000000000000..d7c69cdf22714f309721d182c16fd7273efafe3d
GIT binary patch
literal 4248
zcmbVQUuYcF8vkY{NmCnYoTP1x(Vdi{G1?^wjXF|rlBfj{k#vPhA2yrK=8sLXo7oW?
zbD<M&@m{$1!9qnJgrs`Cn0=0DP{~F`d=L>u!3S}-iHac7lBTfMbp3rZ=WM1E<AVdq
zIp=r2zrXMMPD;-_^7x~wqLBO)dWW`75+ypZcWZBXTZ?v6Eh#Nl=>pLr8CEGmbh&U~
zt~sy8zcI+|=XFifa(x;t4mVk)T`i<D{(qGgH)oa?e$bTMrbg!qkomP-eua*bJ*!ac
z-}RQ+ca-#tT6L~Sw|2R8mKmw0saE<|bDkdhW)?OgEo2w8+2+lemABYW&}YQZzLr0m
zGaoFlk5=fEm&vpgT3p{lB|fiflv5Gc3yA-7_*dY6o+!4y$0`*xrG0beBhPkmna-_h
z4Y`BRA@7IIv+N3DU0t?JmFT6133=S?>Sy-Tbew3~ttE4yi%hnYtRa(aN_!kXpMNTs
z4=_Jk6)iFsi2z4E;EXw99(<0fa&P(^>C51`hNyq2$$I`1BK?#4x#kxYI`SfT^EhiF
zojE&;+I(N-^X7s#kF#BK&E(v1d?(%{U+c$}g(I9R^97!GuOPlzaP?2b(I~hoXpQab
z$9ooJZijZey5x#^b5*y04ZNde&a=+!^>Qq)x&4WQR>?q2m%xFn6|V#?HfP?i)Qsbh
zb$T6rGbHNNqf%_6fl7_w{$-WU4Mr{VjT*}wxDOnZ$vi{qslqk*)hHIPr>O<h>cU>j
ze2C~&qMCKBl2YaNbA9~yKlW<PeZd&_Q?a~N_kzN;_v>DO@4_|oB;tJmzV|_=7ks1c
zr}FRvo~LRz%dz6MEqwwHQXd?8`sbnR?j`f>Yvpc^=R0t5v22-a`*rlp&p3C(_AddB
z=Fu12v#Y2H$J*=liQnV53vOBwANP0zxEW}(%s~}4QG*CLF%VzerKzfVj_2X$=MhT;
z=N`sMox)SFt^aS}1U2P3FoOA@rUlHwfa>@8<v_eEf%sO@<E@CDW8<3gTaZ9az4^cH
z&A)y|rOQS1C}yfZPRcU_i04Dd72lw97FOnv-wC`qvEoT<`r<v-QsO3>9#m;5IAd&^
zYbbk3_7T-tOUU^M;XYXRD~QdDr(9m-7+bNTw{xG0xFVP%7kO@+R2Qyd&NoooqP8!$
z3K`~O9(-KoeiQK((PINO)>5IGj<Bv$LovQ*9hPT3!W^*tY_nBjY#(Nw`C`90_*HR^
zL)SnLUqvrUy`r{1mlym)#^!pnFIS`P0{SQMsAXct^@Fv&U$s(1CsNyql=cGVVh0=g
zysEZuoa|kA54GcU2`lr#GxQbLvlj2jZ<t-=&KTay1DqH4O%Xl^9<$6=r$txk4xOrc
z;8$%o>d5oCD)oOypFnmH@g*S7G4>(GUN1%sF{<qcSs!*<VZ)2N&X4;`wt;z*^(-S7
z<h|(ERmnBB_<vitcIaVn*pPeLubs{FHdjMagn9oN`(WKU$ITgk_W3>82+X{@3w?)r
z$(p)CmuHpVtu^GrZ=I|u%bz_R(a%$3`xV3|^mO*eI?RJgt}b&xkDHvw3cs=5JE!EX
zh`HcA(BobncZoa-e-V2Tad0j&))nqmkxw;IBlFI6;U2(DbywbK<i~MKy*%_}ygwq|
zaDGy*2sy6%h3g0IpX0d~IerTr$PgXt>wC~>JNCp=Ml78kPmU(WCXL~=Z8)PTqvvqO
zP7jZbV`nEv$DCBsdDc!DX0+>YS4XEA?d&qz686Ml>^kngoAGF;!8e^9UEQAb9e*jf
zsiMo}KNHZ1Z?}IMY1=^{8Z3psn>}E=9Sj+%0sDqfZ1dLbcJ2YL1ndVTG(yEfA2*W@
z4MX6LSf3F1yg17he~UbMON9DganE{e=L>;LJO2^*lW0o*n#BE^*t2{_Q1q5}OOzM5
zAp&;={<Xm81^$_^b4lPC{KJL6y!V@EH}2Vf$1WdO6F3b{jCDNlKzwA{PDhh;=rm0}
zJ3b!IICeZano6FEW)ij&?Vv+L#3J$J@JKwF&P-SIQjVt^w^Jk83doXUlVgqqvO7v;
z)58vQA+Sw$B9+L(*W~cFn@sw-lpUW)52fVQh;%TNa1s)%cpaN`JVRq6+pe;y@nI*G
zt$5F*Y)sFDpHt<M=!)R$Ht=|p<PK|<;JpEBu(xUjzAuC~3cMwRw~2mW`*i{PuE4|g
z&k8(j|Cb%?$k7YS-z)kp?Dwd^!}6~QJRHye1in9%*Y7*nuM=d2<ud{g^IR`RH5{k4
z1OATy9;{bBfCqVA6Y~=G+al&A?DwSr&To?ZJ`LbOzn6BvDVm+0a1w)99ot_=<<3rx
zC!$X3v_ny^t)qk4EJc&)iHX#td{3m`zq=Yx<dziaSIk&q*H~MDyiNU$N4gDXE}0d=
z^Lu>Ygy=`M&wix2CLw>Pz(tz~6n}uFU<L6vY$N#Hivx>>^-l=>;7qb!*lZ^-w%Ng#
zflun63}C#K{)4MX@dn9vg`<KH<nnVrNdGeb-N3@Jv!Pc-^V}&NF^Dg8q+5XfnSPV_
Oe}o4;t*u{S{XYPpMYnPQ
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi160.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmi160.o
new file mode 100644
index 0000000000000000000000000000000000000000..e69812c05b50ef7bb06dc94240a50c1efd45c046
GIT binary patch
literal 20784
zcmcgz4RBP~bw2weA%kqM7J-Ej=q(5vHdqz{VQoUglfcHVQ-^@kxQScs>IcLK5G%<w
zDsJ_JSC|y1wPI2yu@e>}1yIw}O_c`nQx=;#_O#O`k?Xh<x2*oKW4nnHAhwLj_B-$1
ztG#;Kb?kPgI|Jvv^X@(W=iFa)-}bTF-7XiYpNqat={JQXdg|`<vuQt?G@GuWS~4dC
z>&SnjmkMrLXMX-!{42|+f@OJB5X18T{w*z}g4<iRRR?@j(1`Z{{%va6UVXvH4dxPc
zZER_(zOALXy5H~yy<Y0t(9&34(-Nr;7@nXjkGc|``WH(L&%g7(#uD<s>TwNro9<}%
zdaAp+@65@o9_ss<$33{*O?BPmj#~LtcjqiT8}6uq=k5x3G~%VY{gBn=GP^eT%&xMP
zRB(hmt^YiS>O3y$y1MV|3FgynxueNzsP39Prsau-f0L@~wmeZ+DmA_T$3*`izL&Yo
z(1R{(OQ4zxEIRi1cT=gy2z+QW6~LHX2EG&QW4I`EA(gtJ+vkq<yz8I`8?iitSJL#D
z)(J(cXeO;;rbVu3;wsDNiq?1>I<65kXHTYS1`HwN=M`PZ?3D5QOgHR~#$B+%9(UAy
z8}v8Bmf-Ub{LP|h&#zN;20=&AGvGsIKU;4}a~e*{uW(Z~1D^HVt>megDbJU{Q|FZ}
z9?UH9K=AR&ToDiP*&jR}66pIpZ2N)ZLE8FOrQ2_b2itZIJFy=U9M|xJg_vPKB#7!>
zlD-%5>585OE|cxqS4ZK0-G0gk)AB*aN)W!D@{N>#mXcrkRgY(mhiP<V9KUusO^5ya
z>)*(nkoxH~20%mc<hHM?wi#mK%kL2jTp!$s$)(8eji^7IPpz<v2l2@<vkduv%vf^h
zcGRC*)Tkz}8EVWkLj$Nyv67;#51O7}Bjp59uTHyVpR4=+(XKBS=g{Ouk7v;1p`oTi
zbMl;<hPKT%Lpi8N8&Lm7QIn3+g355N89MK!Xn=Z)En5HLh=+m(Sz8(wo0F?cXs!ud
zx0|BC`8(WJandt4cyW$7d3E2@cKw+P{1xb^>fJN5Xz1#`?+F>Ux=vn#3{6GgpG!lR
zKjS_*AN=2H^qjm0GQ0&D&K8ru0Xl^%%uqe#SWACZT)L5>7UDO&*$kD|fj6GPXUkrq
zDj!i{tk|49>z+GjDR86i)rTzT(2>h|x&Fm@keTK0f&2#EOFgSwI~J3_1$D2=O;wja
zQ+tx|{jJ6gCogWTIeB&8Ia`kr&-@_M8S@kcM?E(TW}@|`?MutgG`K&%gO>m25+*$L
zFDl)~pxYAgxjdI9FQ=&QB5ZLHxJw=y9P!K>49~W<q*4^Z&~%s}b3B)-_AfC*y>9dL
zc*+db5d7q=88-83hi}i{FuW|6)|7=8td8wn;Exq~g0a2D{#YRaF7(HIxxq2dT$|rG
zXe#=OcEUqd>O1q~?-uw^eTQ9`C%55mEH{7eg**@W&8~ysaRB^23)%X88;5fWyuovY
z-r#x{MPt6+;tAun;n>a+e+;q6{1sic@8!81E5gRHy=ar~g3OEju{_pcu|MWz9ZJzR
zHyA@~{HqpA98*{Kecz5HWly%_r8BT6Y&qg7988@7KNnTSHGM2Mtr5O`#`bMe`(~z6
zRpV!ru7$R){5?jCE616Z^oQQx*`9g5S9_HU|G)Cn2b4d1dtLs(HI`q+G~0dz{!OB$
zTtpmGi8+Zp9a1r_$4}yV5nqLf?Ih+J5t)xK5Ut^uNO}r`dj2(_HgWz3FmK@)WLim$
z2KTv$*eFE4{Zfk&jCH6tB1S~bgIuV0i5waVqfS^1!P^8>JRozO%7+oe64wLvdua)^
zpT)N%;-hq<CmO-?(>a#k1)ivTgAHy9MRMu1ijgGhk=xy~rNNB1_W-&88)my!L~`9L
zM2!^jXWQkw)Ti{}e5ZF)YxFiIc(8t4Pgp;OdOcy=WBxd0cfxZ7`I)*xA;Y9kfTq7R
zkD__kp>9?}esZ;rU_KP7HABW``5pExJNT(T8NnPgyu}Q`mRq>pQOrG^{;+*|h5D48
zC{NTY_6_ULeyz))DwZL6#SE>#gY0oXIjj2C$dYtF6$cT>#C_JAn2TYIi-Wg{i7;q{
zD=EZ2KKxE<jZ+qHctNF#39d~n%Q*B_aug!}S<YH~LwxqpoOJ9BT}ji^Yf+>&gN$qw
zmT@!29N2FCy%ddOE)#|g!&^A+r^l>;I-qoT3qBi1yuO#5b#JBC{3qJ6zC5ngV18<9
zxxsVoPWb&RfE?$K16p&n__oIonRk8~x^ztFklIRJTnkx$whh~bV=R0f{Bt9GvyP(A
z`Jl&I5f^dTKY7dy5o$J(E0{b+p>R3AA$|^GP8#_r`Vh5Rs@<Lier^*90$)MV7LKtG
zYqXAQw2qTKj<BCtCS4w^Q>q#vkAZIu;K#OWTuY&bk0ORKR;yU+$)!F+)5FN4swVKB
z@-gU|9FNeu>BH%oox~U#xg9dDq39i06NP_YlhLW~-9q0yteZygt>JggP@uEeZ}=!!
z@1rQ|yBv8D{xs8Yx7s#iJ@+hv&D_DHLr<1R*&Q)c)d)FkJ;BG;^Y@|WAI;P=to2Kx
zo<txA*P6(u(|W-V)5bHlE88Lk8QIPz`yD=KJ=pI7U(N7(<a!vfyB<DGaxCZLonZ+@
zT`tQ{zMkUOITjITKLaGdS0v=Rlf?TN-V=Z$fN{X{fNCr#rN!;znA?$;{AzAv*9@#{
z&w|ew;*;ZvYfSiBsw)NmIBZ=Cxh&91VtwnJA8aTPeUJlNdN5ym+DAjs>yc69NNTC)
zZ7=4^BhOHu#qY;Fr?~cwH&Pet&U#zdqYk`fhM4XMYEmQS$fG|oLleXBf$0j4UqlS8
zHcvlkxPt-m2A`ZwUB}#X`si#rt=ERR*9yM-i>Uy7PvwB`n8!QFyiGTFw^3JWj6xF{
z@Aw?58Ue2(*HLr~{6@hiVz`1BGfqdq$K>@n_&9Yw<ECFW6`Svb5wEQ4{z{wY+d5BO
zU!5l*FPIneWIacI0bO55EJMF>@E>d3aOx;zU_JY#9F2f%dzR%)26>iXoMbtkh7aD4
z%`q3S^=4Wu3+tzJhh4j#1V7!jqvs*#82s>4GgJ%z)W9zR@&sX{(+?oNM&Up9-57l3
z{LX&rKpR5*L;(%JHo#K3*TPW6r`v17*1Z0pL7pqtBkrk~>Yl@x&iTC@V_-ev^SOn9
zoGXRm{b&x=^@M21z#Jm{IY6vkjKhGK>%<=wYnaPpTzAF%p6k7dae(7tDh?|#$H5wb
zZK3AA^~))0mSLX;Yy0|@kYx!VYAJNtau%_Ev`X+Wc4y|nV~x(ks1iJ6&Te_~-BeZ0
z>gjSP9~Lyj2Q$+oC(R{PWueZpf0AoytsCo)K;dG4H|9J6)I2xVA_1>ENLY^qFo!qt
zD42xas&3nJ1JG1<FxDbAP^U0%4u0odtf!Hq@l8VR)9_n;A@rXIdzTBj4amv%4nHX5
zPVRqya>vUA&3>k7U>?H0EEBdJxtOY}`H-L=?-uk8hV0Kj%S_+t&-emi7mH{u+a^F%
zIRd>c%9HP<^4+&KiSLB9gwrleQ`secbJ{MQ(k{u52pu@S1D2F`uauV|%L~YBXc2#6
zt>*M0<_lFULl68&zD53;70cJ6PE-aEXFPXx%EkSaT;b(ux$c&7nQMhyzX!QSSPtYx
z@_r##m?7i}x9f7H^TKe%msu!ieHgTAqJkFvv7lw$Cuk+I(3+uVKGv+z(;0icm{%Ok
zHBUc;_38nvTl*2K6IiR37Ett@&l}|R>bRb(fwayA$`>~ZIen0`N6MLCh}bk4LTB2U
zS!bu5s4I3YxcZya4Urw_%l2y%w89KQ%V^0=%W1#FEJ5ov(CR^*uw!EL`|E4W7kz)K
z%K^T2zA=Ox$?flt7UmJQPS1fB*STjUJSXAP5+(qhK4P6>R8pz?z<e<6gQu>DI$<ml
zJpL9mCLDgYX<$7u!21c<kLb_$26cLtM(+tpFD~gl4tg=<h8{Oek9i!RQhzVeYOL-3
z16WTDV1MGDu%|J=`xU&mp~Veq$y9B7Q1S>b6f*Az4~|2f2Z0CMVgT{jk9{1Smi4D;
zT6>hda|Nxo3^p`Ds~0--)1ql~5?yIJe<bOciv^uO%s_`_>V+NqsdyS4vm;ICV@kIo
zLFX>e;qmuQ2{%c2n}i!AtO3mEH>?{5cn=F>OMj8WZ}+A7mP@_~ui$$#=w*tfUeN2O
zh12A>+S7DOl>9k@&O*=$*mHQxA4WaoI=&e=7tcxY%r){9-Z`#)5?&`^zJ#*@m2Y`W
z=5a3pTdF#mKn-SD^|c^>=e@l%MA2R<uH^kAXDzbl3|HTqcHH;dXfFiq(u}lU25mJS
zzxa+Ek7a%OcYL!TpHnZaho<eVg;xkWKL1<fG%y!u|2u7PfcFrQw*%OFj?tpZ^RP!I
zJN%uLhvmIR#X`Q|J(xvS6YI;k<_BwuX#Z7>)*DLiIpW)6S!l&)O{ZnZ+&+}0eb_s_
zeOTs8H`+UGYUZb7C5-vAJ!hDkcPrbU^?gRl82*ruad!s!joIScc6{TwX_l}NFsa!f
zULe~2q5S?C$M>Wh7e490$4f-Nk2~;TSx4`b^fm!H^;7#V_L@wNrN5J*ogw#WxLrc(
zx*F{=#i4Fr-lxM6a2?xiKgN0&#uK82l{~K}>M3^4ai+zD<g<YJpoXS8uzvIww;#p2
zAl_hYN#b3_Y%S(Yrrd*M8QIQr&`;U-gUX@$F|Gf?+yZ-VQEL^}#Dud;8+xJvoSCsb
znK#R!_%p8>oVBXC-RLW3$kU0ve~dFm9?#P^42Sb6$aB8^d9>Qz*FkL>eT72*0$yH>
zWy()BUBsY11{rUp>@j`#-I;Zk<&L3d>Fwipr1#v|hD<ZA$Mv-$e$Hf|$Nq5Adjm2$
z>$_;TXc}LmR`6W{`>5Kh$B`lP`e+8eLXXmE^pfjm($nKNA?bZC13e+%bb71@kB>Mn
z&#VvjGIcwK*UhwJQnMrZgdKNfpeOX1Zl6<<e<WLb2md76_XZPFb(-Uj{TM4xgeDL_
z<A@(Mu5tX|1-diFb>uO};Xo1LT&H%pzhwHjo~WX#U!RwImFIc9oNu4IaNH!d8bER#
zSDAqa`-JChHjl#FX7ET>P?Z<^7BQl}UX%B0#CaIUrNw;@qOTkKAhXl@gk|lU4}PkB
z#+V8SALM6~i|3-OJJ0PLy7O9ZN-oI2@+e-mT#$9yN~*^GOnM({f#CP%71$biuKKWV
zI5ybU7f}0-W52R@zS$K+{vU*G#(8~%+A?6=J{-dwryqM<6Q0~)&OBPpeq?{@zI=)4
zgN~Ai`53yLd2a2{$5=*H%wO+AkV%i}c(IT_0s5+)vMc*h$zaLx{2$Pca|V0$HvFc9
zSPR(i-;nU@65`H@jXxpb*Cgzh@JR{d5`I-etOe|TUzYHT68@Ehhb8>HgpWx07ZN@!
z;h#%*P{IQe#w6S?p(Wv;N%(+-e<I;t3IABaP6^v3#9F|XcejK)0pmGhjQSMjpz$&B
zT!&|l2Nfp`h!Z=u5EH%MH1|GRh}iUP7(R#j_JB9>Y4+8`qn^FW51iMZ1Z`(5u&?aA
z=5-e5wPT%yy_>0X7c~Ziwc2H2Pt?Nr%ypgje~;ok!Qy!3`FGi-VK3tIA;_rY=J@9R
z7ZCHWBF86+ZXfnG7q7nH!<wulCwKudtj8J4eG}v!$DXI6!MdA}o7Xi5z^mU&s|T>2
z<Fn-ps5gA}%y}{X`t)3w$NFP$QpGFRs3hwT8UtR~&p>YHp&#m(vYR2-<GC4ZXK-It
zub_uBkHWlnD{EAWYa;3+^Rwq8azERYYnGqClg=a7)6{Gn=krw9VFGO!jsY@XWsfCn
z5430B9>}j9?)5HS9fNJ{^)2eh0PYU(I=A0Dy=F75AA%O!LCHCdFV5Jx%@5FKocDBP
zU1J}z9=!gIVegRbWyhOi962rJ{kDYP%0S0}+)U>He93nN2C!!2b-3+I9-El9gYGd&
z@2G@FB>akmk4yL^2_KX23lcsmVV{J5DdFcNJS5>~C45N2UI`xr%(NfP_bwvXTi4G@
za9738`$2|R?89I$UF_)qUcxzMdXKqqFs#i(+2_u41irs<CKqQ9h$%iFV!v~rUaYa~
zdl$U#1sPQAI{S0|RX9Eu;&(n5QfKRY)`s)&A$7*iva#$qV-kDh40#X9MME3|BRHER
zO=gQ_w(kvzGx3qFW>*Abo{qC+KpQ?w<>$*b|5H<UiAGk_<gqz8_Xc0S+f;++D;+r}
z?_GyGL}8qJ%%-)qh;bL@0obGMdkgoBFxU1k@wyK!giLRZx%%$eY<BS;>K97MKiTR%
zIeFgIHy_XM;Qr6$Htdg{cZE{xX>!|o^7Gl%HMnndp;esu^V#sU^V(MP^d;<t9r5J0
zsvH^dEEtSmV{PI4Mw}mfPiV4r<H;)>x1CI%A3tZ`OW{7FxNkIK-!~HDBG2<juogMu
zDQaB;_)eR7`W^5{t~MuYXVE7jrML@Lf;*{R`cZ8j^|{D($RO*-V{SUs_-1|e(iWqd
zywq1u^m+t$DU#=FLO*pcobxUB{JZu+&u`%_RKiVjSkE88zLsa<U8Pji`srg|D87LA
zHL&}S0S^PR%)@ww9sEB66z417nes=n+Z8&7`(9z}i(Z01OgyvAKLvl>iu+1$=h7$G
z*1txq%!4f_m(t{9x2rD)HjU%HR?2O(at{0qdWt$D@8iIJ9H(=oy?f-{k&fS_P%}jv
zwsRs&yEE>h*11<xRj*+!mF%twy@>N<*rb5v)%mvI`;?ECB6j(1n|)^UtnDAZbH@J5
zfVX2)KW`f2dtI+kALpGqck(uwAqz65P@`f+rCZh5#d`fc@*z!E+>h#Q;PFSC<J)Jc
zIA;o@|G1n3ehu|+0P%f}?}2q<OyfOCS^u22QndB6H<mY{-<MJM36M_-z9-|jFB675
z2`{ZJ^H^IrR#V><=goX)CV|}6?@QVFZQD-d_a)qSVOywr6uwsYbo9HXeMVi2_4+92
z;XWw#QN?+-U9)66UL#xZA@s2CoAA5vji7HKCdUzz1UM?8^S%t9`*F=hJ`INFW6xgd
z2%YRZK^8;kNYGK`FXt}Do-@~RC_3X_N(6mbz5vG0NQ0=Y-0ubGq~D2Ry)2yb^BAdU
zUjjY$4cA)EHLkUsXMCR51iETGRefV68;4c>cFM+d{saBkzg(ADUk~bWnEi@+%=u|C
zM13|HqE<p@KcB_-U{2=7dAbD|AzLA!eeZ}QM7~Vjuk!j(ckO$ng!_@=ZdEP%ajid+
zq*H7|(`#)xg8QgP!onWxw~^yG4?kvxOx%kI<P~iV`%RPrH|m}z=*HdGdfa<`9{V}o
z<=E5kQP&Zi%R=tD9?)`wPdL{MHNk%t?ugiNpp7HkXUyXcav#1k5Wqdz^|-IW_uLzO
ze1D((O!L2CAJ$2~TgCPovG2EuJF_F*xSs+0a4xgm@ovXC`;7UjJFiUVs<gK{Z|3p6
zLEdrY`<{?#a4l*Z`;qGbeCEFhToQ4>v=vQ)O%4~AwkP?n4aV^E7{gKSXCHP`@UXk5
z81n#aPCC!-ulmM$OhwLd4O8dLdfYHC)fQ(lRU@F^0Na;QiGOL!LVp0~9UE6tsAf5Z
zHdK&(cF(kwtvEJy{m%0E&u8j#Zo>Ix+X?y0@y@k8uJN3b5AmtwOW!jUb)4IO%k2%q
zX74#S;k&l%FLl2;310<lUr8C*R~qk3zS8@rS}BzJ2zBkhfrd6Au3v+1Zo>2H@O=_7
zmzYmOKj&Opi8~b~X4eJ8X$^cefj(ontK5yfI|Jv;_8ohM_<IHu_oDc3FT!}|b@y2p
z>tt=IDKICOmGIvjh&$6easLJh*N1x~p<lF7-+%9;zKQkJ#q#mrpPV<AwH`&>{tWkz
zMj=ZX#;zFNP5jNtINEvmOrG})aaZ9^zRO|au08ILJkR&;asS?h+==1t`w_}*eHh=D
zt)qeg^k*Kg+If&ayA=2GBltG%@na5hJ!;0aIH#X8Sa&h?*e1w3v0mu>GTQUsr5pwA
z81BL|%{M?F`b^Q}IYPJ36}4Cv!xbGtTW<FxVtN_wwJYAwqaEAj0_1pB$>DQHli1h9
z8mmv~-GV#)qiv{BoP)62)3Bqm9ozjVa@(el`*Shai+Py%n;gX_iQ4lG&>!*4f=<^C
z-gIfYPRH>rhQAfC?E~J+%F;5%@$G3BYE{Let+?lP7gd*TWxtd{AF4P|?1vrC7)I-o
zU#99l-UHvYQr{aL)R%|anFHHRe8lWJL;hAb<}_?ajvJ1b6OeNNa-IR5aoBqla*cTM
zZJYlt^qGL4kGHf`r{LGK(CY-{9m>fuL)h1^x`3Gb`LEKnH{kn7s~Kv6tO>|UUYf&l
z{zQLYvv@1}#r~d$?|A<=yu+sczX7y$((*~=gBx*w2l9dQfOCResK4_>F1T*S-wy=L
zuH1rjE_haPF5quG{O~<_qBIxKaz_bwzBm{7eMT-A>0DUpwtl?Q9sd>Q!p)e+az1dJ
z>UppNwq!X}9(ZIPG|D`{xL$V>ZTRn$FbA#Mo^%zwQbPXJX58;V3?2{s;L9n>f2{`J
z9&&|m-R?4P)#GhB?5X0-6__4xDo*T}*W$$fdltlel5-9*UxS>mW6}}xe4ky#{6FKF
z<CpjNxos`x=PG_li(iURD1o*kp1i>%YQz1At2<;)vhDfqjLOB8kX_HkZ{piV#HF3n
z=*u}hhS<^jpG2D(G46=({lA(S-#^k~kmH+avOF9E$A3$F=fHm_@Hcd&E)n0yY1W|$
z{5^|`@9$`|RebYZnEy?D_n{xgz4!HVVF1o0WbdX88$N6--*opUjk>nBosBJ#9lMQf
zZS6*9OS4gP^Pcv$Z98`2slBmfM`v?m=Y8$XMyR~<=E{myq4HIg#_~w}uAA{xv0??|
z%U2ovWmQFG)q9J9wJOs0m#IvxJj7pT{ygNFi3G+2O3vSG8!?m4wZOYI`Yp2Kjal#?
zmH0ifU7lM!+#~UpeD_L-gE*W1BT}Tzvfm>TAI2Y2@^7OQtsl=U&r`E(w0#MYpPrZa
zJ#Z2K_;RB9d64+d-!E*$O#H8accJ}q*+G)C-#mx_=kF>Ie)LF6`FXRHf7e1@#)lOP
zDgPpgufT=@|Gp>y-6HWnl=!5?e?;P+5)NYJ?cXO9K3}{)BJtZK-n?GmF+a3_e=70G
z0`VT3FW{pRzeg&Z5NP^qiLY285SGNBllZ43{$afH?*)lBKP2AsC4NHUH?I`<uM0r$
zN<7^x5J`#8hrG5uCH`HBU#9To0-@q$qr_L-BJeNE_J1Jpz6ya@C-H3(zggmw5`RF^
zStSq;OZ?*!pOE-!iT{SgQ>8%U$y9qr;(aooU&6cnYuL48)!K^kMk?D&_wC*jX>6^J
zG&VNxtZ#~RM#^_|v`5M-)Q9a|?QNOxqQkcK$gbv0Ju-dhXx`n?*50{eS9ATe&mGO3
z^*eTVw%703vAe#pZTGev+i6#1594f9XIp*8j_vi4-Cgy&+B$c%?N$sOjdr%(U*FN$
zyr;gYnaiDORn|lswtlK^!yV<TL#s&WUcVhY+ncv{sCSlO+I!nJMgXl^?AX0y>X}>b
zX}iC<9Rf8qs}_u99c>*Hk{JobZ7V7?w`KjLx>72e0&CFNcHi#K=62P(y*bh(RC9cY
z+_x7}Mw(PZe!ssR)m|Y4{d&ghqVl^_A;v}SgR%97HfR3Ap)vC_YqxF3HW49;Cu?CN
zx9z;Iqh$tmrpkgs+x@#|w7q|qLN)L0Y>zZ{ia>QDIY_aADof%*JD+8&1H7T(=cdt=
zFYC6meUpaQ+rO;g{TiLOv)~O`u$jJ2XLA<(6B=Hpe<}+;so{0{K3TV&e0OHSKc(Sy
zzD2UmJMFVk!xw6Hur$0*XX6~v$VsPD!|U?@OBVdAS@1=2+;QsLnFT+t;dMDXd4hqT
zlg`((;9t=2I-Ps3%S`8R7W~&Wyc`N`0xxNJo&HmDJe`ZUl1=RP-;?+f2mS?#ciMls
zPspk0$X8k;9~2#h-z*=Tbe@oSMMqF2I^m$B@aMA7DU<U7C!Gq3SMn%2cSyWbo_nRS
zoOrDF?4J`~D1*<5Z_@D7;#0%xepxA#!Aa)<4X@LANyF=O3g@Ne)Z2Gzc)fih3qDT<
z6U(F1Y0>aHouMrFH?!c^$rX!J--k84&iCakc(W+8z7J=?zmNrAvLG{^!&&ezXTjfF
zoTj7O=dgy?^*W{D_4aRSc)fk~!p!t>7u)_h?fHa;*XfLFc%5%WNoG3XEck<2@ULdU
z=Pk-iANSug%3qxY-;xFYNEUn|3;t~luiIzM;<P+E{tgYV+s)GOdix;_uebM=W~Ogu
z!G|@xPUjH~uk$^X1^<$U*XiULndMoo;q~_SXn39P!7TU_8eXUKl7`pm<ORt7IqT1w
zEcl&S@P{?L&i98JUg!I=#5>24q{Pp2O&>SCOVV=c^jBuVw`h2sZ>PjN`R<i?C*LPD
zIyzrknwCeWU!4ViZx(z^!|U|(mu05EF$=y)!|Qa;X?R`E{2Q~-&w{tI;QKYa&iA=2
zc;lwbd`%6n(|JI{>+-*l1^>O}Y5F=HT9L-<boOX?z5TevJLBY4iFd|HbucsiCp5fH
z|HOwfxBp=lytOjjUZ?YdhS&AlEcZj4dHsNf*Xi_Yc%9CWhL<JQ7No2^Esx&*UJb9e
zw=}%YH=*HmIwiLV`o*XNdi$Lc?;L;ERAiRtpoZ7!oYU|+-#0b9-o8oh=Q#O3q2YBp
z$t-v(@95gqiBtXZj?Q)gThvo~^Ug?lCl=9E&MSE;Z|LZt^7c0I(%80ZSM%;pq2~Yj
ze*+X?+8H~PCUE?F^;QAZ|338~Ax~>~3)7VE3bd@3PjWpo3$M&aE`v!<3yI4E<30GN
z|CU$lZ|P@ltN%FcndbktKf8x%y75o{DgH7Hrame86(WQO?(b}OkCgv2s-c8RejPe_
zbJJ6@|4ULa=F4%Y_$&Ke1DsQLpy-ix{6Eo89K;o0@s+3m51IP6+$~zvs)iCe`~MFp
C0G2xd
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmm150.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmm150.o
new file mode 100644
index 0000000000000000000000000000000000000000..fc920f7d714d9b8b9fd0c5f418f34c52674b6f0a
GIT binary patch
literal 7952
zcmbtZeQ;FO6+iotWPw29CP<8QKf+gxnkJAyUQ5TDpulK{p~=>9)NyySyFiqD?QVnx
zS~ifP<2WrDGh_d7CJ{w2{X=RqwT>bSqO~2zp#!B(+p+ob+iElc2^zM)^WJ^Q%L{R=
zzL~e@-rqg<+;h%7=iK{}y|?{zz13nN{jtysG}Y5lqJxX4+Cps#noDzN*k<c}*JkNm
zx0sw3yr(VHm$ZxVB<KN$7+=r*Y%va@eJ6-M4;P4CJw!h6D1)|)-Vs}7FInB^iIUEg
z&3`^%rM@8>^%7(d+5yN&VQv62Smwm;SDu})QRl#3>MWvUt!HksHhe}X!+S}AT3xi5
z@+NklI?A$inQo8m@A~`y$`>sE+_#s{{>X$M*dKQ2|0~$>8v6itu>R}|0qVv3kX^hu
z2;Yss4=3rmmF$zWom#!Q2MUco(RF7!vHNA!{&bp@U<UP#)>)n%g^UY%G`<jPda$0y
zPJJG%*KY&GdOe_HY3dvTANy>;mfstgldRSKh5e`)t*d_aLY^3(*nL{{-Edkc%r|7q
zQ|B;$$4<AigBF$yV{Lt|xRS1Hdz}>XeD=MLeVk4&;{J!A`u?%r0(y<gz3%6|o(o->
zE)e6qPl4Bkk`H}ZzkXYO3Cq*>b^v;LF!pjf{dhk1Jb-o(^E`CRc{49$I7hIy=D(Lz
z|MB|i6QuOdnbIMNHtQgmLKeciPhaQIRo3a7rq^q#-*kTsoS;r}Xg+5B&cRRpCxqgD
zgIe1&$%h;}$h@#qSxO>N!~60ob@t3l)}}+0NdK5#OfRut8s1L{_BG4s`#N38bM`Us
z5Os=dgZ!_wu^J2SucedbPmPUT#@dUjmBGAfWhf*PR8UYi@E9mrO9o>i5x9>M{X0Y=
zR6_}`J$3icevzoZlM;guVQf9deuJ@1lnCBUiTc|q5vZlaDfpB9ngXo=eMS1$f|%4}
z^lGu0;+W)Ikg>@zV2;h?w}?&l1IH)FGxI;4>0V`wOFj1Vc;@)~6go2H+Q6~EZx3>1
zV)yaMn9$>~2YPWV1ekJMv7Xpd^SXK-BxMdw?0!{^gUDOc^M`dD#{NI;_`#}S#GO7*
zi)n2R>-L#R$H{z|N8_y9Im98?ICZ^woUdA~>xVyne?=P;Y3w)pqjLP!D_ZP-Uwc!A
zeVJkJsp<AI?{~9Tt8aR(;uzxi;2OvKt=BpBr|!d^S?ZU0ub$pg_>D2b{xQZbaebBb
ziQ`0#2c{ekpsdRUwXROp$N}5JUe-&^dFaJ8b*dgs)z-r~NvEdY!m0X78I!e@=X<VF
z(~LEm^N(vP>#e_&@dCeDa2DjhAr!B)!-Bj!3B4^i6WT$$7f>sF=i6u@Uxke-x-+Tu
zB-)S5IO?}(=Yk$%-A;^ye}H`g-Sm2V58_Ke7roE<#dUMa?o&rEgQs1}4NRmfd0gio
z#Teu{--Rs}=rx&-GUoYABjg{~jTFuWKGTv+PYWeQRN2mcLLJrOUCSjsez*?nu`+=C
z<J|E&s?VDFd3`=3m>TOt68c!NehpKsZ)J-0PeC8++d}bYQ!8}x6~k|SoZax5&+nkt
zAn3kSd#(FTQmor3u>i9Dxzze3{5L4}PvQ>XLatdPl9RX<_*1ZJu;!6ko0Ksj{bbZ{
zAa8oT&0kAS&K34q$|-9tQ|K%}yBCNraR2b}nqxV%rXt6&CcYqd&AIsnYm$>SOpDWQ
z=i+D}gM8*V=iJugoc$S?N0s40p@iNOO8rMd34SV+KJu*Y#~mW_j!=36*RATuouP}0
zRV+z`vR|h51LTtZDzz`jE&D?4dx+FNugN*XHJ^1LdEeul5IEzy7c7ceuovB#c~JsS
z&v;t3(>G_^8sGSi)!|H>e{%i+@|JM7GoBeI;d8UCJtkYpPL-jHu=6tPyux;FRCNr0
zA(Z5#otvdyx}A4vcA@rbeh6rGIcD0$>ly8W4eH%YKgT#{j5UDk{2dco-9HHZx&K4i
z@A}-m`jW)<$=o|PvS{^}DrV`emRSBsj*5k?)BV#AU5x&z_-x1O=P(z(bv`JmF&4G@
zshy?Z8c$`Se##ss#A83|5ZBNirl_HaE!_3<daZnCd5Ss%2HVwGRL?Ihp9h}9_rmXl
zGIT^J%ktNqy=hNY-S9mkabv;yvn7t2v&Hu6vm1a#PLcAVUnJH8zYTm|B4>?*oZH_a
zC4~M1gQVR59@=k_(r`Z|wta+q^rxh3{eqM&7fFd+CZ+xgDdByTFxC^cnfw2icK;J}
zhP~IC>|H4BWy<z~8toPGe#klGK@JU~K7EjGcfS7;?0hbz)PxJ`24M3B$A*%3kEE1P
z@%42dt)=LDS>1($Pa*!Yt4oGoNGXSbd)HFl&>w_y3ppP6OKx}Jq3oKH{}8oyc&@9f
z!Pu?28+YxuuPX_m?QxJVe4j{k%%_TsGe>Lp(-K$kdGQmUrO1_;d!*J;_Dt<zTH&&{
z9Ic%fK3e-Xv@?z!sdZXbxVHQ;r3fl=6}|2K<wL;3kEE1qbC<ee7^~cB$*JF$QqExf
z8H@!T%Um63ufyvtsBm=@uX2SPt6kozWv*ooud5pGA;(IW*HP}WWLn+c;uWraz=Xr&
zqU?okax8b@{&{>(CRHNua`xtm^1$tMoZBAMu;8XtVgNO({&tZ#1j;t0*=BrWTC&I&
z*hI&TduVL$T~9AIOr$I7F{cRB4nGL^VFP@?zQ}|RGT@7Su)_*Jybj7f3B&$%pkCO|
zwvhvG!3q~u!A9t9#p{LL0=najg-uIb^}kLj8SrBf__N@v<?xdo{$zQ<11Y5glzrsE
z8!BD~ne02Ss|d0MWx@|jU0j>kZuSS?wIg??61Q5GxN4wt0Q0<ft&pkiWo;^P4c5qw
zSaY&+i(I!s{xcY_ft>wSOI%CQrmE$xYWp>iT?TzuxB^MLn+m*GdztHb8RP7)KG|l>
z81HJGRPSU~oa4Bo*{r>ts5^Ox<+Ioe)FJhIO{-N}4tr6PaVO|)|EqTYW!@yPcD_&H
zyDi4wNEqk($77?oCnPtC<MgK|@9VMBFZessct5Mo<@=eX*NfURkVAbz)RrfiLS7IQ
zdFAw2slttO*@yhCM$E9@ZK@u5y=_ttzH9j$RMC}vX*KIRb#Kwm!Jy<18u-VctLg)M
zhv{cZ(r{L&-)qo+c!=-CQ|A`*bP%l^9@2ckd;;?IZ`XW$<C*!{AIvuZS^4<R8@Qac
zhSy}iLzt`A5$4IqIXL*SQ2Ix)F8FK6T}R}?Yc1hgNMtE-FUFnaQrhQ6u8d)Rer{JG
z+s)r}e15c{hF<(y`>u|EnO5&tj0ew?a_lP&@4Lu*wXkH6_4pTc?vmffV;8VKWBh#z
z*>Q<i0Ova&0n0+1u&!NWkkOn<<a7OxrSLs!xr5GGf9C!Kdaddz<TZ_FA?w>^O#;{d
z7NG49--92M@tL~H{gKa}6o1DdK9Wok9|Bb0H}zZn8_u3dzL#K=fv+Diz<0_))N3yl
z)Oq3K;DMRv#($w3>{joUut$G3tXuaZPw|FLKlk{Wo41Fy1sj??TbiSu__m0r`sS8s
z^OlC~XhlQY8sd>qye%5>D5WcJURhSIl$Njb6bGY?H=|W{!wrm=mV0=lyliEqzQEO}
z1)!ZiN12@Y*oa4GJ~mvwulCp=$^6V!fthmV1Ghr{W;wwpX@SI#neZZsw@6VbIbJ34
zGOGsck@zNw=Sr21O8j1lBQDhE35ka#jys6@Y?OFh;>RSe^B<J>=1h%IUzY=v?Hb9^
z@T5l6UmHmw2JE!jo{2MTBPra#|7WzFhJDff_YaBZO8@Bod|%?nq<`*}<D(KkBbVqy
zpPvkjv;2cuT0f-`Dv<bQhXy<>@f#)HFY(_>9JN)IlboXg9ftK;er~pge<JyJNPgnL
z!1IaZe^lZvxf;G$;)f-E5EYD{9`zSL^^J|?m1U(NTDp^Bk+^?n!XJ&asLfrIt(N8;
zk*Gh^+!T*CZ}-<X#3|MmYl$?4{qbghY<ncq;%{sYM`%YBspfB%Jr>s-j;gXiA$m%p
zE~_yTj3F}{BTc;YE|oVJe$XF_Y~SLKM`Ce*s4W`BC{0HV^Jr;UT7g+{=)5(i_qUq*
z4NXv8v)CVN-onh7GKsLhQg_M30!$FE(W1^%P1dCWjYXPb%~4h&-q18%iCKoCkzm;0
z7~JX)2jf9qjh09hWvp?^1^NIh)6f);M5ApjSS=omx5e~rd{j2B$3ExjAgCTMX8dLF
z@xyq&)>MBl8E~T<k1Szk{wj&*VV(>*RnDyvUu?p|v&c!#f<G|}ewVCAW_=DCaHIZu
zDKYa`$x_0&k$=R18~sx(^WV(B$ABC8`wX~Ie!i?1W_^4H+{k}a)(bQL*Ro!i@jco>
zqVBIz&goh34-B|bf8RVUIL!7A&w_83b;_)dkafz8SIMAZ9Ebem<1^rkCsCr50XOoG
z%!21%qfIuiyVigk{S!9eMn60}3m%a5l;vM*(DO|LZj>`N3r?l6L}NTy4;qhZberCa
zMz#k_<B^?lDpl)5X?-k4rO{@s6KZbc>S<W}`!qe63{z&DqyiW}WkzSAFWs(=@z3>m
zIRyn?<MS|IRPdx^K69A!Ix?(D4%2dpOE&bhr^U3cj<XEoa}zo&^SjP3$6S^vk4?0+
zM_*s2i4ITduLJy#37%i31Cs8N`rl*1b^VRhyf#mHTh9ML4zi65nf=G*z-&7pO3C2F
a->0WNrY>=qUv2(InS?ddW^1+@q5lC(m?#SX
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmp280.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmp280.o
new file mode 100644
index 0000000000000000000000000000000000000000..33a3138a39484746e11ccf4e36cf6e33307072fd
GIT binary patch
literal 8640
zcmd5>4Qx}_6+ZTJh`}kCIJ7B_?C0R}lckx%k6L$~`r^=1sndiUCZSR_aU28b5^Nk(
zuyBV7DMTI8$l7U>HVIlnL+GSVS|mU%!=*o~)J{Vx?a(T%`D5Lr{ZNrejR0lmymzkq
za+3#W)qWm&x$k`MyXTyH?z!jQXZAh%oyY7p8;HvWr{OC}pa7cR^sGN>umI-6&AsOa
zk$)rz(05aTJ_Vlxpk=SQVCtFzr}9oM+y>gzNE2j-UxRSa4nz4KEj)T0`r?p}z6|;D
zo(gR$5088@HbA%*9(hd*$2+Q;T0{1l26sbE%noO-xwNU9d*41;P?|p}EXtSPn4Z4J
zuPPst?PaLnmUDO@r+8Y?cAK-1O*jhK0N9_fJM2#cayD-ySK<xi$~=Lb1KWk3Ky9~6
zb=q99DmV*ZUko{?hjf44@z`u%e>`K494!yxm|i%zzkL2PXQGFyw6h1R3fbq~h3q!R
zA=iP5LUtr)_q>-Y_5M)BapL$+;B#+fA^YAQe^YJlE>CsN<vCQQWl!X6o_Maz8>w`8
z=Y8AVbiC|<>w>e}70;D>;;OdT9_n_rVBdz|0<S%{$OAYhHs#9)F4$qMin_pgVd?&s
zLfD>Dno4r^rrwo>Y$Rv*9;hX|;N6hBtLb2nFlSSL&Z);Xj`{+~=|MlbLkC<9YxlbX
zFwX_<{Vs~}==Ahj74-t@|0~ZU%_ZG-oX-g566O`<lLO_(N-g`SQ#;#(F&Wze*(=|G
zvuz3tQ4YP0{$6Xc4NhRLT~lnQDE^dRBB#bVr>^`OG0ds4*RjRC8pRwtf%3>{Eqpwr
z)O5QeH8IS!Zp<}3-<lc*&G~kd{k*yN%|Y^!e2btzlOC9w-dDN``wfvFl=Bnl$M6{R
zja-91Tq-Y3Do`{0h=zFvFOAUix3shS(GJNil-p=)SXojt>7g8dN6+z(F~_f?P2?QG
z8{_e&5s!+7L0VflQAZTFHZ^{aeGram;V~~vwb`{Pv>Wa(<u!Hy`j#pA=*U7-P9DHD
zc1R1yklU)-YpMaVV?RXfM}@F1J5YWR<)5<bMEU0^AJvTaWhmns9Ub8JZj>>Wqp!1E
zfilK=^fb$rD8GU7d6uhCejDZAvaCXO^!J7E*aw=SKZx=lQ2vPJl_-CP@~14<qCBRB
zt6Ly!)C415q9%yE8OM1TJ&)tZ{1_?8my4JI=0=+x=j=QbbA)1n^Hwu_UJI*v2=lzS
z%r!^kr_fJxU4e7ZgMCStgXW)YQvSs-56QO3!x7Zojod)4qzUsY+|Y~uOF2e0P0Tat
zr#YrMot}m;j%R3M+87Vz+^AA<YDpF7xlXo(onruNDUS@@Mr_8XG2X~0e~6nvo&C>v
z*BnDX$5D5GrBQz=4(r%2b1qVB|5nU@V_p8+<9A0s(#L=Je?0yLzPZQGe%)&PHk=n)
z|5T%C?#FE~B<7p)jPj0h!CZ%E{sRsur?H#!ief8ji`dWZL%mlppBy;9N6TR6<966|
zbMJ5T^*_4L$N{o9(5r=CJ*<Uk9zS<_n|h$sHGp&ZZiNq@OI+joAUurw>dn0u^qQjL
zUMu!bYRR5DAMK-V^O%OQUl7Mc{!`A7%@GB2jPpe3lYJ+BV*ixm)4=QDmhpkx$H!`Y
z^xtBAknKBNAH>zyhaG0+2dybNFaE*n!dxHBu@w1nN8{(UajX3JuZ@3>_3<AcKi9_p
zi}BA<AMb4Z#y&lxK4Oh+bHb1Z*Ymz|*!g}bY@!-I$@QGpSq$@TR9SMWn5PP?+qV#Q
z9>khlP+$}FYbn8Y9_-9Juw4K<Uq)PQ$w!~J<)fvJe6+A0vPP|6Qmpj_)cqc=+a9bv
zSRZQo!BImszkqc?9*?|lsQG-f#Qv3TI;*KF+QXXgl|95X<e7Z<40+ly<WXOz;nyFj
zFV>&GU`uu5&)CwMq3?wfj7uBVyhd!tfzK{@h8j^yYN+O1RUD_l?$^)#qHc-xcH92=
zZE>sqv{r-LY>P^u+800{zSwG8q--3B!qCa6-8~RZ!3y6zyf@&D-x<%T_-#>*-xjTx
z13$1~9}VwDXV4dMhJ42l*ZW`TUEz;Am-zyCYYy<+&b<6IR4(@gs^A>?PWB@IJQKCK
zYjt}U(cWUTzaI62yUu6Fc14wTt{TtyDxUX0zZ`gad71Xyqi9FLd)#gFzlF9>pv^em
z)E+N$qs@?SD=hXecP{t6ud2SsFvnE9tMU6Fj~uUC^+9MbT6*<lbOY)P;`hW-ca3je
zXdp^9OW=iQ;>^kPO8kaUQUlSu(J!(&g74=4Y9M+U+aIH>;`#qHK2PBLdu`ReYWxnM
z7@csczGW?iaOA-ix}VVnL7$4>1skx>8rurrE^Paq^*+FMeYw})<9x^$@Ywu;-b#PK
z`G7BgF$&@s;?96?6z}Kt@zrBo1K2O<Yb?9l-|bxIi<DLPVP&-s93DT#6CAL}oD&q^
zYRpgiCVUmw#1-6!0p&K_Cu6u@HmdI|JqoZhj^9NM>RU@=4*WLB&GS}ogvEh9us8zy
zmo`xQFw|FT-Ag0*UHJ;&dg1+2)ZfW1_QAW+*1LQ@D{&a-fBFv5_sr|iH;Fk+>zelH
zezZ;dba8*y_v;c@4=Aqj>&8BfXNH<#tO<1fd<*ps<GC$RrA?{0R)_KYHiGq`cs8ZI
zXiEgYQD&Zh@%<fM8yXuQQde&H?)TJ9$z(@-d#rtjx;2?rGusnt!~Lmra%+1BKBeQ^
z+cSxHW>-3)hU-?}zdBSOuB%_Iu8gHS@5iUms#S#7)vNTTKD2t>E$!p{;FNtaJr_xt
z^Opwz1^>-;DX2-l7U%$3nSCixG7G#*N38JK`rXL4nd~}E8Wosll8ncDu_-r=E60on
z8PBu4k=rL3zsR!SKg;+=9@+%I|B1lyqm-^+7!91mmh4_-JjM8*7;oW_hFISu<41VN
zo0(5P4e5FqZ(%&Z_(l$$u-hQ`j0^tLg3lom{JnzDxUkzN_@#!y4z@eMc!BZtjK9IS
zn<qr*`GD~h<1aD)Q^B8a0D}K_!Dn3Xrv=|gFcAEEFuoL@6yt*bO~&0WLw_yyr)xdq
zTA3lQH5z!5@w|j5880v{=J7?wLq-C_X4XH%_>qN%;-^^u?-;+z_%X(zwKKK)!BAZs
zf_os?2B~HPV7xh<h_yBE+7VB7rkXQ}&Qu~Dqf#JV6Q0=770V>dZ=1W;tQHKjf>b)u
z)irl-@#=P6&1PnpC@Pr4%Wa8Fb3E43-rAgsrDL6<U;B>sjCdwW^4UbXD>nB)yKeJ-
zMt|XpP(Gux{E~X6lDiY>=FVhWF|gESZnP`8HPf8#n&Ej@s(p>wm{}(MSjsbrw3#sz
zAx>8&wxg{z+uXJ*y~E73!gnXr-=E>~?lf)`m@wPgyG+LP`IkY9wAtE`j1|Xa;)swn
z&m!zXi@Rg(ndVG;XEApAh?D7fqL{fw1?J??SAeMS9$Y`>>MiQ}5(#(nx*@*kOHc*l
zRT4kQxKHBe8JG3+Snw~I_+~#ZGcNl%Y~q{!9A{kibAoZ%PqE*~eu{cCi;s1NE;*i?
z7?=IT-#?3dv!5M|%laoQ_%|&0D(`b%jQ=9Tl>WEYgmY=t@rO+~mr5NM`=vZC{2f}q
z<Z<m`T#nme#^rIHvA}=HL6P+gF)r(Q#{$2^IK^SH;j;eshJ}7{RFd`A^1d$PPcbh0
ziQlaHCG&?Y@DDBU8y5P-qLua6@*<J(rx>5*rv-n=0{_qgpRmw>!-Bt&&oQz;n;4h<
z$KMY0OXgp+;8$=VllfJQ%ldN`{JaJKk_BGD=cieA8J}g>f}gkGU$Vd}_#8INF5|Q8
zTJZB0{7V*i6`%8DyDH<d-4+X6oC{?=k8_cd^@#JL%<r|}i*uyR|ImUj&X+R(VLo@t
z{)ls@%>Nk|Q<;B*ahWfQwankdMV#u`ea2GI|88bn=BG@2bNz?9u54!}){1Q=ZM56P
zQ##QRtIH(zWT37smWe@KYgZT4rIUt$=aSCEj*Q9n*LhU2GY&<Rv7#!CpN`CM8bF*s
z1ksBRRKhg@h?f565U($}E>J^uc)3C)y~Jxd-h}h^Ly&%5l<W$exaO-C1=4BNU)U3U
zWVs$+kWSvd1r3D#RYk;jko(hr)=~eE#G7LOw@A3~-`vW!smo>#^hq8V*`*~b?2GtO
k8Is42Q1L)`T~aRW>Kyz-d+}WTzr<h4=!zIk@vq$fU$0bftpET3
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmp3.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bmp3.o
new file mode 100644
index 0000000000000000000000000000000000000000..0736c493d60acfeae0cace63360cc371f74320ac
GIT binary patch
literal 8984
zcmbtZeNbH2bwB&w0?!Cb2q7CwX!q@cCA=0?AAotTYCje%6UFgJE0XclZrEiP1Qrso
z;142Av_i;^V|7Nj_V^EH2J~eKr899VQd_ktD@%>*I&IX_Chnv&-d)f~tV|+Xk}YhL
z?eDyIA3Uw(&a{0q%enWwbI<oV_uj{@haOokIUHm?4tkU3W)_y{F?DXN8$+GuQ7+T&
z_Ye)1mFgquI>*0C6btxP){ZPM_K%bn){R^|N+TtzKK=1e93zfWzjl5|8ku@k9+_N0
z)4L_AbgcAio@}b5{0f&_mH)%zq)k+&x;(`cJ&;Z})(ssC?0)uGAo6!F1nTn+Mw@Ac
z%Yz>|CAUPH%fF5a{5uc7=Krd7!cpeePBG6_fU?OmlV3gf$+SPPr{`F-1w0=D&wlU=
z37!t{^nj;l=aJVu;OQsFJeDEX__bsS4eAst@H`uS3$_kENYYl?KeQw+H~q>FyA$d3
zowa~h0NED)Ig6oR7L5)$^-qHiYE+&2SV+;!!-_seA9}t|H6E8kfxSwJVN<Y%#^B#E
z0-uOX)hg*@Ej3v4gSv7j=)<wv@}tV#uGU}p%WIuk?r51lb|{bB`;}5xuv8!Wsj|X#
zIxolFx)S`IIqrUCm1~Q0eR+8PLbon0bRQ|oan~vySBzx$0cXBjg|Brdjj;`oS-{ZJ
zo#D)mv5^^>2Cr;(j9iiB<JTUSM!pSygjHRO<m%IhBza!*PW`Xoqd|Y=&X>|*?*~&(
z8f~7hPag!lDm#ul;Dca+KCLo7TR$1h*0m-lb(2hup5R?;Qs5t>2Y*GywCE`ZRepv!
z^61}Ke#EP510>Bm{ZEmaJx_XT{7xDi_j<QBAUE7Z-KU^4(e5SVhK{u(*B<we%<MRQ
zjP00|7yD9j;c<)iRm6pDyk?6}eete|nH}SXjRUY@ppb1S{a`YiM$f}u#A$jD#_#9p
z)87C*ov%;JfRO!3X_5ZLa27Q-z`kQyR9Q;8#<rYx>L;gU(&~_d?kwsqK`ciQ`-h-=
zsjw@jEmCttp}`Ws0pQ(^(yd1m?wUiF-8E&fP407Vc7R{pscWjk^bOm}He2@2>^NoE
z30cQw@W{%dO<}tGMfTfXtUXdh1$zsrW{BiVyTOxf_%Gpu%Yeh+_j{W!%y_?J_#z_5
z0+ZnD<$Ol$ucna$m?z=SgzWTPTSU`OdHvedm!zQ`yv(s1CaS!$88KL-PtWW)W9pXH
zwMluAv5t8qzNEp!*~M$8(sS!F*RUSe&vO@z&g^*GmV*u>2d~NGQxTisoiwV#E|no-
zlemLMDH#ilXS<`HFQw_fl_>Yk`Najuy~ZGHx?18GWE)r~Lm$~OtA9|Us-KZkohYf*
zLd*S{O0+gn;?RCZ`6kZCIJbeb)|>ut3|c<;^+KxDZ==f3m+I4oT}D3sgW(I7{ft6Y
zquGlKszIkhpU-60=Z-mjAkX3zl&LE0_iN4T{aR>)AA0E33At8_JmA-2tQ&NHg&GW8
zko7X=8;!Y6E-^1M<|-{Q<{7eP^?vz_bY<|1bd@fA^vt8^cQ!vg9q?<+-_nhy(^ap~
zV}@T6lIfFIC}_;%5@f@U8{!T-t+ni%lSUrWex^y!b7)S|`}&a|EHefjruI;uMX%;i
z)p&MsG!O6NsH5N-_JvxVM4Xx{{93I-Ym<=o3Y8f+hqBC=GoO{5bI|*mqoz7|zh86L
zQ@4^$jhwH^6}8$x7A@SfOn)f_{q~`b4`WSzTS<+lZ7KSS!xww9q~<Bds_Mj_)N1{p
z+Xwn2Xs19IuJ&vDmQg`zo3|#YxYx$epMt0fcOG>gAZkp&wwgbtUu9X?D63L(p3m|r
zbei=C=Q`)aXIIjd`tQ?5e)PdVqgT>Z=vM*u*EYjnv4X9D9w`=3@eAEAX}=VBt8eQ$
zTrZ+$&!cIsSwfxY=vhJZWMYV39LJu-zE82w57D3sdn|v)xQ^#>4V!&5c?f;&$GSFk
zRM(ah72NHtotXTIuHCEnCp<;#Ct4qnv_}f-C%%Dq=ik;fKi;?aCGCfR1E4u~Lf6_9
z>=}i16QK=~*5Q@3pXb$1v@e&mW}l=T$fts~3P}sEk+jxoNn^XVu9vhYAC<I7K+^2G
zaR2^Ko6R#j-Wic_2Jzzz!uwP`@`!uWV(d}60-eLum-v7*$L%y~?qQDO+&9!bvu`Bk
znSEoJ;YRcmz^juqIEj6$nSI0k4!*X06X#qka7Sa<yFvkdn)^j+QrAj0HfYVL$<!nn
z{ldUCGR`e<MJC;2jB^<{&S@R_><u<xy)u}bjBD4j)cbTQ-po1UdDhIq1bB{TFNq?D
z8iR(+Rn^H0x+X;$%-p{~+ADI+edF0h(bz1FUY)!Inhwwq>fsXW)llu|YS0qEt5m!;
z0i0E%Y-{2)&E{lgPtKe>+Q0`osLo|;6Of-oOd@&66QZgi?Cl}sKf!O2eA0G9{y*bA
z+r?wH?R^nL=KHZ2Uj*d5yjA|jadzPRjWI<2>I~rv0%RMESRs$CSaHs>9M0KE<nF!5
zO&{ka*4%@fEX%8#cpf?F&99#r$gi7d1q=iC<Bf`Tyiw6c9#gbqPbk{KprRd(DB9sR
zMLX1?Xs>rEH|673LVvEo1Ml_+W_J9&v0o+EBKHja%o;Rw$6jUVj=hR?4<Y9Wz7I(>
z>Md%}bd2k91|C2!8d4qI#}H5Ti3ZJs96@X=`7C-0y+rSIZT541*1_fy$O+HIZf3{3
z#(tyXJ<}ifW4h`~=%}w+wpk+Sn>uix2%YU`A?`z^(B~3*2G_{m{QADw0vf%DS}^ul
zjCqgcvrptMoPFj~qYpCJUbf-4a;`54J-7~W=H0Xh_Ut0>)`wxs`{=pPDfN9HQP$RW
zj1R5TUpnYS?`;d$u#UTQsXGpQ8|rEo>?Q>;U+O-9^VJ^J`(i6<*^f0x@@XO46~?*f
z2-Xd>HP^hmE`PIMm3@A4`cg~jWQt-h$p@grBfb}#9ny>Lne?k0(6>1soSXFN4d~e)
z!v0+wrEVSkcg3V`_}`GzVUuIYV4eRGa{B+wl5@MSKTkS&aXQ`jUKUk(pwI4lMYH^l
zbKSxhRw{;mXCNn2e~z)m`zHO}bn-0L7(8^7#|gn>i=|sJEewK3tIY=~!w1=>55OZ*
zsB6vny4H%C+=F+`s)TphhJW4yzy7iYZEwD_FNL#pf7zVwh+~1ZmvBDB6<a+TcK|b&
z(Fe_XWXSahcy*ln=G<A2b+r1Xv8SNctvzLGT)*Lb!M)-+)ZpI2hb9JiPidC4mR9ut
zCne*|kp#Wb6H&*Z?@8M5OuC9?c_D*)v}*6sU!|)u`LoZT!`i*PC!x+;zXSe%4*uUY
z`7>|&GF`=TN<ilYod<m)9L0XL9sAVNlE!gi|NM)9?5B`C=O5lPu82LC>qkdTbKMX_
z)J@z$qejgh!adTa?=X615`8L#o>i+le8|PV%stQEV>m9>Z?;$3V$+KrhrBlTdxnTl
z9KB`~KfVtQNXlT7aW9ZAox;5!2|p&@roo|HXWvk+baKe+G|pbUzp-Du*t7V)mOxKW
zHR*j`#o4E$7jf^l;>mbFYLja@)kFpjrOg-_XF8j`_I2z}`yJ%n1+jqVwpf8>SLy`z
zmN!X@;oM^Rmf+iAVP8<#rvfHngOw9Ok$Xv;N7#l3Y3HX@q<?QW`in&azJrMqbA8ju
zQQNsE#CZ)qD(<GUYmnoNBiwmX$dwTEw_@cdcLB~Jz9xLTNXWa5?*h=ncz;Rc4Ab&H
zN5G#4<ns&n%k&Uw!v#0m7+)xAj3Mg+7{UE{R+k~xJr>~ob}DCRNyJM=t+2f+_K4(=
zu05zbx;+cbvncXv_Whi#<~@yh@;NY_mPQUDR%&)Ekp5FTnZ9DK;oOwFjs+a~uLo{>
z<Mlw!<s*UBt&Ro1L*8a}9Stb^j|TV~%Dl^m1Nr%-t`!)c2T#@|iT!s{mV9ruI2L#v
zD_nPOaV+@lo9Ih_QMC56Ewtb&Xj6z&3zfJ~L%tK3e~k0xV$fcIkG&qr*NSoSw64`*
z4RUPJ5q!h&=j)r!P2f8OulprxhrF&N>L>MUUGspZ#YbZoe}ggT4n0w{R>k`ZC*qn%
z0Uh)iz_*ex)}DJWt~tPW@`JecDQHq3#WgSRq^x%RlzC3ZwJ^S;bYVPsuYU4jz(DSD
zmtU!Jr6&B>@5X#}Zlx<fx5jmPU-ny(3L3khtaZJIvrjZTyZo?npDVaNr@T3peZ6bG
zQr_&ktvnK-v2z#D1929c{6kzzU5RT4p!>Pab=O(<X7FTv*`}7}oa=sNIrLeM??lzE
z;16@lL*Jz_Gw;m!sUpwz+4AfKF@7G<>K7iPUzz8V%zkC`DfBDuQ{1m&fZQ9n#|Fjy
zAS9Xf<iUBL^U2h~Ja2GLXZ9&8zs<8Z8F%-^s$b(8#s@^BN5yl^{Eh({z34Y)O(qe$
zLgY^fxjc#<IX<7dW4OnUX9HrtPRNBm<6LUou}wd)o}W$9jd$vg%p7K3jp$p$u!n1#
z>-sA85k7zNUG3DD=~tPC=TnosKiTf(AK}|j?~;NkoW;5JnU4F`HOMk*M_zoqAADoN
zPf4t2n$#b3<D6WAv!)04A3yFrVcc~>xa$z^J<Yi91aaRP#eJG}`0FoB9V*5AM?$C3
z>sBvaY{Wx{EK84n{~T)}?`8PkP2d0Ys{Ha2zF!w&{wAOmdxkRZN>)t5xGSYg<hRmp
znx4cxshNAMv5!c{jXP8^@f~WKd#jGTNMQfakr%^&{9P{uh`K(WJWYe|vh6}AuKD3x
zeGB?P*TM&BkoTY@{FcD?xpVL7+IiIL^EjhSp_b37S-y*>b?xVvUqDTtQJuacr1%CX
z$9HZ~&OPiO=5NH^_MM41|HZebDcH>O6yTjjcfn0WS@`ARSBPI3ejD){#t-`#A(#Fa
z1fZRJ9<HmqUoCt1(Qm7bot+)wwov<awY4*<_O`XCwdGyW&erx0jH2PT_TH9o?^Dqh
zRjXK2zGl^Gtzz{WwJa3fR*uoCd+uR;#cGw`tX{PS_x}I+f!gGxPtv!dl8N8m{K$mp
z-{O(MDf3Yb#Lax>0WaD37YUMk1YQ+$)T{Auu`vBvA$maI8OTOdYzPcD7*mec&5umk
zHz7^>oAFF2Q_fBF-vXup`Xq#&9}0@c1wPKXfX6A`w`0uoLE)m6!j67{-!DX5=0$j3
z!;k4>rUU7$;PW>Ezmby=Pu%!R^gbZd=d)w+Sbj@l%=ohcuL!-a3w+{srY2Gae+7`~
zX@QCFH32OXc--TR=N|=rmB4SzHxZWpy1?VCVLWX@?goK>W08sPFabR-@G2J;o&n7H
z>9FV*n{$glHE-)$TM?$xXX)usM|&jH+tSq86Kx7@k2G~gqD?(5y}j+*xAaiBb6Z!-
z_8xu@q7Xe3MFll=bw1M)ZQ9luX`#}H!K-OYOK(%O1uK{{ug{qEfJ>*1u|dX*Zux@O
zx3;%-&M7iWe+%?1^)t{jx-AslYHHE)Y;QCa7Mu+AXSwwBhI*e8%CZ&)*N&F$TYB5(
z>@kpY>v}p{*(yjgN!qu!ixG3^>@poPYyS-ho23RrGaR#j7a>j}#SEO)2^MGK#fzoD
z&!1gQw9bYXDQ3JqW5e6&6;ayE$4=j9!`tcOHoTqwvJG#iUnyEaCjWH;Z`s=*Y-kYp
zVqvd^f5OJc&VQY#_e}o3u;K0W1ELSG+}mt^`+>l-pY8aI0-x#Uvw|p7?#rT|WYX^w
zLCvIBg>sqnk*~q;`x^Y2ufeYqLCWO+p$(7CdG=W;`cEePkG=+f#)h}&!*v^8sAkC6
zFZx&}|2J%S^MqikG-bov`TS1wy-YrjiN449rL$HM9kb!>e6HH?cKr)QpUmXH^K0;L
z2)vcg8-?t51m4PL3!i_7Ns!5(Dth|1^@f@Od!r_7vqsUDj!;D}dKpz1t)rs3r-v${
zojhUk)fF|?lq%4#x3z5VwYlK`HB_-0F1=~T*MZ|_SlDCE2uJA~AC3jLApJ%(T^B)8
zM1SIPV>zPis7TN+7x>H*6aK$=%ZGW`pOu&}&;RTC)mY0s*WhP=EcrtH*;khSmL59Z
z@K|i$vve1Q{@<C!m;-CQg>Jxr*RQe=0zM#$_wfw8CD#r!W%H6@vHq-h$!(46!;)|L
ppYfT#1B$wq@L&7~+!AC?4PC|109?kmT2HD;waEmte>2$8e*>Gc!&d+R
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bootloader.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bootloader.o
new file mode 100644
index 0000000000000000000000000000000000000000..2a1cb6464bae0869239492bd41596092bfa15b5d
GIT binary patch
literal 1280
zcmbtU&ubGw6n>laM+!x>h%I{PR7BEZmffIYd+Ektb5W7B9>hc3Y$t9on<<kK+LMbH
zuO2*j5sP>b@hC_@uz!L?>e-uDn_Dl&H*v-+)AgdW?7lbOeBbwWe(XNFc6}vhS)iK*
zA7I?mD8No`ocp8HhY83d_j!K~UJnTP`^y0P@b2E1*=MKrkh8X9*S`Wh>HF|z0K)Gj
z!|#^~BsG+uoF(?IykEUfYTs;Fn1kFx4!zEzmz7v=%jorT+1|CbU-T{bI3SaL?=fnx
ze%j`cpP2&WlS$}Fj`sRF98N>EQduH}>do6^jj?tZ1+5NgGEPK9Nx8VeS+mu~jE7N6
z&`><&lq@=>V#)Ou9j`<R0gsEAx%2Z9cRV6TJhyadH0i%S<eD9Vy<rx?&RkId8?UTp
zqm$W=jexA3kv@k_I-EdcDpmK2ViYhQKfnf<R(xNL-O`)}W1`K1b;_L(&TT>%(eOc?
zb_C`1@ffV$S*@&8>o;i3_*RX^!A6C3nyvfV=AueY;}r55l+o#K#Uf~66#RFLbjE2r
za0J~H;H(EC0H@LIf)lbh#`0;8|Huhy<*FVrJbcxEYT)MDoxyRrTfV`I)b}!@aOp4W
z=(%hByu!_s@LB21V4i>r%JX0Ko~rK}g>?P92CnO;W9rxNhwUoD4}~1XC~tHA6Ns7b
cE+s^nmSrc^bX^U}bDpJ7lzvGQRW$X#02ua!mH+?%
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bstdr_comm_support.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/bstdr_comm_support.o
new file mode 100644
index 0000000000000000000000000000000000000000..757410f56892a75874ed2054bcc7ce12f616848c
GIT binary patch
literal 1736
zcmb_c&1(};5T9i0M-@@4h_*uaAd(cbB#VOSDM?MzL$nej3LcitX4@>y7jIu`Lj`-R
zw~8Km5cD8e{Rcc+{|G&+c<}1cL(rMzJ^Qk3Jg5_1<~P5c`OUtseV8v5qLBzli@;mh
zk0cAQHL;H~1DJtHIE-ksyr)?oXLaoZjROGN{f&38ziQDpeGMLe(IRu7HJEz=nID+^
z)P~Ke+4I2q8}D~@cs{Mx{*QX<O?{~s^?(PNCx}l&abaOzj}>p+)+_CH!>QX|OJ8m?
zo!4DGo9M9ive!VwoVv$dhj*E)rwub<CR1r6W$H1TH4})E@i_5DN~b5Oq<IC^|6sJ1
z6Y%|KSc(?9(f}I%!c0S@pq&{IVLL`TxEldGhw+rsmv)dWj)V9Ug9zZV@bl;;C#ZqD
zIflPGhF?LR^r?<a>h}<b=|4iA^0z4&?d;IO4*IbCXJdG%`n<+0r`>E?ez((UGj2F=
zVO{0Dmd8b0?J}QR%(ZJ^6-!IGY{^<G6mI1!RwbJ&<t?bW&T6jfgJ(K5cdd+xWq0N3
zNcDY&CrBjRA*^IHeXHg+>>gY<E3j6v{ncxO@b{cf;Z{zHxsr<soJRhL!e0`22Kl23
zFV{DyQy-(#P;`zdI<(GYq<?$}2mdbxo<@FT9}K_O<aQMdpR=K_OT=)B26xvv7&V*Q
zU{rk{4B8U6#TD&;fjSoBE5X5lNJhlF0e<A&@!1Rxx?LF@s%?p@xF<-`r#|xD$a8s7
z@WGq=P1FS)X{bi~Nt%CKpTb(wOyW>Y_P?i+h-H7(M*}$&E{cR5;SV84BRGFLv%z;q
c3O)(ZR}?5F`%3C0g0T8U@yVm_kZQsDUt`6(*#H0l
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/buzzer.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/buzzer.o
new file mode 100644
index 0000000000000000000000000000000000000000..3f8dfe2e7e83db326f66f466fa1de98d99ff2454
GIT binary patch
literal 1472
zcmbtTL2DCH5T4CeZAGCf1wpZ|5Tr%3WCK042U&?)1TmuZ<iTt<FC?(pm6unjy%_&N
ze}{PJLGbFIu)jl(J?YHujNQH@Cns#adEb2RoA)N0PfuSwt9c$sc<>$0SHc2J{qsC3
z(g;>y8GiWhPuG?IQyvA=*HsRs#{kjU6yO`-FCV@@ZT(a<*z0%$`OjG2SfaW&Q&#|I
zq%Yd;wcERDbMNI_wV&r{GK@!=8stXVp;nI@A51<NrI?vyII=pi2S%%%pw(zK!<`^(
zsm<7o8<;h>wulcxMU}AG+AiD|e$h;p;P;<-0)Otr0DSz+3m=`_xLOdilfPc@v-(x!
zy^7Cr#n6XKl~tLpA>6E-QydlZ<VPVs4=^XaA`;_n2|!~aKH|0TkC^W=e~l4(2S-QR
z1PRm+q27nYnv}Wc*~oIbuP2gr1_LHL87FVFZReRac?$o|a|=f$cc4~v?sw1OBj#QG
zlLh+j0)2mh9)iiov5k9()|5Du%;+=@tUk05^kW-C(3?ykNb>PmXO{i`7Ze)cmEp2u
z6!98Ib|K_<7V-`zG{;B?#*<o^;Gee$@~1xXe%vl;xX--%rhnzS3*=Fahqxe5cmD~C
zq@V0@*C7_jvnc{b+5gVrrGFLqsuz^2EO^Cu1*<FgNPoFMaqij4sLQ4uT2w;%3UvdM
OdHW+KcSXqP?*9vTynJT>
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/collision_avoidance.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/collision_avoidance.o
new file mode 100644
index 0000000000000000000000000000000000000000..a566ddd75eb3b4a7f0d77ff9ac4c02a64c3d386e
GIT binary patch
literal 4104
zcmbtWeQZ<L6+eD2cAo8!n7|->=)U`$gv24wBpGdzPAV@6Ukh!u!K<pSl@eo|k|xIa
za61Oo2+(bGVQRA?brqYSE7eHaivF{8(eeZ>ZC905r61$3O|_FOML^ML3YkY!?{{On
z@lv8n+p~`EedpbK?m54E&hOrR8}8aD*=&?~Z1gJ4zGbvTZ!ehb8#7&loTSk7-aiaZ
z%QSGBs9Re}g_GNCgOjqo;&WLZvj6kc*6R;QgV$wg=!Tp#G_`^fQ!))*RcSik;Ot^q
zPS}TbGvv}5dw2_47vxH<Bdnv1<$CndezNpMWWGdY%$`F9W3VMr-v<xn8G5ja2HMWF
zjO<W!Htxw+-|)EAUvbWSHZp@sDLb%d`^Z?HT|EnFsw-x}q7v4p6|=*CFJ_H7G_X&S
zI{q@9G|A&<Pia{1cgL1%L=_DMwDz}7oxSeNS6iKK72zJqQz}{9Z&+2lk`3jNxlf|*
ziQ5h9Wfz%o`CCH-pJbxN(043=u9ys6gMVK5w|`IT2w^?$<m|O_jTtssC7YyrxW<0*
zWzrnK!x#=Y7P*CukN5CDim~g6I$la9%`?g>)+Tw`G2m-^s)WhZxAiTBv$u*g_O63W
zPXqjxmkbFXD$y6%Y(bj~tW+-l)utGF&H9utq!^a3-piWnHC7704gw#6gHq2~iOa{<
z7rN9F9!2fqB@6+X!MYOGTp_EzRkC`L%W6q|CEHNHnhD(G`YI;Y6YGoh9xwN@7Z6*p
zoU=yE)9Ol@-9tJ70|NH)8Fi#l@iI-ZsfbVg1mh}iCe8D_j2#wh<<P=oBzNpjB+W}@
zh5E&#WKC{s7`*;K<KWZ^BXLzVrZ1MQ4_{idA$+BFV>p((RUbWSSkrsoIeA8Ixo~)y
z#w6?`Y!{pa&JX{d)b?SnzWp3m@2ab0hn<z|=k+f2iQAm&Aze|QN+y?Htu53qW1R`~
zMSdMXJH7XnnS5>m-XfQ`716?}pgj05<n5(3xnUO>Rx9@EVwoeXU_Iw4Ll-%|<gp(=
zeO<N>9ib)tvG-`W^-;FXwXA~0Bb3<xHt(m$jHeSFIfFNQ?SofpmGISd&hU5(C7jEA
zEFPpptb-C))^5<RRvDIi*=n{RmrU%<_kRfdzGyKLkK6jT-b76$<i$hxJ$T}1&~4~@
zzfA*yvn?Zybvg?oMy<}z8WkT4Div&vvYHvdd+bHBMqeeXm1H$$E11b;`!dc(Up1^8
z&z<;gSPoAm3pm#>uhYv4JPx(ViTXhOXb@3H!cJV+IY-u5+7>75BkF=+D-Ih;X~pF+
z*c?4)Sh7;gB+RiX8jE2s4!TMIHGJKFRvqD+Xhi#W(o_zv*WJL+1s~3MZSPCYz7OJv
z^LFI#@*oY|JSz{Z#2f|lIZ?k2c`vv_tQqSt63zyVQ7gUwtVI2dZq$!^Nk1VEFF0sm
zs*wgZ%0{Ao5e;0H)RFjol-Ta3;Wn8Pq8_i*GX3gJvNZG?>R<;pZQz^ueMW-Ah6X<m
zz~)b3<I)nczG*HQ8vD4Au5mY6&mpIe_ZY(t)M{?6VVx@6tg8xjzu0V86R72(Rn7Xz
z9~f4jM5dZU-N%=bDe`<O*ff~vSdaYJfc)4TK7A(*pDI-J7n{jCeGd%}t#V-=S)v{;
zmTg2GY(frwH$1)f{7n7}KDv7)nK57}p$3502V=l1#Ywh~mkY?WgOfx(%7}aap1_EP
z+9&Lj;H2XusjZL<CuM91dl?(T{(Ls#x3Cd=<9U#~4PUbPI0#6m=dC8i{qgQydq^
z_jTa8PVihWIPMdrjGe|<1^yH8%fX&Iu^%qTL#{G5S;X1hMZgWb7C*RUun>9)cB|2T
z4<a~E@ZIg^*ZFQOV*W`M-#rh$JDcxP59TZCE4+Ay@16%wy#u}*1m7L<%4%tSH8a6;
zDZZ;=VjZ!jSnGvyFFR6^;XBky-CDMI@i+5bmp8?CkAv?{Q%=Wg;5&g$=InSGXI&8c
zB+j<&GyC-4XGbf!RD+bS_DNus!6+6n5_xM$&sWIm0GCmjVa4R4p?}DWDsDWzWpE7K
zp#jqg)bcp$*aohUlyWwT^Mk+{qo|2kF4Ns#CZ7@KusEBAZ{mCwdhvY%wLXqI&-nW;
z&bssYhJK-j2LAlIz&Pb^F*xAO@=_+}dDN!7T%0MTGiTjL@avc0tKND)6FyzTnUe8Q
z_$TUo;zMu^d}?UqY&&EU{&KXR!RKp>mg(2FtkfqjlNFy%J|prz<J%;B`wYHaTXer3
z27iikQPjc2hZ%oS2ja}c-9gkr?o3Xk>fkGX^GO}clfLp-U@9;!@EE!q=VweSVSz_h
zvo?jyY}^ZQ*13WE0>mc)cY%2ZZxP=pVjV{u1~^uONRW)*rx3?De9vGm@V3E*xR(&l
z`DSpS4<fkmXRx2W=iPYUtZ^p8M{X}>Bm}-0UX5`FXRQt|>yycR(#P2epT^Glylf}z
zw?iI=ypQ?Z>0`FlVqf8(&7}&iC!2z@r6Ypd#eP?D&g`EiO^zDO_9uw>=THwPAWuU6
zgm<wg;i;r)!~O3D_(SASG0xYwq*R`~i9FE|OM~5^+U$0<4z|Ue&2Vwt*;+@q<WO5B
zyK2+{2gJ`&pTP&g)8H#{zslU%x-hTw^Q75~^U4QNAiu%-*|9#0ciPm{bO$frbkDuq
zj6^zvI|J>zcw3~0M|XyJgWlB>X>0F9uP3;(JsJu|AL$A4dVh^xQ&nB>udd<cfu69A
zUX{-$^!{otzEoG$+y;c^dBhz$hpr`W^;y2<4Vy^D?^cftOLL#4Gm5X@)R#jqW!XP3
z&CZm`KKqjHm7(=~O-mp$qC(io%>O7iHE8QR<L{qG-!hM$f|1V7_TKi$u9m=~k@g*d
zUBQq)NF}?ew|z&bHyY~N6bW=vZ+B0$ZFX!!X6U_LI|9+rwotSy(!ML&6zK_3I27&;
zMX4>^zN-!Yf!%Gw<8kqaX9b{AQr(&VSJF_=)qgRMzAL>2V!SKM&Kp^JT;OM)G}K~z
z-mI4X=1jfJU6=g5KMF?!+tEgQQti%6uP4+Q@JB<tqvS`_0rGF}?InLO5)OxUMYC-G
zKV6Q=BAXm@j2P+n6WKvSH#cWiKqsIuAlXkW9sJ3(QrH*kWcH#ctzVVa&#i#*IqRl}
zXJvRwQ;9~{{9or+W3KS43X=U~)_)*diM|*sp6oWO)KVYuZ={o=E<I3`k??bF{30#p
k`VJNCPU9C6FIi7!-Hd7>I=7mCXhCYk9hrgYcJBQD0P5ea4*&oF
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/comm.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/comm.o
new file mode 100644
index 0000000000000000000000000000000000000000..c129151b3edd5eb3289d188584e11c4efc17b01a
GIT binary patch
literal 2344
zcmbuAJxmlq6vyA)p@85Q2Z%t-7Q}#&&D}*4k7@}~LPCu3pt6u<Z}Bef-JZJx;lo6%
zZ7?y$4hsveu+>UqG%*&|##m7qOAVo*xafPcGcYbUvG9?(_n+UqdGozIxH^3;nMi=N
z1iXfWnxp_fjvi=>OAFee4H|22>x~pV-syn7G{DAO(#o$V;4+3h`ByPu{pMT}@;e>Y
zUSsY3*1Od0FO9V~b?mpna~2Zy-8Ag=fR(3Q=|SisA12`#`EF4M^qWbz*V1RLZntjs
z$J?omVyL~?Z>{bW#_KQ8Q|xY<#{R&^hRKPEF=Kf0`m8bI`<_#>%T;5+4-8gvjq%Z1
z;4hRtRDn|}GuL5@fotT=+-NS7&70YrF>D8wQB;|c5#nanpq6YVN4udh+Upkh^}AVf
zs_97pr0}nqr7%<6+Bi6Tq8-Q+O1zAq4W=12vlJXTgnN*5Df7G`BF>>dbtoF(f`(tw
z@F@+S)o@qCS2X;ghCkBqr^so&a-H|FPPU1q*?M1U_$v+nsNvr<{JVyO<5w!C14GMD
z4yUSR217;8xL&ja7J7HN4(wvt_sZ2+ZPI1a2*C+ht)S@84VKD|%e&S*o8kMYsLb>4
zL~V9pSGe+grw}Z0Nt2p!Lk9bU@*0h?FGMn4j|~vT_|?$&+^C%f;i?n&fh>&|S-rjT
zOnPIyFA9eN<n%F-HYfyfdLz;dA&ASd2n{LxxX|Q=6@EhD7ZrX|;TeU?ITO01@Y6z*
zqxV8a^NHSURJS4r@%7FK9^ap$CcY#%<?j}nTutHh_N6TgLGis3qF-0|8HGPnxI7C&
z&lP@FXzt8#rNZoaFhdqZz9d!PdbY{jWd>%^W;U4fVF)JOHMh#t9RHyW?2AhS<=-IB
zX7OKu&%#Tmo*}UTEOaj|EUJAXh_+41(I`L3=(`Od_vXCd@h^X;=!eaJSsc^7qnx__
z@%VT>i+zd7dy0~q9RHRC!pr`uPsU=XS`q;@(b$Tt9ZP)u#Nu;D1YZUGNfpK9xDwIZ
QY1V&B9O#$~6h7Yn5A59EhyVZp
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/commander.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/commander.o
new file mode 100644
index 0000000000000000000000000000000000000000..fcfcc0c2687c77996ab01665b090d3c00496806c
GIT binary patch
literal 6960
zcmeI1YiL}@6@ZWSs(!_G{g59dZFH5GR5tbMQ3b4!$Cc&83UY!ft!crb($(tPTC^|r
zUKtA+vP#o7ln}JUG$|PDnEvpZ{t#_SvfwtV;~)MJic=hyLZA|aHvN~PxQT*<dd{75
zc1I)K{%HSZVE4>?b6#_1cJFBQ;?pOdiPhDCv^sbPY9pZlGy7_NC+s?~9k#*p<nPPN
z7L=xT7W-`|_Ad<7l^X!2e;k9-uoElo#{Ruiu`-%mn77~%oOfOyios%2J#<)5{BsOn
zdr;>s)F+*nP)?zr?qYq3{2iU$P&&(VVn4e9?Jeja8}iZA8Y__>ve#ce&Nrctd#8?;
zhju~5?T5~Vfv)oM<oj1=t--sv&S})A7wSRj=*D6{*$>5>#lNns>@(+Y@cirsXK^0q
z8*S^O<;m;e`YFDw{bh{1V8ONd7O2cGK&e>oERx^Gdid8IKtlXdOys32n^oNT7N;`z
zlv8;MVC?6pr*gd+=1TUTkWXv(wIb%%jqxbvNDL|$q&~le67eGDr`JRGBl|_U(!Sio
zJ=u#jBLAPGfA~uEG5<qz)}BMev5vhj#u~;_F-XwfzK-$6hjCq)2gRAU_FN-9lEfsp
zv-d-V_|TPDiE^NQpxPsAkU0O=;@rhJzliPa{Rh`}z4}s)3sxQ0q2U_k|3%U&)A@N9
zbGnSNDPA$=RA9G?{RZ|iMs;0(iS6rMiNRQ^9ulz7-3b;vO8YT~{%Aj5+NsXb@OG#C
zJM{TQvb%icwJqi0?OiDELwOYCR+PlIp*)6id)e)GDzwJ8zJiKcr`k92OM6CnQM}7b
zD;?Bt{1z0tmR1sf$F)vjj>RX7{dZ$^y)^eX%x^Q!QC^f2Y;+dsj7wcf2R{qHad6)*
z;b-B}Lr}T&7%WcR*!X4fr%?G&s~_s(`F1+#ysLV?7oJ!0LH?H~|9G_tuwGEtOFE>#
zJo$$*?JIq*=Y2Y(|NZ>l*rm?QT%%K2p1cvB*Lb`olN%XNdwz>wNVX(%nT(qq@e1)I
zM!@EKK|Ytt2Hzj|#yuS83#nWo6--peo;TL-`Qz!pe&Pu`Ka%J_`83&89nk=rm+eWN
z89m{h_0r+k4|4fIQz@MJ`t9oq{O=W*iZE@C;Kc|I$Gf{9vzw1Uf6`9ma_Qu#o66d!
za|JsX_3W<0`9kh=DviBDax@iq$zZ(T*`4wB!|knYo$<DIyV)&d4r8zN;6dW?Hk)SJ
zTH7Cu3aB`K)&U<sE9+@l>pt-TzZ$Le)RERl@NcZ)+d{II?+7_%wYFKXVGUG%)^faG
zVD>fsDqGsjWh@yhKQdxv6s@6tjc?+qCz;Dw<O$|#9aLM@e!v``lVOt;{)qX0=91SK
z^Q+7gEXSEI@mT!O(1MLjYeKDSE&mCs)M@(oFbLa4<}#Li-eGQYK$-s&^BLx{UUFuE
zRE0*WseIP*f8unVrr#q5C@t8cjZ~M`zY8s-Nj<h8lG@80$!|ySmI&Sz!C#2r*$6&?
zJj@d%wHYPgwFv!RM)0@UkJMSt#fK64A4Twc><91KVLO6jYFlu;Ufp&^@b5+N0pzsa
z%ls9wRk;V3`3!TL`FZBInOFC{`mDyA!GRGta1OHL>GS|!532WqV=3PqPJ70^VfC#c
z?fSvV{D>QPkn*3+rUD4OOup)hrUwF=^|Iuvc5%r00~7w>sw>HJXELx39td&;_l(C=
ztHReTR$;Li9L&1~H{)xUlj_pLT+fA9pYDQ(8B&_5Bq(&;%X)=Wa=^=uK(Y|zyX7tw
znyn($B`J>y*B?9X1&LI0tUEWJ4Z!t%uMj-rrqZ>G6xOF&A{DR??_R4TRsG^>@-@@v
zb3y9#gjoCG<a6zb2-}2*`x@52x^PTRtRdrNlKF`UTU{|?#bNlohc%M=Bs@Q;jnKuj
zSvMJ^&f+yQk;-_hrn+dt>*HG}{ehy|Zv5OxpNM>a?=iTo)PeN%@5W~44<K*kK8X(Q
zKWOM5V@`fHai4^IUMQ~4={ZD={M%tqz4dY5%yUHJdY+@q%{<R*`g&Y>UYK#GH9t+<
zCvidJ4{7{OjX$h$dOlI3{PjGqD;(BYzg5f{+~)C3mgI-@h2Jtb58*a<Xk7;cqP)X>
zbH6@jPWz?jGiUHt9)H48@)7>2!FdRuamUPO2gajjp0@_(X5E^Zlb=VFY53lu`O)*2
z=Y_1xVVlP_|GK_oaMAB!ZstF#aedzd=4PE=*8J<|;T6q~%{h{|7{M=V{5zWdEsg8>
z+|l?!O@A(ef5zP0m(Q7-`?AE`T<<1)UQ#pnYX@^v-`4c)&{Dm1Fuxz;(2qIN9@q5s
zb@fDW{7oxt=DJ>CZm#Q9=4PJLnt%NqUevf=|6gld&+{g8%18fR`hYp*qw_nOpYKW$
zP=2iG>*uQ3Qc6_+!<s(+Xc;!*agFzBT+j0b=4PHl%*{Ll&5y15mwT4fU!F<7V*S0C
z59KfXUCqzKnxE^;#m^3&yUCpH&*VqA+}A{3YKp%_hE4WY_@~UxbBn**g^m2^-y2^V
z+)-+<#GLA*>&wGHxae=<&7-&n*ar#8i+<uJKR@I-o2Bqk9ye>8TrTnWh{nm!IUYmY
zpU4F6Fv_5y<f!xtUfPWZ-njtccqw%uKJ5DtFXU)I>TU5OGK6?CnNibZ6kZkM)r$<y
z;+@9B3*7(RZ1jMo(EegpE*&LcKi83m)pH=@2e3mbjsTYXzo|O6_)pOLa7b~a{`*;v
zKJ&zRdzs?C7;$BSboEA`UGf=azpN{>u8!JpKt9`bh<%CwGlNV1l81xy)aS2_s`eb`
zKV2oNBld!OutWA{{&_y+Z%ZIHFzru9*f(?C$-mxA`#zjpZ~x}@Dytzjru`#Zv6uZj
zjf_%k#h2dl9RHLKu`kQfrCB>Nxy|-7T*s}*9>kX!e={<(c8H)z2H4&(oJ(9a3$PPA
Q>)AW}|E-)TvNY}g11M!b{Qv*}
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/console.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/console.o
new file mode 100644
index 0000000000000000000000000000000000000000..134bc8a91a2ccff588ea0985bf3a9bf5fd8b77a0
GIT binary patch
literal 3728
zcmb_eTWl0n82)Dmq=3=hC<=zoHiVRhZnh0gI%s4l*oFj6Y1f1V6FOZ^*$sPXXJ$>C
zny@wT2_L!!4G$O=UZjLKQ8B4f3J=ByLyQ<7AX&V;@dAial4kw?nRB{_)7>}EX7-%(
zo&WOvmovMk-a6DD(lii5gKwa+6DUCai<PzIFD=*r>tT8N`?+Nu3Xg}ixh8<wk&tEP
z0d_wg-Z!^Ay?ALsKlZB^g2E`|hcw9lY~XXg5vI_@nS2W@6#=g5h=uT>bHYbZK8*5q
z2+Y<6FlAeKJ_}%(WVhAO?<`Nx`~FFnI6T&&<H^y`Tr<jjigy0_0}8+EEtiWe))Lun
zT>}pn0AeM*se|l3IogLjZ}~inZI*eV4GOIuOk6^l&>Cnk7L3zPbzoj>1M>{pyN|Z=
z+*UOkTJdv?WB$?d^mjh5wl&tb#EbaMU~Vv`-Ny{;(G3k^#FID@XXO8h%&~~)Bio>{
z!ttihG04SDqz7m+KP2{)kK&?b!VAztaZn7&br9n*PZ%MHkuS<?5o5ft2&Oo*G1luC
z-*v<&M!6m$)_djh<{3OQ49g4~P$;d1-I$-l;f1!-;X2FQ+YS@Owdk)I8gA(Mp;pjN
z!tI$Yp=LPTR|kbnuR-HysIOrj7SMkfpa2j$eUaDv4*LHMeSD2)CCstlb|1N&>Ok9g
z{$)qN@&2=N>_?QPc=ON7J-2YJVXZzy`xe$KjJ`;xsU6IH2AHLP%dx$aFcDrV$L3MC
z4}E@xdAN&fsE3AMaHd`g`l-^-8el(Y*vmRxZbo@JFX>tbakIBsy_l<xnR2<Oq&NG$
zB>J6XRZO){^%i%=L*63K)Sr2bIjC!JfAW|Ukq@fXdCbN6MKE2|lWR4CeJS)%9{U5}
zjs7<`01WKkzsG1Fc;{Usmd&Q(2|JlF#<Gs#C77|VbKJ>}B~!R^;)$fk;$F^Sh8gMZ
z?2dMsk*;o|-FDKQxQg!FNqD5opp&j>cMrL!I<U@wp_Ho~>Q&z`06KoE4IM41W1|m{
zm(@duwX49Fd}KA=fVd{f3yDB}wcl1>zJdz|J2+nF`vEZcOc~OUe>>lc^Vc~Z<+!jz
zTOBX4I))Kwl=3#t1&-lduL|Sdt$}}pIN1^U;<Zi<MtB})8neL!U*KHL{(KGmC&bB4
zJrC#_pYPR>e^>+Gh<erhZmEHX5huU5Lue4kkzj&Ojz@WGr8o}pY{t!|SR@YHCt>?>
z7|o51F{eM5O1<r#fTVjclk_0XT-QFqV%b3_neo7#%ES`_9A=s0$;^p^?qIMG7JbFZ
z!#S2?11!UwWPHEFY>&Zn7-<WQ7;`<b9?W@oJ)M3hn?5)^#C3*PoF(69&w~RJ!h_+;
zTx*!6?eRp`VKMt8gSg|34=}IaVJsFf8MNakndkZ^L?_r|c<K1~l*9)mf?V~da&Cg>
zPxMU_=C^ViDm80S@a<f0lY;khd@JH|y$2<n?x+~_gGNKO^Iiah>UW&uDo?M5{Mj1v
z=QytVy~1(g@4s;Q{y`1-r;_|8zNV=i^=YU)cX3>e%i_4oXOQE>XLDfE|DNPH-5>m)
zwla#6{3|Ocz!i?G_U9$}S0(w|HRS)4<mEa(s3E_L-(S^ll;e~i`R&*%$;<cwj#D1C
zNIZ{7xXk}!$&TF5e@pT$k{ye`Pt<xH;JC{F5XaTJBqUts^Fa+eXE{!Fl=BG@cPj1K
zqd0p`Fek*yVJSP}u}Kdi$8FDs$f)Z=#K{Jmcs8A8_;UMyhJj|Nv~n%TvPEAw&T;<1
z?)f`U*j9Wf{}w*-=;c40vs`~29+DsNdn$T&2gemRa90Jmak3$gUAQ5es(6V5U9vEj
zl_5GOo4jpSj)cDWe<2P8f3c@O<)j}K0H6Qj{*NlS;4jarZ&I;%Q(xnU<o9KKgnyC0
k^@yplBLq)*LH7tp1maM(eot1@{~`Fp27Q6r%D1ZjA3V|=_y7O^
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller.o
new file mode 100644
index 0000000000000000000000000000000000000000..5e6088bd234aa7e1ccf0a4fea76c74ed23b76090
GIT binary patch
literal 3816
zcmd6qPiP}`6vtnatyV2k-R^GPKXz8SODc9q!U}CsoNl+Rh1iBR3k8KVO{SYbl8KWE
zbg5tj!9p)x*h3F4^rBetum?d4B8#AS6x6b3QSrFC7kjAny_xq*p1)>1dGM9wz4!UO
z-}m=s^2@K2x2ICmk*+RK)&-wIJ5v<kw<p@M<%bsZf)BR<ti5~D?Eat;{V@W7Ic%ZE
zEepBP51VkpI(QI;k0CO+|0s@i<Lg5l{{_dt?(g3Gpohl0{qc_Td#wYdKiCIv7Nd|k
zT>o<SFbcOGE_UsnM7`w*>_G&sz+3Cz<JwynQNN#jarsXJUfIW<ZWGT(ti7MG7aDIy
ztb>P(6T64&Uwwq*{m(&jf#$q}d<FIXI668*>*5$p&d+5Q=2NMug>mD0y;QwnT&f$f
zONC)0?^He4DVJ^cajctjsy5Z9XRnci*X(i`t8LfM0A}Z|%~H7NH41jsWBNaKGn13!
zMr>y8x{-05a=w@=RgG20HN2v2OpMfAXSGzu$jui^o}Kp^u5FB&$&q9{F=i%`Ml9!6
zMlgyG4-+>N28|@*$ru0qn(?!O6Y%>{r>bbj9SRV|zfKlKCEcF%0j+Y}qJTS8v#0z#
zj33v>eS}@Mc{`#$AJNnS0{!Fsvai$TJ7Q)OdPEk4<LI6i_otUDQq21}H`u?<Jg)Io
z=4s~V*{?CLajtgodzdS29`fCt5dKLB|1^Yu6T<I@@LxmtUm^T7ZiP<$KOe$h4&mt#
zo(<uR5WX40p?%z#c^F!Qp#tO^u8U{MWa}UjMbnLH-YYrPI^3{DMdoJB7F8L$?uk@{
zGqyLEtH|2fYRQA_Oltn>L@GN!J-s-U$z~?5rlztqt?rcVbi>1Q!UenLma5*WP)nBz
z{`B@mAkh{_B4)JCPi<a{YqMKiXwaFfO(&$y^iSq?V|+ks^O$N=I~?XG@$-}4c@<yK
zxY~1iJ)Iw9#OeQvvH=cGX<U6jb^SQk>-tv&m-?e2`Y$op_0vK}T_d54;8K5yx!(U9
z%ys>Dg^twU2&um<>gBrI%=LBO7xnlY(K31<AUlWmIXIhxoX#yWx}WV+8Q^Y!LGS-_
z=CrP?|AP4#a`jmg`j+`w<fk|$_Z`QyuI%#%=A?6)V{-R7*83S?PLF)lPmFUzaH*rl
zss0StkW>4LxY8s(N^fXNU)5PY4fr!0lY3S0vx27uKPUK-;MBibZ&~p39Fr>wenIe>
z;Li%aCOGM<{+faha!hVRaD!uVTO8AUxG4Cx;H0mv6U_R}ikDkK@4105s>rp=In%S(
zJTMD6F9+sIy$+`9P(tMia}-l5@(D&b2xi`?RQ|I^OaptxOZmqh#uO}iL;E>!t@plG
z6a@4c()ZU2($;$#e-M!E;DbNeWB8(VdMH5~2pn8SPh5Y(8zR`jbo>I=kY?C?dA5+8
zo+przW|9Vl#dx75!6;Pyt3IZXQLL}u<boX>lcwe?W?|6j{ym@@hPKT*l+wOZ^VR)Z
zKt?5Td`UC-zSDD{G?w${5T~3=Wf?RX#`(hN%%x{*eSPXnzjhM3%a7D|)Pe-jwA4R?
QJI&wV-=$&w2WkL+1BTCLS^xk5
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_indi.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_indi.o
new file mode 100644
index 0000000000000000000000000000000000000000..45007e75af7d080d7eea64703c972389d7abaf65
GIT binary patch
literal 10832
zcmeI1e{3Abb;sxKDD_OSGEGwCSyp!Uj<j@&we<0)PO=K@k(4a8ip|n=z(j8Ej&~=K
z0Li0|$CRoJ@u<=P5xWT$8-<J%HEl-~DWs@?A_x^^U|JCb{ow#Y+@$)$Kxw;(*`O`t
zDvGH_3j5yf8}fO{L;uJh`J-N7Ir~2Ioi}ga%+Ag&#}6Jo<n?%jIy~YBV$D)ih#NcC
zt}Xl05?jR|isWx5x`GeS=I)>R;T+&;IL~^@>$UqnarVP6o$2aLT*!sQE-g4+=z8N9
z7jmLGCV%;O$>3v_q4}aQxwOkScm(RhaNd5#Gk4o3E>?-cPlZ3E^}>0lQrx}M?m24&
z3@sQ4X^Xy6^MhkTim;)5@nJ)=Vul8NzUl#gcs+i)bocn_ExSX3uom<Owc6-oT3tA#
zg`y!X6|U7L!;figa0UZ)S{s~?hJ#wN`T;Wq*Qrv!Y5Rh<!f$A=hr}o2r>l1tyxU%S
zwL+X7KV7ri3;ul2#uE*KAM^>n;1q#c@L8*sKwOE6ZDt!>_inB-N6v_|2_d>gi6!4#
zS*f}GOl<B>rFC~{SNq^EAMY5vf9l%of-nAa-SGVkPw3yy;r&x@&tVSr5^)*MyZVA>
zS+~5)`hs^EV_byXCLp&0@`g5^_fNeu3uTq^MgBfxpMUMOt`}ds4CD19+y9F%oc|8y
z{a29p+dj|5^Y>Eko%e6ra_5+L?vBrQ@x_u&fAVR{H}`Lw#okYS-iyYhby@d|=NH4G
zyKsEAD^X#|iLcFec_0oP=W-*c{Wab%<QuQwU0DI$e3x5u9yE4*kVDj61>MY{*Si+Z
zUdUBL4&L#?JOY2ll%W}ALI!|k9uO@8aw2YZ>`VAX^N&IEp>Ny84}6su7kxDsQx?=g
z9uj|PT~3xhwR;9MO24p6w7dcK0<`hMSX>E<W{=;JM<HJspJ>KDv5%iaeI@j<5VB<Q
zP)tI5iSbSPM0e^N?PhYPC3{6wi@|BY*>*rw2H_NNp7Dy46Pv}!La8`;=UCg^r>XWi
zxRyBP_fK85#~J%jF=3yDdn+w?uOGra7zHQ(e}#GCH()Mr7MJ0?JATEpJl^JA9>3yU
zHg-a8MFH|%=<>q(5oodfN00|>kACd=KzUmH^-9ZXK0aM(!TV3_x1=zHd?P4YRL*-#
zEs1_`KDEKz50wb{roNUx1GGWNm(pYIFMQiFJ=hPlNtIdh@3&g=(eju~oVG4cObY#4
znb7O1V)DZ&q1Ogt66ehXJd-K^PVG&2wo}bQ_D*gx3n9^+IOEJK5ft5T!94ge%!Av1
z7bE{-dK0WEz0gm`_-xk|=-ViN*8Dcut=5;#VA)s9mcUodk<yU%G5C$nSn_IVoz^gK
z$+t>twY>|LOjih92<z^ztf2PM%O1U?yj(YaWXZ}-Vb+#y)*~gy%#v3g(tlBH$)=ua
zGx}XiHg|6~Kl*05zW1snuYupzCCJ+=LjT~K9{mdV@%n`{I%-T2ZP0?&BW5rf(dwT2
zbF(4woGJW`TFbH}gHVRbH8b=d;P2%lW+ZG$V{)^32K?0>wq)MltVKG7yfRg-S9O)>
zS4wO2z4t8H+HJ|&ZXs)XEE)R7Hod{J<g1<4dTaTYOz%rIdbGomd!GZJKlSMidn{S?
z9<V%UyLI!~Xp0saw&eFq8?_F9oz`5o#jLBS)>{q;xp&Nx4gRg>zTqzOYDGYgmi?*O
z7_sF39WhzErB-{QV9CaGg}E<b$@Z-QJtShX?v)ySU)qws2Y2XSUOZ^N3G48C`<t}Z
zbC&!#9Mz(emK-VFucf|Kt$(%Il8OC>)&%qCT6n+K^nxWVm``=DRO(H2G00;R<mf?j
z@84Q-XTf8NaI<y|;`M#2Mz8IuG+T|B{Mg^B?SkBX3~Ow#Bql@tm~1YK$(Dd6-v|V?
zCMzb-d@-bbefu^&-xky`o}eGso@SW4JGJ1H*9?YXeTVfvT?WsK(WHs@;e@#w0gc!p
zWO|F}Hh>3-cLMjoGm$P8-4^gR;sVCBJ=&-RVT?D0W3psVOwL$BpXl)D-a?7#jl`s9
zkC0u5eR@Si$XmZ%srdlb<|M4mX;?$>8OQlr3v(6MOI!yncvjSUSr9%Q*Oz}#>*4RP
zZsPNceg!;ZxMuzn#DdSe*x@|y6JA&Y;n{izo-KUd4bbAV?uD@mK^?Bgsy+$NGPXrc
z5Hubb4-c$0YVBJ1*^0B4R#_6;xBb?!JupV7{WbJ`rp?g)5!y^Zc>&4-l&_-?dSCUP
zan{qfpf3-urEm%##ue3)@O<&L^_{Ik&Vo<1{v<SKy;{9r$UXY~1T@L*-~(b#z_=j$
zcVJNdzdnw<ee;Ree{%7Od#zXZ|7TBYR0x>GtLH*Y2<M#pjrb#VLc)NHn8(iC{~QwH
zZ`xD&+`y5iI*!-~{-g%e@qAxybR_Q(v~$^k0bW1cpHKA>!1|NPzYsZ6<>F3l&Za_)
z#*?XhJbiK~K5VyGv!8d_u=Rl>J?aRdv;|Pw70IC!;3<_Ei03lLLGoGqd6%6Nxnw>Q
zPali?neA05yTN5QDti>2!U3h-FO+t_PY-5JB;!;G^~!dlU$dR)g;4i7<hTLbsTs*<
zhvO{SPL46vnUTKiK$^l7z1h*Bv@MMH4-JpfC<t+)!HEw_yK5+I$0r({mY9`H4zf><
zl&#`awu%#NJ4e)D)uslkHZ}O{C<>u$<zLy#|MC8Td^|Op&mKQ+N5pJ9@a$+llRKKt
z4#!gY{;y@kgi3&``~#P*%+I-#iO=)!`^`f^O-NT+Y(8&x>6H07cQWz&%7b4GgsUvL
z>{av0_V)co_{pc9HM+CefmC0zf5<qV%^CT=j1e=3b6HsN;3}8u>(6IW`O#d)*jL{O
zd-H~U^$m?iIGGzX;VQCwH}d)h18W*0jV-G^Y<Pk1?h^6I%0`vG4ZrjV*y8y%k^?PS
z$182(>=4|QKC#J-1nh_5D8|?K`!J|IES>|@6@K(Uu51-SJ#mYGinxt<hl@M$C>4n4
zcm_%jyWeu+DdNgjCB7C>Z;(!T948(ouJma7#QNFm#Iv5iWcyj;H@xJ~_OpIAI)2vk
z@7R9U_@YXj?Wc6jDP6(u5>WwnrjEmO`8EK4FRK13T%f*_bRAUjFGckKRfKPX_8a*(
zfTRBz@~`sTR7C&Bq`yS^WlG^!is*-n@V_d;UjzP-`0o{!(K5Q<?-tQtDZ&?va6gRm
zMtKma>`)#z+L;_|{L=mPDN#2j>e2!Y;odFLF41X18^v`y%49y@pC3(UIx-{uxlCHX
zmhNfXb=li}*sqNy^VwXtv)9M1pwh+T1KATJYn#=0d^nj)4l;r<L9hM!IBx4Qxe<|1
z4jpH=fL$DcdZA)yU%fjU4`)aE^ZnVO{~IeuYw1DX-5L0Ovfj6iKdTfQbcH{6)?*QW
z^61lTv7_;)4;^~uV0XMb)^_w@95&?XllD$|WP=X7G9#IMY+#`CNXG^qdF}dO?b=TK
zDHWrELN7&hT`)7aOsIKT3G<AvvTAN^bMZ-<$BzKtPS;r6D8kkA?)Kje?eTE?&l5-g
zxW=nvlJOl1LOI3w7Z{%=z8y+@C#XZM56BG#q3ou06XR5C2UhnG$2d9fV|t#qVW#K&
z1;)9bY2tXlAr{XJ({n$U80UVj6L-h|F5}#fdQZ6T>z|o_u3sen1&EXL2pR72Z6@v>
z-vdm~<L_X4&O3=?erj2M;JdqhxZ{7di2fYY)1}@1663tzcZ={v#<`zm#<?FgY20~8
zkjTx`#4(?B?0)l1PnUM>_sG}>`bU}md-OhY`@dR*zh8tK^uy3Suj+`q^Z#-YK2wCh
zUxeRcoagx-<2(;#^rCgg(@Y%a&rX(~DC4^r?<DS?=PwlT|1$FvW`5v*O!k5O?q-~@
zz<;e$%I#W%G>WVBSNTNF^8g>}>_h1dvMnl=Uagg#jAOqMvU?au{|4E8jHBKndzf+5
z*O6Ud9QB9Eo?@KO&vT5UUd1=VIM-id9Q7*hdB(Z^I^(EMkbQ%3j6Y2FBIBr6_qoJ4
z>i3Yn%sA=`WD6K4JXHQ8jw#9+NBuPM0ORPtoOqaV)T?|&7)N~-=`F@lKSNyY%T+u9
z;yo_?Eb#>6=wCf!!;GVUmG?2mQST=|>b<Py=XK)hy{zI<`;Qss2mRk9{Ve0?znS<v
z<EU5Tw7@v(qolvVIO>;)-((#12Z%2*j(R`Yw-`r#59tNHAJzSqlMeUkc&Pgwb4(Fn
z9Q_AKZ!nJj&yhaDIO+}3M;S-`Jn0WJj`|4cI~hm)P0}YAN4-UQwa-!UFOz=ErSBwt
zfpMHWYW_?!j{bW{e~xj~s`)d^IO-Fmzr;A|)%;mt9QA#qSN_zvK$U$MR4P73`Y_{|
zAN5@z$~gL;CcVWt>Q&x48ArXE$32XrUXY(Y#!-KX_%P$BFCkuF9QE_Wrx-`Qnz!c|
zNBsinXBbC)8SzVuqy9SadB#y+PW(FKsJ}`42IHu&BEHBt>X(QwF^>8G@nyzQzf4@^
zPtDIA#8q5seARQP{3*Rb`Y@GBub$5c;}}mJ*%sp%PnhQ4Va8Ff{Pr-8diC5U7)Sjc
zvWFQ*{bBMy#yIL#d{d00zK8VFjHAAp>>0*U-$(jc#!(+7d!BLBkCA?Xan!5tZZ{aW
z{gW-~M@|mrlf6*pb57Z(u5y`yWPLs}mKXKuWIieCdq+k@eJ+az${XsVV4?^<EYz?5
z6U;&Ow*>}M*}=ig(CYuaAhh4<FrYQw0^SQhEHY;OoUXmc6@3IQaJ{k=pmK@+13kRS
z0b8KJew4ca>2?yw9P?v|glgWYI@Mm;xNkw`ZXcmfdr>8%(%rrRIL1Z)CR|mk_ER(;
zRE27<hW#M5clSR}3;2y9?Ug?ZE;h<v5B=!p`NJ_%{j2=-0K-_^{ZBmz5ROF^sAI0S
zCsW{e-;Mge9&!}Z<QT^f`*!!=2MoK2z{!ukhaBq|hj6XJ;iW4@c8lxO{ucF*>BR3Q
q?*1PD=Dv4yFux7|3h}thx$4)c#c!D#x9`D;3CHtJvHI8D{(k{(2KQC~
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_mellinger.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_mellinger.o
new file mode 100644
index 0000000000000000000000000000000000000000..9b587cebd896dbef3aa99f2487fe2d2c0b535ff6
GIT binary patch
literal 9440
zcmeI2e{ht=8OQhT^5ZTE;a9*AVE4WJB7wXi387pdk~hCdWPrhNDpTp)9m$29$tB@(
zDquUk2uMal0l`XVtOS*x1*KD`C3Rj6%2eAy8auYtsg6PI$XJCi$Os)ReV+H-O_rBr
zoc6!YbeT81&u72;?DOvKyYIdUKdxP|%x<$0k!<8QWYiLr5Wjo0tQkd(q>>4!-K`L^
zr-G1v_6^Br-`Mh58tET!`2NBa$Dcu(hPk*D5^E53$g-D`Mc+R1^099nWY5(#wqsWv
zw&Q8wv)fMgd_F%R{KcZgaG*%jzixCKyY3*zhgLq?;P)SieC@CwZ~b+>O2`~K*Qx2(
z?zbPC4(+Zv9LG<Tx#=5rO}{uNKHTE0RWDUI!+|PIe>|TszozNUnwy5duj#F2nKU?M
zx$5@h(HmLhM(3<L^~ExUu6F0rruoFHxwGi<53{J~vj=>>4sl^@*l$&wrq6W}y&C+@
zR|p#h{aFw34!JYw<qtDQ+U>FvU9`!EHvSyKIu(T$EP_5DC+jk)Kce;j4E!pIL}zhi
z<G~{04V-?qp*!nnWSeIW9e}#<1DbxwQ$%y2??h*%>gughE1hmy<(x-b3RkFy^K<D=
zR~B_l(sXBhB1_p;t^UKA%)Ts5U@b~KYb}UlI~S(1JoiL4PbEw(O=AAXw0`C!8%Z(o
zV!s0mh}ZwP)}I<jCZatA_VFjHRE+P~>(y#3FPm28&!t#*Ve3>i=2Ym=Yed)Lh&MAo
zpY}pL!+WQx6DJi?2lyC*@k}YPv&?Qgi@6G@M(pg9C(=}smqlT1?7J{Sp`SeARfqT9
zqgFxNUYDD?omsRNuG}66Q%+^E?N4Q~W>+rtyA&F9<<OKFDa>xOGut#9`$e&XJ@0a`
zllgAiqA8%6N3riu-<YnZK>ttST-ltg&o+UH{`!_3Xc*XYB$5u}IP@#hf8OPxcIdYe
zu7hw5R4VkjREK&nljzvS27ZwhLXP&~q-yn0rly~97SMNGne@!|92W1)p_9+%vf6zG
zOo98j@DkDcNIbjpbegKzCmVea!M$F2+N)N%=F$tF+@oepQedu@Lag_y6|Q`GV~VC%
zr)02KGpbd6RgL<jGn=k*Wz(mf`LsMqp@(3s6}Y~a?4j2tX0XfiN@zoB2J>ewpzk}&
z=_|=ObSu=~4P$gBS)n_CHDt_U{hul9Z<otiBltP9Er(@In9S;C+gR~Dg_gRO(DOSf
zt9F&qeS>aRoK!?tc@o&xlz5hyG>7gvYh#y|B(Un8g!O@bpR<(ST|0}FgZ|QQXR{r%
z9IR~Koph0BDfO<lv1f*JSuV`g`QK--64z4t*}e>BpIbzW=N8ki-l42~<7{?0RnwQv
zn8{wv%c0xrbJ&kyEZ5yVi_MumnLW0D2D>s{(`%;@b{Xcyzr0#~x5`atMH1MX2N<jJ
z#6yf8n(Fk>?vFCq^K>R_0Q<sp;yqGQt6nWzF!J2>m1ueb%<+oF1@z6bIW)Fdp}m!E
zdeyUl_QJaC%E+a?Gjiz#*i!<qr^H~b;Pai0&sU13Pdpu`YT24TWiVc?dnS&>!*f2Y
z<j@z=;TebL_OlO^TiRl~1bFrmQ;43M9>-28x%Au}#7iLm-MU+~*pCAG_%w)d64CF=
z)AZmz!iL~pPl4~V(}=fESws(gu!v$@XW&}DMeC1GBl_Y`Yt{5pO<%NonYwhiPOVBJ
z3sEzar0HojPBpw((@8ziPrDU5A(`kC$`e&Jg?P`G&8JmQWK!*;(+#+Pop;S(iAxgM
zRXUY*W-2s$D(pue9X0CEJ^^;X?xF5-GBuNA(myROfoF5E(cb1Dn=c&LH3j{YB~D=p
z8xq(T87XWx^qFll{n+|;8NQJ965{Q)nZ6Y8^&C8dufsFAwI>Vw9c{2BlFc>X%LW(5
z_sci4+0s<Xwm%XN<LIU*Qi<1r_2BcAl0{zte}`Z`4ieL+8+`7AF|Z|*&DZX)I`-(J
zF17n!qF-H8dF<=P>SH&uv>O-a)P_HwzYN|fb>T}D_2F+HId>G_MSp<jddI(R-f`{b
z8kNA_fn$l|xV(EB8+u;Tm$(+vd{+gnsL}Lk?J!3NG~IO=^4DOWg}UXimT>G_-7bdX
zeo{?hUnZ+m9{+-`ZhA2mjEzBzW5vT9_zrdDGcW1Km@z)sZ_@U{-gDp0n|FwP%MZ`b
z1c=iG<3Zq=#y!aiW8sGwgzbm5k_^n)rw4C(2jHH>`y?|Nbfwj*8`{UgyVId)dJOhf
zd>6!sjp6&?q%D<&OYJQ1$D3Y!Pm6cpi_kaDc>tc-LJwh^Vcc*GkH8q-2{Fb)?uGm?
z<Ta4{A-@YW9gvqpZilwGZo*K9bB*OEq1+C8Uo)@AISv8~!Sn2ZJ<<;M`oPj<>c_jL
zsy~5uNDTH*cbSVRwu#IQ?+B7-?#l}BSoeI%E}$RpTBBB$B{9vSB_C{W=v#3#f-$7R
zeq9HBzkTl9QW#5Z=KK%KvHbSA6?olANM8lFp&Y9qu~%xy>7F{GJ+q9E`fB2TppL|r
zK>455<RYv9NR81*+sa@YX$&{{qAigJyP`;egB|H;Ycnm=?hHj6TR6b_&4GtWgsUPx
zvo>N-LIRDA!L}`gY-!qLwAj+Lndbl@g?zzC#J7p(n|Z#4bVWNleIh8(wRZY8VawJg
zo`=jl<ckE_Hv~<?)ESOJXXYU@7do?7Lc)QrE|43!SGwQU2JXLsw||)150Cf@BWVr!
z!bqT>j&N{8z!&L6cM!iBk0H9nHhb<iRJZ>~yd4?j|J)py|8yK;<BaEc<DW2&{{P$@
znE#b=7;oN5U3K+hC9iJPJ&L!Zqph(e5NcPNJ0eQ7C8$)Yoso{_P#csYjV+;Qurc~z
zB&d`XmZ&8~#bt%XB}!f(5>}y9l%J2huvo#G;-Zp;<18GG;d_(Bkt;XHQaQ%_awWt8
z|HeuV@MKNt2Ebl!PYx1)8=Ps7@%Zii;>+45#Umof<6PJxU%<K3=m+oJOqHCcSa==h
zlPr8C=kRT9B;jWb=jMHn`d`cWEK@$x?+-XvEPOrZ*%scxIo=;8(eEQr#&IYx=qShi
z1bLB#@8G=D!uN9SvGDzzms|MHIoB-w1<q?M+?-z#HLry1B||^TMX8^2VT=3?&aLzK
zHs{uPe4lgcJpP??>pWiJT+E~JhmV8}Mm-zqF^PC4ac-TLe9o=&Qq8$_Uc8)J=Vcw|
z)_K{$xpiLJIoFIRN8@~m^BN2PA?NiLzLoP87T(MGY774<=Uxj((?M?ErOowlJAc;j
zGs<INi{v0;)&(KN^m98uY4{oC*KhHYH0pqtUWNK8ILSPT=k>3gE1ZjYzs$LqN6}NF
z-SnezeJ`(=30$l}US(wNad_c4Ja-(fj>Ab~M|%_x%E5>)9BgX~!J#x#*hsQBk?f|C
zQ{k485*#5n_#O(jgc{p|EAcF99&pX$EgUZKh}j7TOye92_GnAvWI1}w1c`BEZ8Z+6
z@^KV6RN}dnA6D_q%g?&TvAbjB;0+~y^oA041&4AdL03|FRDmboExy2}P?xVM*cFNd
zn@DFQ_>edW<L825cLk%J9ijH<cU73543Y~I7-7ReNZ%y<Gvn5;4E~KV@~MIa(}Var
z@%h?1Hgt`APxySDfk+@c3PvXnzJbiSYY0O0(yWeD+|?c$lY4{k%`}E1(zP)XZHAhz
zW)g@7+Djno3bi-OtCNtau+GJr#~M+dX5nJ}&$e)dyUPH+h?g-F`-Ij1TCTDB@8ulz
z@@W9yPnfV@nSWtogNv9E4RenEW&KwYm-X;F7$aHlE01$)oGZrREfSaeEr;h8(@dye
zVit{`eVkkUpBP6!BysUhKu5z8hmY=&l*fax_Ir-sytUs!iOcaj`H{`4FCB+_Brf}D
zlDItnEfSaYJrbAoz5LZ-jpyBQxSxN(S=Z+_&T)L?aoaZzKgv1wdrO>R{|Ao06cK5^
z#Nlr~Bk5&{%X;yA;h&gB-;RVRyrtkmmnU%?A8~#VxzML`oo3OC_r7?~3%&5W)}j}>
z7Kvk=qQ6dwV?5&dk4YT$8n=5Sj(V}C_e&i0_1x~0IO;WSpOQH0MVzN4j`|vIza??h
zi~AguIO;{eLlQ^5pW7EDj{0<NUza%QTevNb9yrdZ7v~Q=Ut$vDFUB!l;;2_p1WD{m
zLchtxq{yP@m}nBmcw)SwUgGE<FHCDCj`|*h!hK5|wNB1EC64;toQrx9C&xtL1;P8c
zohNa8zEZgDkvRH4%56>JsGr2`)e=YjDQ>ToIO@~5-6C<+pXPR_#8EHCCnj;!zs2ny
ziK9N9+xsPs`ay2@NgVZJJ&1V4_`Jt;A}-{pS2!2_3;hu1q938>n236zALbPoc`o!$
zZeN!;#xHCl%{#_Z!*$m6?BqImJ)^#W>#gfqw3pX2>OEX<UC+X=yq-~C#P!zotnhgJ
zmiWc~V_nZ8zD<%I*Fq`x-y?Ax9})L%iDNt(*Y`;r^&V~?l{o5!|I-pjy|~W-iK9Ln
zE=+?GN4>cJ_au(`JQPE^C~?&9HYofk?AjcT2G&C!jhK0hC`E#8fx>8TQ<M}o!O4;o
zu7~f4!bk@iC@+RTcoZ5UIQ<riU#6SHH~^2b#*T0}*d7&~{`a{8P4QOn9^|BP<D6K~
z+@2(hpp4&{IIkL9avFsHEP-h^4jQCnxUe7LE*&AHT)2>P86qR4xXiqs+aklh<b=-y
z`n0xR%iFJ&#at_+Vlc4(5*b2Sv~R*nDT(+6u7$d>;ve9j(lH_AK16%rQiH-+<LA#X
z6@zv&$MM5C679wK-3M%}{x$w0xc(je!yiz`?7wI>R6rV#<`4U}_TLN)yAb;Z6piFb
zHS_zqEiw^~oby{05+mQw+lz&Xw}anF*8Xvtt#gkK_VX9j0*iCeFKRGNhHI?$!wS|C
Mg1=vslePW70n><>+yDRo
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_pid.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_pid.o
new file mode 100644
index 0000000000000000000000000000000000000000..56584439328e8718ca291368ab87f316790ed281
GIT binary patch
literal 5832
zcmeI0O>7iL7RTRAV=^%g@$%_>?9k>bX2pzb3nzd$w6P6F$tK7QS`?5x&3GJ-H1^E)
zw22*7Fc6&OvRa(w0E(hGQLNa$EVp1qqcyuA?STW*ZX%9Oa>*f=h_G;oGkLH3Jx@(}
zI+yG*W%X3OU;XRVtJgJMJwD&_%As&51X4oqDO4<>0KMxgZOdy~uoj+z#ou4-OC~>Y
zmd^fTcFBNAfES|JeRb*Vtr@I0(6z-hK9_6y`t`nv>+`7p%+pW&Y5Khf$3n9Y44C`g
z2+d9ZkowPbq;Ac_li}HihA}s>s_x}SDP#7VZLoB^0bVjMS@VyL@Z6RN{LyNJ#EwR*
zv>D(^ad4*Z!kL*qn!g#Z8>Sik3qWFeZ?o6FTP`PxgEv=brcpz&O}F^E+o=0r7$)zm
zg%VzSif>u-MSzateyg;I92%iibgcO#VBZ;Q-g*i;-d@)kqdwyb#Axi)J63GLfysZq
z3zN4l!sJJ5trF(pYVn*kPjN3cK%#ijZ{zp`{JAssJ&p@+wn}fm+ZCJGX_cC-W-pI+
zJxned>*r3dquj#PWW6>1;h_)uZcTpTn7GbWf5o{CcsYb);Q*|+!wcheur->jhw<d<
zh4D)fGiqGk79Fg&N+!0qVqXZaOKYEqy;ENoD;|W>g-xqtb!)8B#3At37&1HeMKG@)
zhM^<UY(|IbJ)U@QtaJ9^$%C_xQeAjItfi&1cV-rh{x2y1JwKK^zQi?rWo(!;Ek9Pu
ziTJv;RNg~*rZq&KF{9$wUMeRZq3(Pb=Felyc+Hp3)$J;uTfK|4bWLIYWbQ@0FZ%ql
z2QO^(_X5R1`(Q_dRobxuwv3m{oBjJ^#jaudYh&Xa#rdVNX>Q@5AL|{QV*>k%&swF0
zDERk_?@{Oh?wu&#f79>#8)`8&NaaRcCzs8p9kKx2OxEqn4d;Cepy1~6{fa0xJkakB
zIim&FSCCEPMNf7<<EDlfkUeg{2@b0q?sYs0V5d^)>|0d3qqduK66{-iiZAj(g?OLs
zrrAAs{R%*xXI&71RzIQHV*bkgO#Hv{P?W@Kb<ll@XgV>A($MR}U0wUlmcy?eHxs#B
zHZ^2tM$EySW4c3Wvon@=a)X&Hww%;Z#!chqa?<9$czdk9wQXO#t=(*~o#7a^T6gUt
z9&a<Lr>(WUL!YSHrn6-gd{?ffzGc)rc>oOjt5pp2q?dIbsC9yopE_L*8$A-lSNd;4
zeMp(Nkv+CB7h6WY#GJ-ak^U}hlOGyKMf9&?oA_>zR`?&7w`$yGzDMI3=6f}sXMRBA
zW6Uj$pJU#w@d@U=%+-t=u$pP5^7Fiszwh~}@N0@A16J;8-_J_^ch66SOI#Fz0rgZ>
zm4BhNPT6lJ_kNDG+#^O_^=$w*FkbRwvRLlpM&z~p>}I{($Gc&F;Qj!8e*iBA@Q(xd
zrvdz{01g;et@xt>yeEJw2PB?c1Mw7WAA{`!V7qR{9UVw_rwbV;jdu0<<=_z|UCNQU
zd|FnHN$r5FJ|FpXltVc^Qn1}jZlq_#KApu$`}?!GHwx<U+~1$K9ecQnRZj1tnSmoC
z8FxAOuI0nu!}(kxL+&+PH9nEXlV28J5qh{vSVPp6a~ymWcXH~E9_bDi(IH-2a5(LD
za<X3=b@QVxtc)89n5x0i0xsr7)E^l+<G)wXn~fy#5WZ~S%TA3D`qBlQBb%l9SNc|a
zS0=*i?ZcOppI@aXJ4)|Kst&(O^n-)SbGWa6>o>j6=ehkXa(c0rVseAHv<Y2ez8<-J
zrwRR+IeouXPR|D_I**{P7H<sTEzBwYt^QE&vo}D0O3`mq^jU>(SNOdEKdbQjOGRIA
z19N>{P0T6I9sW@7^Z5XMtD@hj=(_{-rxg7Qiax3E7KLA7uE&2h!2e7DzpeOJ*L7dv
z^ut8Tw*h|e_ncQKKfe<()^bA8PwvX8SJ`{Q<$RDe5~uwpww&vtw|EYzMKA9WN4a10
zVxLer`ImWz6i#s_+0HAR^zz<OR5<Bn{AGocUgEx{aMFw4DTR|>-cxQUob+RC-&8p1
zEw=xyaMBmqzNc`~ceA~yaMDZM-zc2)jch+wIO%0Q_$uHP$v=&uBHwq(|CC1onlycc
zxjY9%Kf}CL(>E};6i)F-zT~+f@yK)Vgr;9$KS_mC>?ZTP!pXnnaZKT)-_H8W3MakE
zT-GP+V!YfhT=Lw)0*Swu?Y#<D{X@JkKJ413v34E59+H-m&f0M|J?27uz;<njpDq+2
z?&QcId0Tuhnk2&4f_UXLX6U^cRN+)^csM=c${K!2ZQ@``8LdSv78^hC^F;b2KVm<J
z4a&bIfa`m_L8f^88ss#O+=nLC?PPASE!6=Xa0mHN3q5DZr!Kb`98txrRZ$xn<g;Cc
z*p~74H7@Z>96i`iZGHYGN(vVBcLmupp4wC_ylUky|1|YtVaJp|x<@iz^7lHjTJzti
z!wxLHezp85;{_bYM$P&CAGDBUA<a)?WxULvMMm?t;-!|yJpV}*Vq5a2*4h^HMx5Xc
u8R0zAcA{s9KL3-*^xTsJ{6C~uhBfChuip#s8*J1Xe~;HcDnhRH@jn3zY{cyV
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_student.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/controller_student.o
new file mode 100644
index 0000000000000000000000000000000000000000..1708e33c219da462ca2b44883c3135da20a0cbb2
GIT binary patch
literal 6000
zcmeI0U2Ggz701u+G|6Jp5?qs}A2^f5X&vaUY%8hk3W-^NB@u>N_9CU^VRte+&Mxfk
zEHmTArc!ZIi2T6ATJYevSS@X_pZeAqw9=-iQY-bLQU!_-4+imI2_A|{8h9|~oSAdH
zx3eC#5<GIP*?Z6L{_i<=&V1ZE{_(`rWHONeDG7KB+Llm&j~;Hfji713L+~JMef!2t
zq40(a@Ki729y*Te+VAApdGR;vI~uHfJeyemhXxz>E+^OTX~~WImbQLh(>96^z%%H&
zQAond_9@s&tQjMz9;2D<f^(@8dhc=<G?%&{w>EiernT~h`})yr+C=SrYiyljzIt#p
zeed$<`pe1I;*Eo?#n)1LueN-ucd4tjsAIbbCwo7h&90APoxtPt&km*a)l|B_aUi{Y
z%Gf#ilY{A<7vK3+OUwUWuN#}6Xo(Fy1?P0%*xWjV^@6dvhV^f|vuT-U!Z1c?u37`q
zW(v+8IBYZ*a87SOYc#=wmE_N1CGj$>Y~3`{$w#31=ZBC3{G#=ev3WcNKU_Klxz>%a
zjlOeq?&R}2z}Y)Djm>Y8CWYsGGn=-s?|K*d(t0*-bi>LkM~$Y{7)zfpPW0M+q2Hx0
zV{uD^Z(*Jm17DoO#3#FFDQ@afy;pL1=iYAaRuVREp%#x#>fgfo(YWO<^miDVukG$W
zg7-iJ`x++zRsf8Dkxm^)Ii<YQb&&kY+}9G2d#BrI9zb8eMqjPR(C={wa_~0Uy<t4i
zL)Jp}C%lhLypJfCI$qa1CynOm9ym@u)@cmd&==~-=d3?pv}?X@IW^yPDizz+i;nH-
zHOJSz`Fh=Pef<TyRJJO%UU$5*Uv_G`<07j#R@q<Ft4`6*=wl_@`hh-IDPJx5A;J@-
zV)<@m)-Trl&;-9+@yDEMolWrPYvtP2Jb4L_=R5VhGRUeH^M1*l_t*j1G*1~%cD?Ld
zB?e?Kn%AJ}xy2dO&6s}RnCxlNF(CVS^O|%A`tM~e%Vy7E%yHW*yLJ(M7sD303?i`|
zxFo<fx(vFZhy&FL1hz7Pz*Z)3Jsj5Yd#Hni;Q#!8n}?;CJjY#^RE$23$N7izV`I<i
z{pY{)T|MVG6{}>HYx*2MV1CKgv+26)%$4!c%eq#n?Aw+<@7nrEW+**0FgTJK9Mbzu
zx0=S*z?n0|GlM$y3=RyPi<uzf1lAA0-*@*@Y5T5R02==7S2Xk#Ek^@DQ96qT2Rh)R
z0g2<C{+~d7LWz5XJwDA`Y?;9@b6Qxbh{s86lb>S&1(0zw%=?*(pYJoLI8?;XJhsWt
zKtS94CFZn%P!atywn<O(q9VM3ZQ|buXq&&v+=%eEn2$&Jd(1CHIGGw8WZJI6{CDy{
zpd_K_S0xdFpU%5I^wY`z8u)4R0@_kE=#u7M{cmh_V`M3EU3w5nTl%OTLQZ<=lYCx?
z(a*77XD64EVPhdi|H~Nuehj}K!=J!7GDi*_R6{X58^bTg@M|&r^%xHAg+K3wdx4Av
zeGAZ61k?A+gk%*|*XmENk1npVdn#Vx?V4xOZegNkUa8<3s;uODi+FqW-dneA)5CXM
zxX9<pFH{8u>wJXaS|1@l%A3J5p3hgDtDdr#$mi>(YgSd%K6%~;U96RT;5=mc^vCwL
zMnP}Kn4FE9lh`pqZ^xK;{g~sr_@0;G(-+4-Q%jqeK!+)xoA)s1&z!gYi?tVW!N!TU
zTXHcb9XE&9C*I|Z?b&{|QXzl&^Ha}_W~cJcO-{~E<np=f=+s1>ZWzz0*wgd4nKE6l
z>u$N`&wYkR+Bbc!Qwrh-`=rk=$8D4<4xXpO{BS*n&mnzKNs(udxGoTDd4E2PT;3hj
zE$`2-M7Zo{qx^5|GwSCf=23kL{ZfhYe&&y3eKM2;zvD6bLJVJ0{G3w!G-C8?ioQ?L
zw-kO_;qS)yxyzjLpsp%^RQQvMpDo3Ys{ae~5v-q5^xMoSKm7`S8sBqNh@T0Y!S68h
zXr2v4|20KlSNPWzE-M&)>eD<6+^2Ibe2s0H8*#d?WZxj`zUbd%y}`BU2iTrgIK^$T
zeM#ZuU-lU#g_HgRw(ANfz06}t;iSLI_OilBFZ+^Jg_C}p?KOpy-eCJpg_HiDY~NNm
z>BrfASK*|W=S0p!@^gW8TM_*+%r_O8m*{2xC-Ei!^1K0$6Ftp|$`OUre1_SUIHFGl
zYP=^S`U`9iD4cxDd&*Ea`M<=rj1&K~@1-LBGXE0m3yL4|uag){UE$<^fo-Y9e_x;m
zSdQo$%;o$fZh^VZwQ#x5`V~&|5qntSG@m854X$NAN7$ZLIO%0Rknt9)zIg>}-wo@M
zv|PJlW_)|WhfLA*O~_pFJjl2X86+Rf45LXR+$m(*|8xjhuvt*4<y5QquM(cfe_81`
zo>ENbq85V<{6E;IisV7y<Jh2l8Una(JQy})Kl?>ADUMvXW2}3UdGw3!b|fy#10T|+
zn%-mNGj9A8iIgJo1r1_@<~1aMYl;6;zW=0K#tWXn4r)i^8<Z3*t0D}|z4K=?$lHGT
z+x`+O*fHggu93u-{5_9szxa3g6Sjc;YLW56a@g26es`#l`<vp^SQ#(z!|zbo``!#k
z;d_a1sLKMlmUO7~ewTWc$LpL&dOv*?k7)caAdBXnLfz(1xep`GB`#^Gd>N1Z#xL;y
M$Gt$+{)vwN4^Gwh+5i9m
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/cppm.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/cppm.o
new file mode 100644
index 0000000000000000000000000000000000000000..660cda5598b08082a899bb3bd0fe1806e89b8c04
GIT binary patch
literal 1984
zcmbtTOHUI~6h7_v;9-b7jHJXeJfe`u&}o!_F|k;sGy#>SCMGVLVR}g?X**?RYEVol
zY-DFK{sx1rSeUpo$WJiQxRf7YqG1CIqUTKSg<&i%^pMMU&Ue3a&YgQtm+nqY1OovO
z7J&C~6bTj}cG}~+ZVZ~B5w@hvmu^}5EY`u|hqnh3tnD_#{;mWYSnS=7)V>jf$}51%
zCro|4+Z@|JSlnKxT<ldvuG#~zhPXD{Qc02KZ#kkDVZg2F*6pAeZbDlCswwToy4AgT
zX})Jv4zGO2n$?w%gnNB(CA|Hzl3Lnpod<a(M0(h3oe4s3_;zPsScYJ?_nT;c8S|+Y
zRF^{mjBjD?N2~$za%iUs5%b}Bpo{Wo;rT&PhO?IOgjx2mZRx{$sZ>yO<Q=2HY)31U
z021-|4S67O@1dMF&Agt|jG{beTC$U4^7v56GUtpudX}Cu9Hu*Ei^*e3bSN58#}qXx
z4`^0l2))SQAn}SS(~cU6UZ?&i8NKZ(`1z~ezEt<+0VMpZXA)NOTZ2o~n;@#=86uw8
z?Bbt1(Gr~Dsv~GYx6N}-ae|ASKhLFEjsu8-<CF^{C-CFQQ~ipo0yxL<0b;#6^rob*
za@{1yGUvbXIKpw2^XK^$iSq-Wkp2be&$>afXgIEuU{3mQY8Gb7tjtnOXE<D-**3GB
z3C+m6%6Oh>mMegoF2Rb-GV~O)S*=#wEaFT$(TTjN9cRi$(NRYrotz%cq*IAZ{Qh(X
z1NB-anVOl@irGA~@a*C{y72t9x2t_vtOn4Iy!X}a`1np9i+j4@(@*hz!3%ww^VC<o
z2~pym{pX>3CJUjSX6Dco`)R?^W<jwXtA;t@SuC$94qI?Q$!d-U%B*dJVwn_>TvbLv
z(al1E6`jL+|LMq>k4HRqXH+sq|Ij*U(_{V_?7}^op_oTQZiElk7U$0*QmF<Wi+jDy
zdH*jw?d!|a+#13syo!rz{%gL9xzs9(%WIE#|6VVNzBs=)UJN<%#ayE6+A}VAEC`Mw
y&x=8yhQhC0u*s47HsTWf#r+ZI|8}Hcm6LBM@R;Z;s8)39<^SOCmlQ&d{`}wL9_Ez*
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp.o
new file mode 100644
index 0000000000000000000000000000000000000000..4993fb1040dc206603cc6b0af1cd2a9ff3d1e014
GIT binary patch
literal 13784
zcmeI3U2Igx701u+bpvT2m|#*`2)+vz0Sb$8i3C+hu0O(uVyJ5t1%)Ku_4)!U7O%7S
zE?O{27L-(ZXj3mxC5rOkAU}Y`0}rGPG_+2W2OfB!l%iBhB_lO0Qu07VXlyBtd(NG6
z?D2TFN!7k}NAk|x-~8vCGiPS*eq4CziPlZwPza=i;5RUNB@|#m!(`hDnhwl?`yqaR
zp?%2exKV3cf2O~&-rt`Yv!IBQlVO0qMu6hdS<Z!*0QR2>L#zp$OU=JL-ClKd#@tAi
zb14ZAFJ4;hT&OFARy2JSd9edvG=epN^(4U3#Z5DpE{@<|(*k?3jem{rzWrjP8eRab
z?HYJttoQxXQ~h5I{NLFTI#YxG?^vNC22#AcJA7t7UcZCwUoU~;mkVL^^-d_h9d<^C
zt$Blw!-Jm|EQm#BI-@o`e#03bf8=j78aG%_xE6-O@tdf5c~Q%sh7Wg*6adcC{HUMU
z(avy@Y%IxljdWsP1Z%QU2s;;`3g#BVaN*+k`0Ki__rDsCIiW&3*?}X@39A1(KK{M2
z-rr8dKM&*m;sYppTKoqwcA7&R<F3V+oe;!Sd^LmpuQ{V+r?v_{FCZ69XneY_+vtn5
z;yV%Kp=J=*B$)qA3szEmH@_ZV*ME<iNB=!=;Z>Z+O&mM9-oKj?FU1-^*0N#9f=4i}
z_E1&f8q6tNqqU%QAfL1^LiiVd4MzWN)eOGU6fQ<^pR}N!^6g+d{C$-h(&3oCpEWHk
zzH;oLK!?{8+Hix?**G?StZKuZ9gSzkdjBx7Cul5ygYl?6I@UWi-UP<<1<o}RhoYVL
zM}~3z#3#i>zB*?sA2c_alh=uTVVoPzCw_R{i0OASKbNNDr<46T=nv4}-FYy2*9r~d
zdY#XO;XL`cY0V!b`{?Uh{IEYlKFI#vdCurq?+3x$rp1WokaY9E9)E{?oBhYQ|CY9P
zq#Nt~ui`uYt>c^X4e@dRH^r9>@)sJU^L!WAEslBorxjia`P|4b=I}b_aM*fqCFRgN
zoD1@I6Zcsd&l#Q5iG1#E!o5;DpU0|IyywSC=kpZze`4elZTC&y1J!v9;oRsxWdl4Z
z`%v~rtpm?r0XoCb*F^gbV{D3ti;a1EgtQa;^*$KAW5FQaOU}o`&W74NJii6cIQgS{
z6W^zBKPsPh?xVe;&VjiXPW?d5?Q@LX>^sJN|KNH3hyIU$EB_1sjeqVF|B}xTo(1*3
zqUJ|D@Kx=MI>G(;@f(2m0Q3D|LO079jic^1<`BZQH|TybCBGBz7ch7f?}bMLn}zlW
z=F`S|`BB_=FNNXrhz-Rb!HG9%d;)bR!niJYHgDq@rhJoa^a;)Fv9{H*U8-*11<~l5
z1DUQ|+V$3W+2opJ*6)cXQTKe#&AHz0o=n!?+V!lxaihI`XKSm;0eZ+NmY&s*d8xy$
z{pd!UTy$(}+||+27;Eg<vGwUEu%8T*E}L&p_%49YwdZGgI;4{Xl~Tz-B?FZVR5DP>
zKqUi}3{)~u$v`Col?+reP{}|g1C<O^GEm7tB?JFA8NlB=OBVcHx@0NG3nkSEH#ax`
z*j~PQ`%XKS$)uC}5~*%`PbO>o`&_$mbx$_4CzZxlHn}h5yGcKnb?pt&hSd%AYd1vK
zHrUG(*#oPwRli~d@#tEcde+uAJW|e~;vuZ?aoBh%l?Bv0y;xvPhe#~6WR{r$m~Q7j
z<YCRe(gENzy?|G<p*+{M%=`Fyi0hTi+t|fv=2Thm9qmdrRXWP?>G7|}VIgf^_?#{%
zk1=1s*9ETWH)hhmVep?YU%+w7e4k=&GuJa^!98qcvQqI+=g$RpCb{J45OcY9Sn@08
zSNU4{&oPhBzy_AWELGF11q>$<sCcGxd}f1rnB+3wKQfo=<(e%E?$xeTQ`w)+{}R}l
z<Z*4J1+=@SmQV1qdMXO8zAVG<#f2!PpIwI2x|Y%}L;e6}0ylL~-cl8;DWh*L!*{Zs
zezqga@*MMX%)8irPZ>MCthf0HpJe?nm=76zfO(vc#sKRtGOy;NRLA@}@=|&Dl=Tkl
zZPtG+_L(1HJ{#vlc^fu(gn69zEuBv)KSW;2?_;d*XT2S$0k$(AVonbVgThaq>hjQ?
z>DiR)PC~Ay3m+Bj@DsilJU(jA#}eNDpczxmx-Rg7ZuPVZl8JP>Gm+fy;p3&B(gQ3=
zd0V?vK4iQdhrHl1lNw2ensR&gxY=o4=r1|FPx&r6Om*qQ(y8wKG>cZMJ37*ty~;NP
zQEztrSSq={Ig{)5L4~>5?RK-N<PNvH3$``H;2=3_anp%IENFL=Zt9>L%srUUlyS{j
zm!7Ew)>WI5mP)Erxt>2Uj_j($Bs|Z}`kNA|bkNBT+Hmf!l20K`=}b~(ehPjnfw`rH
z!#Qorx^7H`rL1_6Q<vLZ&r9reJyNH-_p-meDbIJaZTNh#xhX(2d(HpkrS9Cr=%&oQ
z-6cdZZ1tKm-QD;W?RK#}KUe^@z2yC3A?|xyq2P59x91_}qZSaG`Fw-dGk?h7ZOj)N
zT<$xjeL2sj{j+R`^b#|nbIeJv^AYAWuL!rPa`2i8@g=GmyyCO@pb%fG@n@Kue!G~P
ze$$#>&zrC5b>7FE{MKoH&uUzclm4*_6*JEFG_LDE)VMycS$MypV&=b^xtagvn*ISb
zG<aR5>2+SuoZ?)j>DOs?s41V5)@%H`ntls&ibv=44=|_@*X=yRocunlB*AN(In9^s
z$oqYl#;MuIV|tj2U(x#-*Yz(mH~q@{qvY8}|5OH8{~%t|eh~g1bI}K4d>LYHuFG{z
zPxGqg0UsG$KG%G#+0pgG1{eJ;<}|OB5)9U#X?lG><A<`KnCrfZxjC<T=H|TG%J44D
zzJ6Zvntgp<M-1+$@SvdC*Yz(OT=YL@Zsy?)!@lJIErYkQ-+sfs=m!ig`m@YUzgIN-
zdj79!c65&ajwUE(o~u|y_Vs)&U@qrH;#_2K$&bxk&Wq^l3@-Xr%*}bNH|&d@M-49d
zaSZ#SZ!x&&TbY}F)0%y52KnmI?CAVt89u<A>@Nu{sF(8^uhaNt=4PI+7~J78SDBl6
zzHV^Qf6UyR?=8c=<n1$qOWtl9_C^1N!A1WSbJMSUK9~D|eE(d;pR46_f^eHT*;%9I
zZ3}a;BVDb`&3#@l^kTn{x#{;LbMhMz<5&-9cJ%wkX@l?LF=v^Z>vhiHqJNjUnYSUs
zzU2QygG>G|8}>zi#o(g9&fN41{C!07EP1PDZsx6qxtX^*&5oY8<p!5LtYU8Ft={0G
zU(ei(-!be<9$E}8dDvpu7k#V2MIU2s`i*P$=_p9vdYGGe^EEr`wEdRX>@3ju5zUUy
z`^)GD%IL3@(O)m4zr~!^MfWQ|t<b!taE_V&%K~xv93?ez{wNVBCEq3&n<m%o(7wvE
zKbvdP6EE<!e6Ar*>muXVbHC_c<!eXdq$gWcWc@|or!YX&J9NNLbYksiRlQGIS^VZ2
z_1(M=QTzs<fM}=ZK{T783zDymu7_wcc|c(j2R%3}ir+I6Y19(L@6FNRUxr4LnF9x0
z{I>i*C^p)_l*n<Pu;_5BX7Z=AfXF(Da3MA*KaK#d+v-#!&OZ=QMSdjjvaZXR^T!l5
z2w!7{U+EwldRc`RWYZkKi^oTd0pee5ti=XN8U%1H<KHy6j2E*G_EX#RKf?Zp>4#*k
z$aq29uu*FKN0eAB^{Se9HOFtko>KWg#{=U$lJZX>$#}_sC$duhXYvmLaqQQNj2HGS
zHcI)gro>{A^FjXUS5g@-{?o|Fzd6r+?0+}*>4mgZ^jg1<s9u1}JbpR9zs<%D8~;rI
j6qC7jh~RdFUICsqjEi5@3osWOrN;O3{Bt7Y+8qBc7Xwjn
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander.o
new file mode 100644
index 0000000000000000000000000000000000000000..b62efcb83b66330ee918671cbbdae74a54a52777
GIT binary patch
literal 2592
zcmbVNL2nyX5T4yNrKJHvlG2J+;spidNMvJMsbp7*y2a3_5-K4vQl%c^&E^HKYI~jC
z7b&5Y=&7e3Vl_X2Bguhl)eDL^BaWO?aph7Or1lV*8Si`R&5QTKME1=4-pn`i#`9i&
z{Oar5reS~*1D?ZhrBHyM-X7Y{z;xgpxBw>)e?2&{pxawD4kiKi>ZVh9Y`}GN*`LDo
zz6srz*3@Ag9<LB~jGESDGqmd_RC=qo4o)8a_Vbao_NU^zIS#LS7vW9Mg2Q8g8rHOj
zF?-VhUDVz6v6!!JIxl(`oi`MZ_!Pyz#2Bgxa!$n**Cy7EV9PO~W{#0<Y}JuZ<%1lA
zN4WQK4z}EWzsAlx71r-xKemiR@-Y^i@^lWqoqpszBYvuh&KcpkqEDcEY)uZ%LV6m{
zlddJp_uqd1vTe_|f{pDakLIJ$oA*M|S@VKc%WZG)(Dq=%6>gKa+2SIL{2zF*nU6%c
z?FrTngul7F%0(ye+ag*OL1)?Z9&j-WuvD$yVELuH-?3T{G`)uFx7lV8GST4d)?6nH
zHvJ}Aq1W&Q_r!L{S;a2Rl?ug*T`aM@8@A@qD$LFjZWkHt6bmK#H8X@}B?qtiqqeP)
zlLTPl-zc$=NtcNMaCRauA#Nf+4Fw7P_)08zOPPuObYNxSXY=OK-$>P?Dwvn}dCB}#
zYEl-QORZva5!FPh56jZy8`R^{POEzv_yfd=N5wlb=t+h@U6N7!zhvNlWZ-{g;BaPQ
zXLcYN;3|%D^$VEU06)6Z_60<8UhRd-!onc7s)l{APi%>?!oT+;!NcVs6v#4S;=klx
zfcFI4DB_{G?fT7O?z?9%$mxVDom~+Vs9Q7)Mq~)mAyk!1yv;-3)8YWeus<Y|I3VdM
zQoa9B!>`2da24_Qq)qCYw28+=drz*J)R#2;bBPnr`_d*=&cGds>-97wPI*&LJTx_&
z$#q9+sweF)G+g;Vk~r1*fwW1fd-D<E@g0vh|CT<4s~!^ckHqypzm_=FlkR^G*Cdn|
z-|IxKNSyfb|5GAN;yV9~#C86H#EGBYqD1Uyw<X+lu<^Z)bwgPpZ@RYNI|6Ka-oajv
zBCx}N7UW*E%V5(T;%(K=g!ca$3<IfD{bh0xBPq*s#H-UiC+sSIsILxw(&EUcbex72
zg=T@M)VrwW{4<H`FaC~}7u^P;!!+l_nH9euhb7-CzXFPA5NAmNQmgzm4Oj814hQ$i
zE@*zgONaX!uHw>Kw&;{+UV^HBl=ofysQjvb7ZB6WPDEun?B`S>0#UT(;LeSTUzV5m
LP8^ne>+$~qzYjdQ
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander_generic.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander_generic.o
new file mode 100644
index 0000000000000000000000000000000000000000..64268e7ff64de06d1cebf2998abca032d7557da1
GIT binary patch
literal 5648
zcmc&&Z%kX)6+h39g6Gkekbj7(=9#i4sb&ip$xJk9&p0%wYAR-!w65Lo%ku-g*w{Qj
z7$#_b3DKHQTi7x+AGU=}+6ri^+GuKr6jxR&P5rixX<fdRblN}d!$?vjkeab`-n$n+
zp6xZ#Chel<d(ZEl`#a~JbMAdl6#Aci+9L?Sn*eV@S>h<bmFDtTwuUl10uMt;9C^P@
z692%Ts8<dKz>NJ#gc}iv1jR6H3p21PT!K~6>kUE^6ommO@^$ymzqNc{goT0(ckT@d
z%O8oJm3tzrtRKGKie|3P`{bYm=2`$sYciDXUhqVMh5CkN)h7hweXy;xLot35iuZ;h
z%lFT}y~KIBKM%rB-0SFX1$T2L_k-|7EWS1epIFn^PvSG{Beefm1fLJZwi^_W_zj`=
z>`B;;&%!Fm0l)GL6qRqos_OFv;}{QTEFOd(xz|{X?^2A(hH|lC+2Z~x6s=ghc+2rE
zE*B)YLpj`&zn8DKZtjQeO;KE-JenT47a9w{hYnb1gM<Iz`6XO{D>3EeCH+FPJof|~
z@tfW9Tw9}jS1v5YJSYcl1-=!phhe}z5PrgMeovlhOC6pB90yw3{eVvZ<3Rp;QLhfm
z)dX1R!#v!^n2DF=V8Pe0tWdpp1Af^n`4x{CG<A7S{_avtMEfe*??ZcH9Xv`lh4t&P
z+y6wLV)EQ5%Ki9|{g*&4cHnq(zr0O;K^Sd^pR|2w`HUaD9sVW>{knX_AAc6@?5WRp
ztor2psOCTS9na8OJNhqPjs&ru?pFFQ1mD})Is72`rQF`e`mV?=*3Ey)E#>%=`032Z
zSeq1Qt8Q3b#<3pD^;21wd+H}!rGD`IQ~gZ+6c(s{q96Pq7X9Tb`Xx^(PdWP=?gube
zQ<#g<ADgkC|K$~ZzP^-y2y^-8!jdi^egyqeaPJo%DdiWS-Tz0#%+^wV499Qac-~ja
z599b^b1C11z3DIIyIKSO1diuJrTo)0cZfJ~uDz7cVIL)|yOjTHOTh0T{6r}~j(eVO
zkNi64JMNDmHiqZ&?3{n-DssgToAi5w`w-7PBL=%rZbEz#>*6=a@iTmkR$uTE_Sr*?
zK^6N1<|Tr?if2#x1{6m?I2V_oIRS^8B>{#7<WlE+LjmvSvHnl^PXY8${YxOU{bV+9
zGf)S=`(hou9{JbKu+S9p<DL4H6qfuHM+s|cakl3s)o<bLhOKy?cgwyn?ApA4zG&UY
zbe8Xl!pi0gp5;xvk0p?M+W;ol8|-`e0G%-pEC>hWRRy+AD1sRi4#4Wgedd~gai8|d
zz3bw^m8+;jcFjZb>IWV;=kwq>#<ln?)ZLoix+K7_J{0$_+!hZ#MSjql4Y3aG_Thd0
z&Qi2T4y$$WC3Q~zK6u*RCmlXVcRj$nQQSU-0H1+AdUmj>>4Y8~96W<|tfni57R#hk
zPI)kCsN)P!CdQm1plqqry62T|Le9u!N8F^G?0?u_sKHhLf5OcgcHwk1dQv)i`nfMl
z!<kG<9aoYQ(r8APjB!nh1haZ(G?~JYu8t=SO*N);P3jGG2fI7FdP7~^(oscE2XWMS
z>=@ypE{SHkI=he8GHB!UZBhq!cB*NKRli&SMEtAPL}YR|`sjcvJdY#lao~LAF@`tM
zGHjo<JLtup^kpVf(NlX4AHo+&z&2=i@OA77-(WJwb%x9Aqb$zm3k+Xm_*WSI9fl*B
z)l4@3BZiwS6x^Rz8IIpSR^vQxF<fRFy~21%NrZ<iUFXklEuj`(8UHoZ7aV!v@%%f(
zxy*a|L?wMMGs^K+hBvzK&oP|mh3lVTINo1Y<2VT-RGu<>UzPat7Ec-HakF{2mzD|Z
z$L6WT$1R>RzEoa<{`ee{J)A{-z9;A8g&O!vh&N;8-eakGjV)TKp%1EV;6;~7r<I9>
zrjLwi6Plh>Ln?I4SeM`_P0ip0WHY&>k<3hRIh~x*5)s2l8dC|4gGvoKhPNu$8P7~>
zIv13bF_1|mxTt2c>HhQ-7iUi;bA~dZ?yjBIQW-UA<hjD=R4O%OILJE^kQ<5GEO?Ed
zQD!XD*<2Z>YrYz8y$-5PumzEcu@pKoR%YTWc4sDr^I0ty>N(!s1zANsry0!A9E^-)
z6<tZ^%I}oO&`^JD7;=-kF=}NY%9C)~&VjvlNHemT<b(lfEuGU0UIQ<(!DE=$00*(Z
zSp#oGJ!)?K7i-`*Yv3L1o^kVhp$3lM16JFQe9l|p8p98|@C}AP?!pJzVmHq)!`(bT
zWVqYUk89uwb}_j1f5FZX;qCTTtly6uc))>gG2HFv#|(G-DX}ZXjdw7d>~=W#dl*jq
z_PfiT3_Ez7IA2QlDGRLy@f(Qa>ntw(uHm@J@D@hIaZV<=@I|yk?Wo-W*OwXI>Bd>y
z!!DfrA-nJmCJ(sqMJ5lraGA-@{qAEJbrKtspM-O}PX8$c{Jr7ylk_EgsL9qZzO#^r
z^tnB!KcwHu^!WRO>vOx~4j$5%nVfat#LwS<rUNJa0VZE|;4Fm}a?OF0KKBnoxqRAC
z&SG!qc0bNXx|UKxhBjkBD4`e%gwE!25YjUwka|}rj3Oyn2##<vgg3R4Vz_npg?2xu
zL-fAU@J{>hn}ie?@`^XPj2JbOoeNtk=a<Wm;ec{0bAa{lK5P$;vP1J}6v+<HYYWqR
zlHtx6(^QGs<$6qgw~n|>-;c!UUVqEwH`ga0oUIE5!n&Oxj`@1}&U7~JKj-PkNgBKD
zha2owyiPd>U(aP32i4-Y@u;ogWriqzv?act$K`8?RkMGE*<Z40c7OSL4v>G<>~FCH
zB{}TVTE3p!Pa{Suo%lFgm?^&C1aZvh_Vlbo_Gn&X>t|SC>AVK;aohhCV(!=zQ4>4h
buXBS0VsnYsomFjp3;X}=w7qQi*S-GVj{SbA
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander_rpyt.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_commander_rpyt.o
new file mode 100644
index 0000000000000000000000000000000000000000..2cbfddea5dab0ff82be38877acf1eabbb183f0d0
GIT binary patch
literal 3776
zcmb_fZ)hA<5TDyk(=#ox*4oBIH=8urw3s6a2{geEFW1(JR0)@g)qc3!++Dn*m+W<K
z`zI}!v>*Hff(;0YA8ZA|r23&0p&m4F6orCcN|DlUjYT9v{ZQIkgN8V>`{wR-FDHmj
zxc6p$GjC?zy!VF9)Si7WYM~G?h2RoYBt`*B>ngnPSOM!{9W0-`Jh!aF%)OD&+&vx6
zKRBq(J<vnvAGW{}ntime4*E9(oH1cK_KhJXFEzkSNrM4*4fIV7LJ?!3P7H`J^g-!t
zY~j|dGp%hkqG<2yw;7`+pa?tL3}|XI5^uu12{7|{ySS`{#Q@ZafrWZ8AJw5xySB}^
zt+!sBs)wbiD{KE49mE`(+Ko2+CF&cx%n<aq;o5};F>lt1;<*Osqr4IuVScI|iivli
zcyDBA?!m$6+`|^Jw0!cr*^(Z=u?cN%Va`9UtZWe&=XSH0)NmFb&c>q9Zh&YrDCTV)
zF1Eq+bse@DCX}xKjByh6;V#<8X#Lu`6vjzJVM#P?H8@7%WtgX!9BT^qdKKeb(O?GG
zEk!ZUD;TRCbFdmP&t~-XHWW!84STwNuU3tizk&K4urzuair=FTt~b^H{?bZcNfQHS
zKYRS}Pw$>>1_<qd`z!qbAH>9Oe$7LeH=S8x5avI{^`74bC|b=huf{z6*NT@<q7ma6
zP~@1ixQ1$R19K}iiejQ2_lvo=*1_Q+4fZGgJQXv4{nA-%g=LVj!ooBdXDrn?)TM>D
z8liB9p}pVH3TyP%#a6LAs)f1))`4orXQiGKppNo?h<VT*=AVZAST6fk#vQj)X%vvG
zoSU(8DahLeo=4Iyz@&BT6*4Ng)+jMCJC`GSmWQ)$GNZ_ESjR|>dOIIif}HZu>Y=k5
z@{oUvhyN!(wc<|K@DF=;?HV*Y_rCg?x!<;P$&8hqFvo1ibTesls4MT-W7!;XPBN2q
z(@FP;lQst;y<NTCJp+-RUbEA3#=DT~-oBmiNRLUHp6*_}iT^}&mUVD<Wi=ap)s6+A
z<KJqeqo*Kk@c@caO**Wp0`UPM)xxXeK8w~NB_EEoL*kqf&qCsS&Wyh<@%1<pG4AKX
zlCPsNj=xaZ%6}7tACfrd!Shjx)0-h;{Iti{l|8AEbg1`i)xpoF8voeyQ^9X4i*(@K
zR=}^2-B`{7;1ikH4~TE5n3cI-YT$Qj;CE}_zt_Ma>A3lL(jFhTCQ@l9?&K%kND?}Z
zLq`hSjB}*m?z5AJ(kZWFWOLaQmYcOF%B_U@$RnuVP`K@2TY3rGlGlQ;HDOC)whUK!
zpcWL5=Pkz?FQ_euGTp_A#xT#_=_GbE^qIG_6E2iDu{Z4wCEe`N^stk)ovb?vW8>M0
zF*GQQL4mlTk&!*I{a6xsh6bb-ycqtQ@#PMGf+rDIZ-1Y}HwSQ`*sFJGw_>m2*qS|h
z3jL_~g&O#x#Dj4U;CdqRqvm<M2L6S_gZuhg;z9q{Bu@2d@<Vy!9f=3yZj$#oh`%6l
z^7FLfXIR1gH|8tPD0quv&o7ET@hYzlz?3$O^IPgvaJ9}m6`cI=-h_gay-Wj!6`br%
zDIZX9vd6SM%E+1X;XLvRPUppaZ(700f47w1Q*g59J$$0zWG|$APR<mU?88#Npx|WB
z`}tPE$v6AIs^DawkTOIHljHd2adsVl&M@bsb5_JnA9o>=vRn%yqlE%Q9Ge6(?}_Y0
zk&L{@9Z^0nBJ_CE_=x{2ndpGdfO1wzNP+t;>ozbWXS!=t10iLex@93R$OC>16~uCV
z`Tjg7ajLyaH|0eN#^ZXk?eoZx&*1t+xt`;(eQ<pbDk!gBHjp!~&j)b!C$|NAP)~d?
z{s9Txtg)V9fy`?4TcCm=P0K(e(iw4luAl!sP`UrKhNxR^^q?=6N6uTFWvR+G#GH}q
u&q-wiV)%bVReZ`TxOar0do7JXANr3F$7S#dWL8_BkpFKc*ig>F^?w7{FVb89
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_localization_service.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtp_localization_service.o
new file mode 100644
index 0000000000000000000000000000000000000000..ad22cf9e6e73c1d4e86cda8d690d983190a6204a
GIT binary patch
literal 8384
zcmd5?Z){uD6+h2*Q<HWfxM>@pBri#6(^7kF7FfMi+H=y-R;#u&_Mj`8;uq&Nw&KK&
z?La~@;<OVhN;P5{4Wy#2g-J`IeLzTsR!c@GLSkal24$tvCXxPOsu&+=3u+?~vUA=$
zH@SU@nUMBjw|c(!{O<X8&pr3PW2XZRdmnZv3W%n_>##rx6hK=ijm@D39=Ho;`~EmK
z>xA5mpfdKk6E?5f0iHv3jpuX+c&69F3_!LC*+<IPK`QKk(8yE8LA@Yw?hrmI&nfG`
zQ?DLvYEiOHa|6z?>9-(vIRd?x-Ua`~zk+{mz%@oXZUh5kvwd%mPC1*;D=2$oZf@;t
z-znMtIJh)FxWH5Hg05+RP`Mkr!pk6}I-u5)f7g`HIy8TFZm#xNq2?c`gf6WNLhf%t
zXrKtXPTYsR2f8jI4L`U1zlOHZhv96cHsQcN2#{NkKFsyO87F9y(}$JZl?a?U)S^uc
zzNAfP0F#j-m_$8i!i7$6%hTX(DbmLDN|?O#Y=OBR)Hf171ii9fUp(d*du{zQO^-bH
zyA=7jrvJ6$<)zT|=2zi!Ye4zoL#{_woZnD)?wJ)3(w-e{T7|ycj5x>8x#5vQ$fX^S
zyNS<g^z9b<G*bmLejH!jxU9ns8_Sjhl$<JnyGF_&NA^E*JlKA!3_N>W5XyR{dM-Lw
zjUTR=>N(Uj)dNsjM*d%RXp=2CjuZy`0qmi)x~vYL3Vgza;MI#1FZntE&|Wb+7ov4e
zJ4?rf9a=xFdj{h}Yp0lzZF*?^!Uy-4b0Lbw7mwAA-Hg<a%~WYKS2s3v%=TG(Hn0J@
zaBo8cKIl4mZ7x(^3|%qo2Wzy`sB0J>b4^d<UJVpN*WhQ!gL$wAdxsnL4SFD#Ez<mT
z{n|0IJ?PMSTQKh~W8O|XOU92Cg8#4w{1vV>o(gbm9&|u2@ug57`IMv_aKS!3lY9To
zhS#qH>QR37!FBz;kFS?k!!_uC^EjwV@Xw#lg#x%Y#7p}b`AxRz<$wJ?<$&R)O9P`R
zz<lq<T>oSv%x=a#8T=mPXdg$4aPN38PZgXvPJ0%^`Q7;3f%|6eg99cjvf!;+36td8
zh!1jaI7<EvD<O0k_YcoqF3bBzdsgKR_!aE4xIY^9b)}oj%zeTh@X>L<4yUx!P8Zy%
zh9P&w3F9r8FO@E*S5;y1@&2;lM-E4OSOt#`Ydxw0A<`G=FAP?=H<>vQ0I03dD$1%>
zD&>RgV6qO^{flCFuh|9LD!!TvL9wr_2mLx<@YFfjUR6eZPa}N^^Gb<8?jcw+REIVd
zmvxS&Ja|ShR~*j<#vIF+dtJ}hjZxkx<=V`Z=a-LN+(q|_l|OJ8df%|l=7<~nL5v5*
zlFkA04C7hNsqO)9J?a<d6z`TZ_YZ4c%FFDl+C%{D9!do!49_xe81ppyYG5K#u-x17
ztH4-`qrltxYs<b~w%9)9?<Zeb`9V4R$wqCKa`t1y%2nszXZ!wS-A^lEM)(yj3ivez
z9;7u~!gwp_X9fB>g+8_vDt^LM9EXb(|BV&e%xvFT^UkvLP0rtULSG5ylkN%ludaew
zx2Bf;pak!}U;g$U(i2`2@Sjkimgd8iO0LoccUAR2bxfbC7^*`#1(cy?JV&)F!C&oy
z$rg{|AH{o<&f(Qn+U#uKTc&OOIjy&@>Sz<*r}O7Sf6h7|11MwXCtodpt@i_+gVngs
zmvCR|PXzpLEr(jl_2(Vgrn)I5cgyJ*Ujy0q*SfxYT)azeIF)g_zwX9!roO8Vscsm$
zif1N-zPjDo<ZkqLx<;G4`4aB6Up4beS-xiId;#P>DuQcjG4v{Pb0PnVyN6C<JTa#4
zpF;a&r?>F#p;Kp-+=!#%c=esyWV*0q$bA_m!l*AT={s2<>058<JBjzk*~+6$^>~J-
zovX)R#(P8D87J}1SbT?39N)&ULJ8d?;vH7_VbzX_%(3qy4)H`Jn0g$*=xowE+l*i)
zW#}CbH-4vvCb1cvd!vEQwm8p#(UWORq=T8(od!zbd{1Uyx1N~?(wRiESt!MMYj^-M
zu}C}dOY;Ya#>?Jpbm38Z((0g#C%Sl|izm9Cuo%#8b25>J{mlPU?oFjQHth%|qz8H4
z-r;*`$@We0?2=mY+ufLl|NjmDrt7NAv#xKdr#g?GeE5bu{Q2;F{=lyK`tPaLyMFW&
zHIzuiBT+rpsUA$E)J)V+1KwmRaWEFgQ7RIRWsFFsJ7uVTUyZkB>o&h{Ta8++r#iei
z+PY~I;l6Du&1~CRL$~hNG`x%PwS8@FDHi9Fl`()5|1H&=sL9^$GXb)4dsC5gNcyup
zUCX$jUzAijVHtBRbOCdi4`1x(PUKf4|AqQ}j0;-ymVQAk*!_pezkrwUR5RnHOpCmU
zGOjU>?`gBqHKSnM>X;Uh!kWdz>uvbcjPJDJ^ztV?4K{p~@!gE8+`qy&`9)3G{fjwv
zLDED4RPL#BLV-kCLn}Uu@egoXk@&@ZOHxj7Tf)+(rDrjI8F>_m|AHjrghGk3hL)bi
z_%&0{0xse~Qcf%;?ak7&7^grf5<eB;qB)^R4Cnh|<S(A576#rtcpwiR$%AL|;7{kl
zU(SQSng>6d2Y)XQ{$U>cI^rIToXSUaFNb0_4}U2hkfq}G0OF)4$$CavkCumj7xSx}
zqU+EeHT>SNq<)B`GG-y6$74_GnOLH;Ic=mKk3|e$1lIRJJlbfa(y?@Ar=HOtO{Ch5
z6xSN{C|F+y>sxQHRc<d-xH2%zy5z?P_v-0PqaJBDGSJc69BYMGdQWF811YMB_H?!y
zJy;0oEpbCGlHv(H1Icz1;_1DywrD1r=uR7Q&BPTHG-F}ZmTneR36oqb-9{Zi-lU$=
zJJO<-iqC5fW)dmA&5)LF#wuuZwpvT5LyhfN0O>6;jGd7R8kvR;Bh_YfMtV^=8H#ln
ziS7&-=}fFcM{NzAUEM~v0X-o--M-7ngs@htPjq+U>I@^bHxZfNgOCxAWBC`O{eUOT
zs0SlaqqRG3Ks=cyAND4b!Du3tu{j0lu2kmW*LcOdXNEnJ=sXx}YoT?ZJ573PED>mJ
zO&RI5skO;y!;Lpmjc5jU+6o}qHn-wob6*0%U_(<#nzL;Uq+?Xo)<pIALCVAR^nvYO
z%**?&q4}xt*p5dfd;^cEyCUIoE%zzot5CoEHvC+|7v5q3w-{fI{4(z1b90|fPpO2<
z{M#8P|EpOibvq<{lZ0m(CqHF9M<iVKf0%K*pCb}3^G`5N{%n@)ZpV9o+9E$CT=w$_
z<K!m~P5GltkUug`U&yJE{s*j~`FUExw@CQ3gnK1?H!sE>pOA#h>y0yE->;;E%W>{!
z+#a7{#_e&&@6Kkk<F$;F9-rj@c8Q-=nzK6?xBJ;6>5=oNU&3$O7YYBiWOsydd)!`N
z-0r`qH;G^N^Mu4N<9}e>?*A>u?RoX3gv<VK;rE%{&#jEx{oKJg>E9-;cc-L>QYp)G
zyCpp`9+LEk@7^TRFX>^IO-)%zkBq-4>7g2azVUmP{FL)~3*(E{%eZ~LM<qQE%_|3Z
zB@h2U^YCxsFWC3k{Bg5R`qKc7PcyCB@F}K6P7=QyhwV20cbL{BocM)IqlA;)zcIaE
z!iksWs70*~gr66f7V`pU7*rd7mg#B<C;g>N+x<VnxW>I$ulVzb-Tz_cv-__yZukEM
z#*^F&{ldSjgu8Kkf@$HG;1_qO&?n+B%KSo3@NZ@O748MUpifIU#Yg1yI}%R*G%`(N
zYC=!gq+n6}ql{N`FZ|J%-Y(&!Gs(1FKf{ak3qHI41{SdER~gs17yd+<7V8u1+RFHT
ziC?}Cg`D8mm`|*OaN-yFpXGVMFYJLY-P?hsB=(t<)knoBWyEz~2FqFSwPF<xz7{Od
ze5nKx#J<h99Z6!sy4NSl-UY-e+$0tYIKYTm0Hdh+1EnvL=;$!8B>f*X74={Uq;JNS
zV$JGc2j5RjF8YpgFHTVGG{M0Au*Vu4;d}T_B*~7*hf?O-z_`3;G}X^`1wXUT?~|bE
zoDq**{s_wt3r6nk`siIne#!3|Viocq6CpJrPcqafk7;bTpJc`!Vv?GW7m$X7rQ%o0
z0h(e)iXXi~guIB~qlhhK|0*+HV0qCAc|kYfU@7|-*g%#SO7=-s$P4>X#Fnx@bq7vh
z+ii98pF&;$5gaUKfB!ueN0=GOKK)uE<b{3uIeaPmZvJWIzwLiF$}eUAG~53S=c$qX
zmH620A3==lZ^cJ$FR=Z`WDv(3&f9t}v2WwN#q!mBeu{DSethiqDa`iVBSk6+VC%3c
Z7xt}L!2dz8wEQR?Y-~BJoBy=S{|9&RTsZ&$
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtpservice.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/crtpservice.o
new file mode 100644
index 0000000000000000000000000000000000000000..9da089ea35df32248f3823fc3f38b06cba29927b
GIT binary patch
literal 4944
zcmeH~O>7%g5XZ;fP@ricG-*pIhy^O-N@NwAMv6HtG0-4U)H*JgR*E;97ujl@HM^TA
zZYp8Kt*2O&8%GXJ#i8PYkN~AfAPyjvszn?)q!I@XTu|W9LlS0oXX3}&K5;_wMA<j*
z_x>~Q?d;d{d#}IsMmm)Ou@rm`?VeD8p`o^KN3IPA;Q(x}ezm@BKx;GAEN)Gw)`tPs
zf;6<k{m}aRLVEoO_U{?ZB8FUh)->+jH->MJmipy=c0N4-zMY2B%mBQ*X^h;sWi;>H
z-`OoKr6Et6TbPSD`I{I^ZMPgLj44mrjm@3iQ>1|__J`DN?d~3>dF6k5_3LQ8TZ8aG
z)>^)5=QmO?z7N;>9Y71ue+^^TzO~b>=dh1{YXF)>1Dbcz$Kth{*e_p&{MMlTV0-nO
z>l?<*&ol?c0boAtqYsnS(Dj|m$}HfqF~3k%L;(uL(%I4J;yZB<!1cp=;4g!6E8c5r
z!D;Y75PJ0)85D89?N^{*fqn)073f#se_nz2d#wM_9=zFu!|6id6*F`C?ek{I^A_BS
zQ(ZLYJ>Lu~%6xUS?tAmq1@wHkQVo?GF8RvLTe;EPST=8Eb7sczYoq9mojgh0%9=Ei
z9m|dPnlR?HR~mpnce|;Kt~)6J1OK|2ftk9Q0S|TH$0O3o4@I0-^=~_j-L$rzPk1=a
z(>X8hdr;lxChIfIrJrV=WBxq%^%WR^JFA4n^LBFD^rbXCZN$jV<3Dlf+ghjr4@VmP
z5a;jYew3%pr?emgI`6s<aC}J9i2G3w{%H^XSr7h25B_5h{!<VBEAm5Fp_|x}U5p#}
z1KV!v-$73LA-+%tSRZdhmA_ndmF2>TIXJNrv1xy~<OG+XZjHY@aZ1~#R)aSet08#7
zbR&p%s;ngS<kI}S@;k?-L&ufDnVGudJGD5Lw!pO8rIeK5+>%;S5h*HHRhQLS3{>Id
zg6Cd>*~`lJAP9Z8-iX(z7Uy)qnOq5?RmVH(Xd4}$TD0U9nxWt;Cseqgu<Axhf>=>f
zL8#Sk80*x28URMPUWXIhWKMeh>7?g|>^O3I7R4smA&$S5_DrrH@uPbbpv*qatLLvU
zC;gL}zOM0O8o#1(eco#te@fGTtnuR-|C0S=eKwdU>+^%AKgd2cx7jDX&hIjpddj)|
zqH%c#5!z%f^%4DV8rSuIF{ipc!#*|gT*!IJdu;@DWJj>2`$7045yf{Da=I>Zz0Cw4
z<GzfOp7MxpBB8gr4_45qh0ZLtp&z#u@qGNfXoYGe1Z&O-9k6DD04(354#~6D1X!+H
zi!q6#C(e?em6q$(YHBf*ss2lAVlbYP_6Co$*>M9;)1YR_cN5)PR1aIzkZbZyk>QKC
z9~q^Ry32Kbk$Lh9doeLD$|6hRmylA<WPF*0FT`PcN10zh79En(_fR*9KchqRC0^EH
zBO^aK|4kO$*1mfv+lwckjPiGjZ}LP_k*a-=`GwGUxB5@TA5<u_km^rgQHhuO(|e2N
zm-`&u$i8Rc1p(ahX+<%FsLz*}6>*c{PxJ3QIEa|uqsjS6maH9R7~&7yV=^H@v_u!4
RK-Mk(I-kFaqS}XK{6EKgK)L_`
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/eeprom.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/eeprom.o
new file mode 100644
index 0000000000000000000000000000000000000000..a98d05b327c5324d0b44f47b21155250994261e3
GIT binary patch
literal 3896
zcmbVPUu;uV82{Qc#-Cz<mH$k+z(Syr+BQI1LhyE@8_00j)rgs9yR>(->A!h<M}Qe!
z;tPo;Zeb6`m@tSYbn(GN4NuAt6E*PxV<h?pg9jhgIkAv2zwh32w!>{p)Q{Yq@BGg1
z`+na!=bm%Ro3YMzx61{>TyO;zdIALqFJJIg%T-}Hc;MFDTk%QOdvmkGexhe~=!^0!
zgVE`3SJ?|NqPf+`MHlS(lfeXrjo>pn<Autg8%EI|gJr|<&l;h!1%~6}tq_^<suj%*
z5e56x-O=*w(Dlo5emjR65!md|m$se<DwJ<?GZ@nhe5wl)I1kbr*@Bt?sx^L#d41C!
zwK6;Om6iA3aKzlGZQBn`TkvTC=9$8|UjTPD1CRi$mugysdLN<QU7YU}bNMc+YGk~@
z(q2vR+nS;2HrAH{mxtEw0zmc_b5F=QrWo^K-4=g#=*s+hcB5`3+fa^RdmCf7GOwo>
zT-kIZBtBgVyYF9jjn4GA%WJTP&vAX%Vompwth~Mfez<qlHTs~msC@km_5967SapYO
zo0vqujj^|N?6+VpH){6Lx@G&qm%w|Z)Cez(Vfz=>J9Yq?E;OlsXlW%34KVuS!?``L
zU>!ZK;W*9fVyhat%QjBjVa>iNw!t^vXs<WTbrS1%7Wd^E=B7P@*VXgX4lRb)q7Ua1
zGd->4d&#!)gHo(a>qz@v$sWYL|IXT@U)XTG5o?oUBN(e<Ea~21>n65hoUEyE%|7Im
z0Crc{YTvcFxplG@ahzKJb$_T{+V@!OSiI}#KIL$zO-U9D1wCnIiUp;o>&UDAWmtH<
z@%HH9PMd+G$5}^P+dgGS$MY{LiDEIAOlz5f(qA+bGp#GpT?0n3Ka)exNTxF;iVqsP
z67h$2g#y8dKNwPWXhwb)dV!rg3HJvT8VLqMdmbkW)?Ls5zt7cTv6?pp0K<Q^j6p*c
zOlxDSJUa9QcHL6`CDJehJY^1h%Ia6+c=oM40X*nrPumSVgDvI1fiFFo!0kNMbsj*D
zORArzgBZs}eWHDi<14Wx6MXU+;M?plTeljIBhMxA6)BE^P+I_BMz;wggzj-Zl)_eE
z3v7V1oIk)pam~NW@nMcrJlXsB)XMWo9sFt?{2Ron&fl;l+iy4UGq$zz|B5*A`}jf*
z@b-Qkz6Zx^<ylb&-&hCVjyUOxS9*TMbsf)K-k*e)(~#B*shoaP&v)o%cjl}PEvW@8
zu4_{7B?FHqWJ-q%858ibI1MTNR5X<`Ag|{S>iuBnwT2NX8fW7A$xO-AjYF1*!3hby
zWVX%UGZF~B9i3gR(azqk_V(^rqBjw3?TqyT-btlmPCqti;?;pk28>L>6lzpr>tKJs
zZa^lK#DWMw-QZrH*sA&whK1OaqoD+xN@%6*K|QCP;Ti0C+LN*TW7<g__o^8mGA}Nv
ze99CH1z79A#knN@3eKS>!2LB2JS^dIe(`>7LOy*+gwY3y%&9wI!&P;f9Cz~H;W*{T
z@9(^Qz&)ye@jMDJF5&AW{6p^3yk!1mjz<t*FY!O-KIv|d@Ja3qU4{3*mT+13TaF7|
z!T+A)PTd<Ecj~UhI>?;+yPD&aU*4A;9H;ZQ$qu#t9+&Wq5<bRpXa4s%?#$oJ?{}*6
zNhwc2!tJ})9t=zPW{IDZaG7sPxXd4sa7D`VH^*td;w;dxxL4?>IHy=q;tmtI_>PHp
zK;Ys#2L95Sys4eQ)->!kEj$Cyr{C01o8V7rrUw2Kr4sm!B6Wx!^oOxaBnv?g2mQHX
zQp<rqS<L74f_VL<8T~(3!7$n~=NC^!jBJVHCxloBd(?hc=si*ez}o@7kn4H;Qp8C|
ztgl$N?HqT=z#%8V^HL7k=w70nPP&L+C6hT<hJx6koFN%RU&N~pT+}b>uzz<{>!0HV
zDRtrntfEtE{myx8#vx9m^`ku!`eOZ#BSy6Z@R98@*YA-*^hMorE5GN0zJy;60iK6`
pAL9QbtMsWZ=h{<_FuyeS3Lyf~99^LOsTF^N&tJ2m7XCQn{{c6m?y&#>
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/estimator.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/estimator.o
new file mode 100644
index 0000000000000000000000000000000000000000..bb2534a8bf8ba11fea5662c1c8fad00e890d6dcc
GIT binary patch
literal 14528
zcmeHOZ*W{y6~CKJA<zOTEz?+vef<NbrR=1&Xj^o6Nt!m*(1v8uBFOG$^O{{J*|*u<
z&}53Zt&CGGAJVaobq1u0<D`fTBaAd7U{#!{3_2Z(OdZil89t!nIF*7X4xM<;edpxe
zci+2{z!yH)%QW}i-}&9&IrqFjyYIZ^Yi%9dYGN_LEhe55{)|!R6aLtiLtES|*5YVX
z2z&fwJoWl=EB?nCITxd#ao7f2)QLmZ0&z&x*;D7^;t5f+T=I~M|7wAcYg&PS0QfC+
zHHUf@)EsJAfc%;e->6@2PsteS#9*#gBrooJ;rPY4IJ{hl!3*87<BP$^{u*(3(c;IJ
zrXPIpjIcj>=)FZ^${J2j!hW6=;`Z0C1I`iP9ILU%pQ#b!u?HSJW7*cB>eUc`tv$s&
z*z*yL8}>N*IB?&DeXW4_FLXB_uL^tWy+!ua#eKgS1KwiJ3-9;hz88<jVO<vZ7+;TF
zb2xTowd=xsF?As>)>dn(U8o;>!2UMwbt1lK?S=WM_v^7{A*N81wXo-Xs(V}sv97EY
z&w}0);@G3F3i13qaZ!C0_AtKOvfr72yzY;SWDQ{F;)|X@f6Hsdzo3U>DGpnZzt|>w
zd_}ET7~3Sqdti^L1~F(~DUzq=iDYVl7(7`gl4HP2)r!H1`Orh&&((+|YoI3P1M`46
zKtFFjE)GvGk$X6DZizj0JNRsVe>w?yd`<Pg0<n7XUoXZdrl*(u@Z$8X>4g0P9v}9R
z>9R+vD`U^^Unxe=-&?>-)r-OOWx+W9iuh_VSiM{%*Tf*!Mu;Exu?}MX?{pyMGss;A
z8jzoq1@@`wWbe!NX4P-D#~$fvX`OuNWwH6|J!0g*hWI4<e+ky6mxf~8T)npD`TYmP
zX5{<=IMB;H<NP^Xb9Hb{b**>-ZBJ|5C$;$)%ri^vaW%I6J)WN*Xxv9(j^_)WQy2IB
z^7uJ8H}L#}Yjg_F1N4W-;NretjZG|hY$+Zyz(iYja>pIb$z5Grth>tjLZ5YG*=oG8
zca7zgEBS#;#VuWlG%+)kGa*Wq=3=22`!44zfR!t5F{O}px&;TRt?odv-x+WUl}rf_
z;^#B{1DS%<Ysr+{0jJ`WkOxbfvstI#DP<~ow}A8QBPF+-b&FC5=G}W8r`TNR>qnsM
z6v}RC2Snhto=h1ia;*f*NQO~`>~hYF0R!^gnZ0eLk}KVd5q09(xAnVwWn4XFw|}VO
zv^)8}9P7dQ<gRT}XKNlD7qT);k*A1yRnXJxbjuFvL7$g<#L&v_Pzjf!-qu~supaIL
z(DJ=4vS*#G`8|6iaOuyb3|z{<r3_rkz@-fQA7tQd_%c10Hdo$Uv_1?6zT*bkZ1c+l
zY$0Zw>v}q0x6d}$*K6T?WK;P58ffzZvyXl<TV6RrJ?{Bz(0cv!zD%=!(5W6DJjcqm
z-ypR81L9Q!Uu<t}-C{Lv-+7mnblv`JE|V`<d)$&$$vIZ@Eya?%C*KdFQZ|>bIN8cj
z$+0#kHr%qIY5nHJ`VCfNrZjL1jGET0K|HbELd*K54Y!&cdN}SE9&4tfSn=pehls;}
zQ7sNidb>&jdR9GFT<Awxh<a%<;bHwnz>g_@nX#JiI?ol9S-kcs!aYAi@cGhBcmwe`
zVtigfeT#68>^p=v63%{qPIwdH>UkTV@kU1Iyf`=tAO8~!V+wziOz#rTb6Z&&58VY>
zKYX`Z1RIPgeBMWbaGrCI?&IPLio)-__``UI)ba6Qe+lTQS@8^>P8d%~9Ut!`oo^A&
zb8o#6&k&v_o<;o|gjZ?K{CRN0j6po3gf~%-U0ir)uL9BW3gc^~j*kcPc8w|_$DaQ%
zzC-Hxcu;4dK_`swkvcve)WNGJ*t~eccvb57cu)r_f?D%*!ua>3j*ka*u;deLo=zBl
zO6vG{Q0HSo5tw;8Vf>WT@$sO}^#+|V{uim^<3XJp3_4-_-%`iNgE~;9)ta}jFuo9O
z%`xHQL7f$v3g;(`-z0T>JgBqEpcBToNF5&!>fC713FF;T$H&vk%DDK1GV_MLz`qtU
z!EFHz?kC*KpAh&tf$f`w+j8dPM+q+yZc+af;iEJ^Lj7+6XKjLH_h$qCcLNRuX&HYL
zZDA{k&4Uk`DE$V&alcjKuY>am+ZqG^HUr*nz%!)(G{l8%o!5zyfnPP?-!<SrGvL2B
z;BOi5NdvwBKDeXuhJ{0~PMgSz)x%<SugDISN>FcYV}lrQGG+L_g+<u%okPwLR3Yz&
zak7-}>vKw2wZ+n7s+bw+cQd^qBiAd91TKIY30!G468zHc48<*XkCaoP(C_FQ5C&5>
z6st3Rj=J6EV$mt|I=!v#Pyq|girh{YD%e5mOe(hx6|z{NEsIo2O;x9tp{-6i3kJ0!
zol4C@ok_uL#F=EyMw~e;vk~RNO@$6?bFi$f?i2SGtj25Si(k6emvQ(ZcV0DJ)A39E
zx{g;Y*XX?Ekhp*TgiNxkuB&6|UdQ+d!GY{|`^w78j6SE*4X+lQwwWsm-!%BsB%}*o
zfT)l*-R@L&W(FJ$?cSTOWOGSZq_%hLYH99B?b^1jyDgbYHn()Nr9>7^K)2uN90F3N
zB%ER?U#RTSG<Fp76)`NY>eiA2Az-BWtbbc*D-6m@-s5a{3Qj4X?S`u&kN}cU%-i7Q
z%#Q9ZUudhN3UxVICx5@UqjGDZ(gm(N+`jfqp%>oa_^Sf%e`K(bEboRDFv%Q7n|v|v
z<xx<@!-C8CB@^A_vBT#DxV6qS9^athe2>-ni)kg|{EUSVkFV44WyII@ZNhc^tqRVX
z2(=Tg>vs^Y>lX>v_3=3nn;t(u*Xa5Wcyyubj}flxJW05&^NPafoFjDFz<-T!-S1fg
z{x0FyL;mleF?N$Q#yEE=`1=a3JbL1nPT6$7b%f)-RDM0-o1yPi^p_F76#6?Ad?Vo)
z51(Ub-b6U+t2n+i$A<gDXM1k<5{^2U&pI;n6aH}xFA|RN>|_z>A10i2*n~fNz=rXt
z$Ll4+F`m0Tiv0Tu;i$vc2pUckjyft{Pv7g1zfsXyOgQpYyn%4^`vrx+QNh2c;2ny-
z>bFzTSMj2PtNX1eI-gbahZVkxA0%9l^QfY;Qqg%t(NXbZgzGvl5srCNpF!|B5F6%A
z#a}V#yshxn{r*GI-{MKizvmUcir3NiXg$uwgzM)|1K}9|&5Hgqg|Fi44Eh@t9pxuW
zVw0ky;-4|-v@3iy4;_krs}g6Y!dLO#gzI@o6OQ|}6&-x8!-n~><;eS!Gw2i*9slW3
zh>D`4;==}=hZMfL--C+&r<HgfR`@D@#GwC(qO)GnIi~2S_>T-a{CtLa!#Mf=c9Qt|
z{q2;ZbGPD`hxpUCFY!dtLtMQN@U^4!n`kZbnP(|DelF~$Iopwc4`JACqA}w4D!8rS
zUsmvT1xNif&H1wib?ze!yEKgvPth2=oPwumj9rn&$VYvi*J=0(nm1_pDVjHG_*t5(
z`$hc;!rQ55zi-ogw}$iQZcf8HAzp05UME;*H{l00oa+fkHJm@^#x(pW>73B;V}uht
z<JU6a9EZ;5xOLnnojS!YR^`$(Z%}Z&E-adJ$9ZTl#KZg7`8fl>Xo#mu0(v|=*Y!ES
z`o5UQ>o9)Y7hi8|=Y1VC#4}1nU8kM}sAnDizQtz7CkfEw>?B;*Z;asMdCs^+cGllS
zbG9R{-hbH6e4F^(GoROUT+DALzDSfu1}d2z=qn|!&+(|_^k)(kXSgB~y_rfzBznqa
zktn%1LHhc{CXvWy2Rs<b(gMqXrA}c@7)kWI*$gw~!*#_gFeTuzPAfKeav_rX1HfpC
zUwDYN&y*jc&9Vp)ZSqSI(RNvoFq*s{^hKMM;zTq-mM9D+C{#pSX37<w8A=wIXYa`x
zj-oq&<vu<sK74P%QoQu=+*X@SlQ-z|mu>oWhxahNu5Bi8PbL0IdbNk=HTtO|J6~@%
z5w5ur%TP3;(QRVJf^}Zh)Yn_I{<ayWH(>t^<98O++`s_!y#A+}Ltf9Y4SXEy{!c?a
z7u#tqvAo{1de5{`>yIt)7<?aKzP`R43{m-?#Kb~N%fH@z3l9aa=ltV$l_>w`$^S5|
z=Z@F&9G}gi{O_h$9%qTz2tB@S<@M|zekvU4KS!@BPl8=-yq>W<45Iuup+jgE9VndQ
zTUuVv{=WfO)czZ<1_Lyb@h0$>*E6sm22uVy*LV!}gF3h+UeEYX0E_b9IY<9LhV@bY
za}oaWt*!3=4+j6kbM*f^ga2xT|Ai6$|7q}lY>xi_X7GQM{I`Q08|EM166^cF3X&g{
z|5J1HkKbdX@;?!=e|)>F`)@S(KR-wRs|@}pBm6Ik@ZWCm-$1YUF>h+)_!(<8_^+4$
zYmr|+MIC&b&FlI6&l>#ObM$|o!G9z9Z>K=fKYmu}{tp=Z=jQ1Ds|NqY2><x@T=)OD
z!T;zS{eR!!|3rj;{7BaQzi9A(VvhdD4gR?Z#K#%)zaql_S%d$HIr=|i@ZUhirgrd&
z4gIfzfBOFaWAI-`Uv$#2Ms2*Fv3Csq)8v1Yi0B{dIJ}<oav9X$KqB;9lq3K5(0cBW
zi%so8BGgXN`i3h!6W$I!2mf^cXx6{G;ED<Q>B%zs9)lP*_Up}rz<YYs`t!8^Yqa3>
G_5TA=rcw?7
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/estimator_complementary.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/estimator_complementary.o
new file mode 100644
index 0000000000000000000000000000000000000000..9fbd0b324e3557d270197ed409d8256da6740af8
GIT binary patch
literal 2576
zcmbuB&2Jk;6u_UoA*EFj#Yx&KDP&zm#fjp@b_AjkNSmY~AeD-`TMz`{tT!9H!uC3|
zYZR*pqKXTMLss-aI3?|&b;N}e@gY(qdf<eR5U3IdlJ+lvHV6v^^TwXBCtJH0o@KxH
ze)GO|XS~`^rq90;3<Q8n0KS8k$0@*1hg!B;H&r+ck5j96P?mn-U%$V9WwX35fp`B>
zpxgtn;sn8a@I82Yv%&J71RH-zff1U!BlT`z?zO>FK;$53cgNI9Dguk}7-$&@wA3-Q
zyHF3o;`+ZeZD&fY><+5cxg$`axq1+)JU@)<zjv#DZe!ls>S}U%wL-#UUnaw2H^}zK
zFaTZ4J%bSVVE7Pd_b*M9_hu){`&WLrwJoK7O^ssxe`?xYtbY&dr$?Y-grIt-Ry)yT
z<H-7<`ZKcT9Q{zyk3jWDWV^3lP3nc41m{`7Yxd5-v(EsiTl(i})Cf&R&3<)@&U!ro
z-uh|q)<WP>e?1M}jjP~YC&-cwHrG8FO|$qNtUHHwacwJ5uL;*4b$yX)O*^;yb#ngG
zn*{fCC5*G&la7z<NPQd2n16a3yzp|PkN-Zv%+%Dl9GSUrS=MYjYh-jQFE7|cb~C0t
z5iJmV!OEgVjEv=)hFc`2d{#+B6S4SNC7zHYI>|-RiVY7_uEb@!5|1UG$18n=(6iSC
zf7IHANNrChfP|lRB4H)J4AjBHCmc5j<>7d|XV|sHkJjS=&M<zA`J9h1F8la%jK_SO
zx)L68zl<RW3D?UfxPYAZ6m#BV@qCTPmpa6M#^PnvR5sZySwoxGpq$IMXtd+EJMiB+
z@CO}uANFrof3yP!({Zhw?%E_}*ttU1%$a#tCnd#zp(Plahxbdw2Hh|qt)t=E3$2VP
zG2ykm<$`18orR)f+4&dhezW+2Pz|vdTKC(Bwwj$Y7mH@m6!R_@=5^P+D54qDoi1ig
zl6>QBAHG<`Sdz!ld<zqX@y=V8o3V@T4ADQd+!7RQ$8s^U(cn!pYa1e-Zrm~xx1cHg
zcz>U0daXU6{7He2GP?&kKU);V7^nLu^7D)jAb*P4RDIEbpTamQ{`xZG{`wKdpGGbA
zeUWk6H`FLu|9w^9_)Kofy8`cRQh<!W`vm@xz>f?37UTZ;zhT@z|81ep384-sPATW=
zY1A%h=nS`rnbj57TyjCd1EhnJb{tUf_|vm5*7zT`jJb5QZeI<R`FGgdeA)k>rO#Ko
zA1V)E`fv7#`-<h$`qZqyL7+a#;u_CY`b<11CxZul?)k<6dQNH0PWdnKM5cLvj^k+1
zn*3aI&il`Dz%=hK>UN_pF{m<4U#E`Zm-pw_e;Ap6cG_x_9rBlXBMMP`ZvDU3E`No+
Nzl}H2n!o=1{{TyVZH52<
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/eventtrigger.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/eventtrigger.o
new file mode 100644
index 0000000000000000000000000000000000000000..e4144b488bf46d96fbcc228e56ca1c1df6e48c70
GIT binary patch
literal 2056
zcmbtUT}TvB6h1SfrbSf#5ePX85(YW!E(j_;><_vHi<WK>7_77FsEfPqHZz5y<U%jK
z1d01%8)(`?yAVhOJq1E9kuMSCbAQl7FO?VxnVq|Pu8!mGQ)iib&iT%Fe(v16Gus{P
z5d{Ib2=D^-J&ppruH3gh1=9mHP|djaKYbOSIl!~Mys+>SKv;)A{&|=Yvujd#L&W$O
zjC(Qun8hzZtyG!r_o43qab2ul$vTkln5oD%gD~z{U3|dunq}!ddv>N@=5{2Q`;0YK
zFn@DE$kk!Zi0Ikg8WeK|>JZeeXa4%<Gq<Jeq6jzci4fY7AfKs%D?`gLCt$yf_$Z6B
z)GrAT`Y1KzhcNG#RF}uCWDMlYiuK>*-QD&NQe%E|z?<6|^yPM@Up-;7G(!3v!&uCU
zv-#Nm+1^!v=ienE4`TC%b$+&gAHbaVn*5vL5b*oE<kmp%RXLPQ#-n3uY(gGM>asbe
z$=<e<o*aqA(bA)1F;k10H+4<!RNQTDr>j$Ox#d<>Pqd-sJa>-aic4k@m($%|IFzyr
zJJSmIv0I8Dl{|3(34f(T!b)~ISpZm<gMw#;a+u$Us9?dX3%ueYf#tFhE~Bos%*lKv
zZhVTp3+~=>u?&74aaKnrW(VmM>QZ&?AkO$h#Cu430d*<<65@q9=~bL2{!_wb!uN8u
zTiS$a>ao#LO;@7OG6^li5LM&xh#DO?z#0x{=A~f>2ZDV*Z!p}~(=*T=3WvPDV0Re8
zR$|yNRo%4b`leX6jh9RvruC``4GdF{CMXyxj(33BuZ_kGQ`7x4D(#c2I^5?`?x5!9
z+llxw3oesw=eH8h_{S}LeqQ!EW|=yZW$L6YxOJX2!ke(~39<_ceI{&9>us(e{EQ9f
z=WOS<5Wm632gR65m}&&IsTcJaw{$J8DyBARf-<a{Dku@d0417CB=G7K$NKM8#tLk-
zDqAHF`A(XfhxhI;0Zpjcd-0IZ)n$5F9hA@NGn3y3{{J{jxc!Thvi0S4?eKZ3SuUUV
z<N0>qMg5(eK$`a-wBfwJRpYn*kh~?rD(NH0sKJN#=lf@veRftXP2d~mScLcG&?z)Z
P<=>@GX%{Dww&(u?(y#^f
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/extrx.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/extrx.o
new file mode 100644
index 0000000000000000000000000000000000000000..28921f7ec51a7dbd3c01f738e616bfddeef8dde2
GIT binary patch
literal 3848
zcmd6qPfQ$T6u{r^pjK!b3Z=9ZVYVTbnljm4TLWzqXMq+-YSS#Ml4t_MFu0q}?kqDy
zWkb}hUQE=4P0)C<$O(Ed98AO*P4&?9U?S0&c;raDh$S9~A^6_R_sPewb1*T{M`qr8
zzwf>G{h4pR9p1Wn{aQ2<0WJ~v0`@#k0Up-v*{Wx%a0Cv+&g@sqI}%j3h9k?z0p{kT
zXkU(0{%C~l567YMYcuR@oR#vJG9T?<N=N!v(@<JU55d{CPP}UIYL}&-*QLgL6w_V<
zQ=jhcW<0wU>~aJ$>vz>s`}guxC)#(SYR@|lV(&fQ3R7ol;MgEQW~?4cZ%3i$x82?5
za*JA`T(|-av6S2fctx>~a)Vmx{U!G1;wAXn8;dHpQG59W#-r|4V{MDIdu>o!O{XZI
za@#PM+K>9}fOZPX>2;~;-a>=V?qdHxVE;R_-z>+V{3ET&8H`E6{YP7Mu-%Aj<KWti
ze*|A@H(;B_@HjGD>p8UNjKyeWt4`g108rVP{cb6S8hNE3Ye-lxda9g8|M=CBOnL+j
zW5%^-Q0v(^-bp8zPBQ(hr`@bQ?YIE8Wts$vIakl3E@`iO?T%{|M|m-i{J(B@LWUFl
zkN6WI{r*#44ygkJeSMeY&Vd^*${EWt^{kdF$di^WyIDg{bro%EGH0S?>)D)Z=<c*_
z$URE3D;ZDpD2b%psoD81wBqN^5myp2wIt%ni(wu59QPsA!0)@&qNJ)P0)T{n)kMNd
zL3z>x)XRQ3jBZq@UoV76@Yw!f^iFsrj34ax6vjt{@$mA`Fn-9Z2T;#+7vm?H|31@~
z8DC<)iZ3r02?U2hf1C&TOV}O};_2n*BEi93<kvaKi<lG<;x~B_)DrlsEg*OU9X>~q
ze-Oey3E`iG@NYx-Pa%8*c>~UXKkqU0Ngm-<ZJd9GaQ`4wbm*8NGd+{hoLkT_0s6FU
z_hq$0!7!DJ7cTVR3F*fU8*b6c6<n~K;gUmVpPw}BYWl6->B&jM4mMFu)-pP3TCaIo
zc>Fpg$2IaVYdIH_Z5Q-nF+X6qnOxp*TrFSpz>t%=t>w(zxM_HPpH;YR*luzf$B=k#
zAG&5*8dkCLd95&E*f`R^2kQ-UsF3qJ@eFUOeYT;w26pe}bXq@ppGX>Uql<3?U(==l
z@ASjrH1Z~9le#W&e-HYAetSqLzS%du`#iIW^LK~P=K`m9k;@u0C|=~7A-o3TNGQI=
zH@!Q46L=Dw?|H_9^X(Suv<h{u2z8DMTot(Z7WNBV{4Ki4IQ1*m84<Wx=T(7=bxg)v
zP(LM%ho4vU$wqa!FS8iV`Sa$_mpJVQ9^V~^=g&+PIK|g8|E9pHUzz!QKk)i||78R5
zd>loAQ+>WhWr0)uIP>2XIK}gEd@OK^=kr+*IK|7%UlBOPtIS^&IK_7`|DnJsevtWV
z0;hOBuXTY_JRc`0PATtd<EUNR*I91ahN&qozS*EmXs!mzxZ{9gTjWr9Lg@xY*YiH6
zU_5&ijK`x#p;N-ZQ|w<78SCH{5q_Ec!m6*JNR5Kj3pSaj@uKxm@e*Z?76WCS<<ov5
z^AJIllfHtdQ4<e-QLF^|W#L{dw@IJJi)x1DZv=jddH<A4LSN6+mH+ij#24QGD;zM*
z^ZD>p<kiMs&tB@ekbI6`2+3by`I|hDY2H7_gJ@J+{}uKrz~@2hPmhG>^YtG=M±
zCCVII(BS;}yhY81DyG9G%U@%S^lv2n&IJ3XVFsTa6}r!!+Y#OoL6m?C$B<RaA7lTw
LYF^gfEtvlomq1og
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/freeRTOSdebug.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/freeRTOSdebug.o
new file mode 100644
index 0000000000000000000000000000000000000000..5381a527b75d0c8738049331518357148d148606
GIT binary patch
literal 1888
zcmb`Hzi-n(6vtod0&V$OC<3WSxKf2$iCRen5=BTj{gJjPP}G<KF$CAS5UWluI$xlO
zfli3Al~|Zq7+_;#guj5TtnI%58$(szv+q(ji5J9+&hLAld-v}A?wr>P#X^5yA86}?
zuW;DY6ku=QP}`BTVHk#B|JAq8`vz?9&Kf%(?ixG0*l_+9hHQ-kYy;STP`?|8%~cy4
z=}q+1C#@RAV{FtPy=odex_vjwKas=meK!cWXI5Q5V3qM<Vq`}!z~bE8ZF6$*!6Vb*
zJn(9+-!Q9On6k#q{B%?BDo!`^!mIg`d9o##Ib-FfbD8XnmCc!xuBcC=%1liWx3VUU
zWHY&&@oMQ$s@VYiI_MQ)^sFd=fxlj6V5VMXz_Bho5|M5`8u4ByN$Vc(%5w?H`NTdQ
z6>$Uoxvpq{dnx>J3U^a@Erp8|{suYi^C@~VU8(n|N8tB??rRTK!Pu&^QmU}E)-%h4
zi3&_?!1H{w8Tg(necp(#P$9ZlOPsGmd9k=Mn=h7E3Wd^wQ+D#R#f36>yb<z%J#0z5
zRsvX4_zhVFyp1I$p~+t`QIfm~q2z+)!;lH-unjryN*AKVORQ0GgzK^8MwNpk<@nzE
z9B(xw#ODQY0go(snwO)ujCuRgBfFyb#g2GW@fqYNl_oc#^ceC}37$#t(+Pejh1&^!
zCJ{fcwBEno_mbjzpPCmFdCn&CfEB*1OLq;u6tS;qC0O8E5^D-pg{o?;g&|miQ-{K{
z)-A9+UavDO=zlU3^I*xkz8D)BStWMuXXm#vh9h(r?RG>g-l|W3kdmXFz(#VAI%v91
z*H9Dh{HORxK|M^RYmZz<MLGX<eir9a&K$O+eNr9TU()pc^*(GIB(3k6j{Tv;6AhHt
z^OC;5BZj&e74SuQT6YMWUSHRbSm(PVf<2W~zXvfgy>8s2|CHYIx9CvOmSfj`cFz9`
D(KM@`
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/i2c_drv.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/i2c_drv.o
new file mode 100644
index 0000000000000000000000000000000000000000..5842a05277db5af5505083bf8d42343192af19fe
GIT binary patch
literal 2888
zcmeH}zi-n}5XUb~p@j<6G9iJ4kt)$h#BvM_VM<6#8;K$aKNg16wO^WuB(Ch&s!T92
zz@Nd!AArQ#0g3(tu)@X+{{Y<CcZqp13^2fuC;8po$KQKD&U#ONx_0a4OrZeM3h)-j
zkx+ma^JBl3xHVXSlW<sUf4pE7Kgjbh;_=F+-n0VK3jCK9SZ_40TPy3gA6WOpu<v)h
z-q7lVk)^xJs+V`8u+!_K7x~?uR=(bglvTCevg=f;cEz<;yl7BH&ncCN+ZBu6R2=u(
z?{`ag*(`kho~J72-gE#(n8}kPFHZ1<gyh|rG|udV{&Yen`4aL%M!(CM=b1|^mR=X(
z7^}u69e<Li`nj=?y%O3pnL5bIt}<U_o$w9jmcf1Ij=}et*9`uW`5lA5V!mbYH_T=K
zvYz+MpBeg37%ye&v&En23v-FZLeKTvL9}oCuzUc^0R+l_d}A+ORUL@cFb*RQP=~VS
zu%{^n-A1H5tu|F0dpjzRHHW$$1Q9gdMy0*hYByVVH@socSArg9(duTs(!Qs0(1DZX
zn0;k38_}<_-E21RhPM*qUbtRj=ojF)1Zbr$!lmwD$4>^@+eWLS)ON+w>Og}Xc-jMd
zJC4DQ!Ze6f-%GfSp4|_9uMf5#4hCwdGjslpdk&N76KD58<JG9c_B=JCesScb&P6no
zZ=UdXhE77#X4@qU=ojfv^DkpAjcMLIN64ssPWo||`5jAO75lvPzvhJ=8Uvg8bl&Mq
z)$sYLvCv^iA>A&Lf0lU@Elnjl#?a-1`bYp<URIJrh+<=jiSmf^Yy9#A(o^`D^Ak5~
ePXo-)Q4jDfHKShU7eM!KUcSQ<wM59)%>My3LC+lk
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/i2cdev.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/i2cdev.o
new file mode 100644
index 0000000000000000000000000000000000000000..03ff49e8ec2af52e7271ba3ccae458b046e6743d
GIT binary patch
literal 1776
zcmbu8&ubG=5XUFoYFmFmEgp(J_&|{q%(A<nn4Z=at%9fo#e$%2H(RriWW(kuDFxHB
zCkviDdDNaf2;xPGc=F^$@hI4Tz&{}9Ofru=h6O<<JZ9!I^S-mYd9Q!z+U1E-35=EC
z9gH(W0p3iG<8T;;Fay(|V7s>G-2Zk`IbUhPUvk+m^L@wJJ%t)L;yCHay406-nGd!;
zydF5Pv)_lEpM9vZ_VdBk$5-^+jy21k2dgV9ORBtj{kFQ5WzDz|rERs5<w`dab+OXP
zvyHTgQ64u^oy7W4o~WuDR07Yhx_+R_QQoRx<Si}|cYQ?_-wV!-zhhBE-+mH){Vu9G
zh5rnIgTEqkP)XXMAt?HXN#}rUhoea5thv+NG0%LKbHmRtSAx@Pla42N$ecWx(Yb*!
z_1_#)fFtbhF@M0h>2EXd2>yimw%|{hKNI`~^OwvO`(5<(JbRp*x$l{O5ggJWt|yP(
z7*6*%zS>SThqWZCFUzcJ6|JzAJiK6~%bPl}Qmp#tIlq(RQAAlIG|cUqB{k|DYni>G
z9koZc#{L8zox>cHd&}_x@>z?2;+Xo6SsdK%W=luw=yg8w4HM-_Gjes()8N)49f7;v
z?SdO;tya?3w#I+N3is0KKPWUp&c6$8zY~=faM7&_aoJYpt9FGU>C+r@PUyan(fuGU
zZ|pq50+aYG_K@bk?)PyoX?nP9GxP7-5Mwjn_7kFq(jGVbU_XV7mVEyiWb)Y&!5YKQ
Xlvrlw8boKQXn%*l|B`8BFZcfepiI%c
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/led.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/led.o
new file mode 100644
index 0000000000000000000000000000000000000000..955b6b0cd9470d66a30aa43e24857ea100d42c84
GIT binary patch
literal 1136
zcmbtT%}T>S5S}*0R!`cK=)o04E!dC*q|{SN)gp)ottStXrdtw7nv$$gPkQj3y!sM)
z_7!{r-HAISEIH{y_`dn(FPYgqon4;SYc-%#gI6dlQUMnAg1b3&p#@ENGwwfjnDI^z
z!1HxkD|3vgvSBnFp0LBw)h!z*N#qA!IA^mYWg_5g&|Rd-EQ};e{U8+F7Y`|CebebW
zmfbgPhaGxp+?CAgbWk^Kh928;j*EBJ8Gd5}zP@!GZKHAmsF#LNN;ITLKh0dInk3d~
z=;5#?m3FBwMYNT^t}<E*x0KG5P4W9mw=^AXtnX?%M0{%cu(w2VF%Jdem}fZ-BkrYx
zC_?Rqi-G}|*<&ociA0h9Vn9srr2up42@lLkmVxOfam?pJb^af0%XFOTidM!|_Nk`R
z+(_P)1oQQcy-<LL`UVfAA9wKA{3Dr*HEBPR=7;*<k)V+Jm$B*=eyVt;0&zZg2kE|S
fD*viP{oQkyD%w+V1k{)84N0o<dn#Z5<@Ed?TVG#V
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ledseq.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ledseq.o
new file mode 100644
index 0000000000000000000000000000000000000000..6c169f3880b341a454583ef91a649102b60010e9
GIT binary patch
literal 5888
zcmcIoZ)_aZ5udwts7cad`<y>b+IX*Z!3pGQJ6OU9m9>p+P)$kfLy7?DygqN@tIv0r
zyS;G5Ae^e7+Df&PNCXK{iue#m`BbG8OQi~w4<Noo5umgJ$w2`j!3QE^#V28onYT0c
z^Rth9DP!%;d%yRac{8)K`|kW~??7KT6atYD{1aAZf}(C*9Xo31z*g7-%agCqE?Y1Y
zf~moUq0lVSrhgxXnZ*c{7cJPAD0M6${WM<F08TlC*WW^LVZqvV&O)!z8mAn^`Og}i
zxdcSUPgE*#yUv+ws)05e$EVTPiKjZ27KXZJ7b8x2dGbGJFItHYnr!QRx|S#ZrS_-2
zZ|sKh4GYfEewf2_6kz7S;o+siCb%%tfd0`ZY=ZdW<KfvK;@)rk*1w0iuiWCySuk}u
zj2Gr{8SrY}1Rb;{cD4oa<6(+_>LjhlpMK^Pt-Imwz3+z`|MW8Yh}J;8+W>QkT4-~^
z5U2gFeqD)=Aogmd@*Mf6ePj>ae{{Kmadpp9o;P+=o^Po<C9Y@Dhi>=3N@d5qRkM$L
zgr9a!)v)gqsOPO6ss^<7G1i0D2qRxnya*S+w4eB;{bg_DG*W$0Pvbr7bOAchb`a~@
zsn?(CY-`x^<iBUhhI(RQ3zQ>hi}TZ0u@`K#FN8yzX+Cd7_AP9oJl|Y%Kd)iD<b&cP
zA6I)|hU!K&uS8((+HFuKd+d+vWIMm(ue<bk$d>!@B=y9C>W8Vz{&r`M?5K|OR^z^}
z@H&L|gmRZ!&>qCW3wsrNy5uk250THO0OC|9iIsAWQcWtAyWu660p!X06L?>wH%U8x
zIXf6ee&`vh-5q-z?Ef%cP#fI?aL=A7z^|PenCsdKbCd_={|l^BwHkbKlN#JCf6TFA
zm}^jv`AhE71FQKvotSrr<VCUJnyQP+`S5DaO<K+>SKI^dPq~|(_d3jto_T<O`~Z9E
zV=Huyp7}QbF5D0BIX&;>+W{ymjdrB5#?X!z3F+^9PWx0)XrH%ff`ZSyl5ZIQ%$O5b
z7qOSPU&Mq-#9r_>*-&uZZ(#BLe%4fRZ{|~lc2gL8U_+_qzgj%siTC&P+-tY=|K?FU
zp3SC{V{R&AAIauzf6TMH_UH21BdIiw^2xE3?<M_W-m^Pn?fctX+d5-y?RJZspV*J1
z*1dZPkG0vf($?BeZ~gBO$^l<Jm5nIY#wRCO__vW*=*bj%IR@Rnb_LHX2y6aJyu6F?
zDV{&UMZQzb*Y6wP>-UWzKcvMY_ln9vxXeY9dkYU!Qv(0%@g5|GG=2*kKFqkxMbokc
zw=io}1^(CL0l#*Y$fF_Db?Z=o$Ex5t#OpC%@g(}GD*QiJ!C$O`|Gf(SY8Cw5D)>i;
zH(*8Q`G)MoImu^u5suBGWNV;ck?}gl>5GpNq;6E7TExlEL4)7G_%!2xU^mT-+uU-k
zjCUelkM~jL5@(<IXa0T6KP3Jcmp&h5ypCJ<LFP}gf1ZN)|0Clv7yZ1#**O}C|MQH?
zT==iEAK6dvcbGrT8%quU%lu)+h5sqzrvK~g=Ou$r_mAo({>9H`g<J5N!QaXJvj%<#
z^Di0rz0AL8;JwVJJ|dC4AnlD7ykoH>G?$>58+CoJE9s|>dyp??27<MmoA+a_&^!vM
z!b6#q&o;docLc4$Rs13E82G6PFHfsOo)3xsfk(Q#1`?0-^$qpL6Y;L@f!+k*UPUjH
z^a_wW9w&Og=PUit15i3t^om};m+|tc<dBycWn{>kaC2kXycc)JJ$Sf14kb2K%%1GT
zgiGYOTNqdFlH)zuVn*Uz7c$2m_X>(48bcc_W_S@t-RW#{Je4`h2<Fr?=H`!j1Kx2j
zO^GD%bjlyq7=AV<WE>jygWl0p!T0i5C{+RF!N(Z-Ts+Z6SEdKuLSfxBG3p&zv*lWV
z`6?c7bY(4_%8WmdeKMmgY4T`pWmwFu(A+fLZ%RmwR`4WFNAlPaL2#?n6-GMy<cRAB
zKGjgI==~MJ=Rn?7gyZi>CEE<Vnep9-M|e!Cg~#MaYzexHae5DJ<1wjW9-IE@%RdSE
z-yRIr=NTTGalXK~>E|NjW}F{t_zoVE`dY)~StsZ|jDv*y=zPBlKBeJ54oubO84aiJ
z3?eUR_-+AFU(j%!e}(Z~sP%Z{9HRQ@-!85(f4hNySp}DKOZ+emYVf^8B7OvKWL)?G
z3&1w`f;Tfx^=uLl_1zl&Qw{euT+jEshU@q1l7{R2_ZT<(=L+Ly|9qwKsh*PW660na
zn)yg0|9bzoGEV*fb1knD<7Qu-*YGuYY51DF7?=7>oL3k(<NQM7>(Bd_jGJ|k^WMzs
zC){M_b1f;-zqIzs1hwR1;;qafoc@_2BIiBf@(!W3VI~m%OCFOdRl()_CVrd7mvfr%
z0~&r&^RwosNUZR?3Ev%oSi#Q+dQ3)nFYU&BujE4v&t(^4BZUIQlF13B)hgjJ93hOS
zpoeGP|4D50gDI^0rtTm{a#(*E;C$u#gj&V-8fv0AJQp?fqhNH9?Qg{??NiGHxu3T)
z&h5ji0B6{4X$1)eVlOb=Tf$8HY5oag#%tQsJ*Bv+*&oC;T}=C5;o?U2^Su8R-5AHF
zJ^gcSqxxNH2n@xZ>PNqt#9r$6AY!zCD_*+1#y_zh*FhW;mqge6N(vVEb0`1rqmJ{S
p-?emJoBLB-X6?vD3%?xVhI84MI3)FWZDfCzzZ@J=tkn<G{#&v?6Q2M8
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/lh_bootloader.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/lh_bootloader.o
new file mode 100644
index 0000000000000000000000000000000000000000..8f550b3940c16c3e3ba25c4c66189407f08c156d
GIT binary patch
literal 1696
zcmchXJ8u&~5XZ;4@JJUPLP#K3qzDp;oNP-eoa(@e9VCRT$dH1<S)VuDiL=+*+lU|v
z($b}+qokyxg^n)(;v>-V31DWut6Qy|hJvx~=0Crk$36D^cIR<tsa6ALHTVow<S4+w
za-|a^6Ig+Zq)uy)v^c=l9XQ#;+7?6qB^vy=&7$wVrWm}n{}H?S&~3N3*?RZMQ`VQV
zNHd;K*r8NRXM#Q0oGN*k7pPR4<yxfrND0=8o14vgqZK!rY@Ms|CaU_z2JyJTXr)na
zZkdO1=82x=GW`CtC?Q(-qyZxQEwTtZg?7n+`8ReIdCkjr88=M+d>_IQoHMKb=@tf;
zz3aSb7w=ilY;1M{>bm9R$sBK^ralQlG{<|WiIXRDe1Mwx0YNm!-=HQwHMHXIEI$eO
zd&^G){>kzW0f!<R45ieC<RhWt6xNO*FCR^E4QnG@92Q2C=!;St(kXbE?JL|jJ^n%%
z^blM0WoO?6U7?=|RpxS1r6cPpsbwmQxwSpPXQO6~`Acy$ttxjEFGVL;<5yhGhE?-%
zU|?79#rtpD>1zRBwRItfxO_d<e28AFna`Y3qTsO>#~R`h*Bs(uSwfu3@mNfBa2@{|
zGAyLMdp>B8*!W|>-F-Mr`<?DNalrbY_7mH+G4-c8Zl7JZ{I2EU7x~MshmLyqb{_-k
zc~*UxAI1%=C0577H#h&e4^g{%-!BC@6z<xDZ`NNxwt`1^|HQ&;M+B=Dex<-OH`gKh
Re_B+}>_*&niPnepe*w)2yI=qS
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/log.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/log.o
new file mode 100644
index 0000000000000000000000000000000000000000..d388b0a20bc1d902647e1c836fed71f449d25265
GIT binary patch
literal 24072
zcmeHP3vg7|dH(P2f@CCvkOat}qAMA@f`SY(GLlWKyAtNnU<1;|u}vo0)$W26y?0j*
zGO}4=rE#OAVU03zN13s}No!GO>Sj!X9J>*Ox=e8!7l=y}x3em4<CG+0hdB1yi0${^
zdyY7|;`TA^OlLZKhTU`TcmDIA|8<_6)q(rAZ+2-K$)wSD>H3>QiL!TJe>TiVgK{Z{
zruM%&Hsz*-M)8I#joMft(V>GbO4LngiF$hY!~vo<F!YsrXko2EJ>GQMXPC6!v8nw(
zcz(j&^rqhb_~G{pC{@*O941<Hb^!JDJQ||)MrwlSr4rr!qe(X%BQjF8*_0Yhr;m^R
z>hbf3LC5sbd>Zo4HBzG*z2u?z({75NbKw)f2ciy3jA<A@BJcxq!3%tb!DkWpK!^O}
zzwAFxkZ<5~RVS`AddJ=`Fj7)ZmczsPk)<!c*OM{My0V^-b(Ws2-yrB&M{T0?Y&=gJ
zn%e*UF_ww#HbYjAkz#qd{i*#YP1~@2fgNI6=wHJ&F2MVQM(bmco9*^BS8*clGR8|h
zv@Q-A{yv@lI=}xR^5Iij;#t?C%Np#?y7*BCHpthgIKlF}JXt47NV|Lz<>Wee4!%EB
z3VHDv;&$;d=}J7V4<#MjMcRaQv1B8dkq)t+Sat)xLfyit{V&V-c>4X_uCd>s{DYu-
zY!PU`3t3p7D|M78gs+qE59&aF8Xhpd)ZpsRYn&{jzLU_!UrGC#7gJ4O9@Y5f&`Sel
zM$HoN_y9aoZJx0Y-Lxtd)e`AX(|Bnv<)?Skcx@i_=sDy&GlzVLo1Td!$aAUZB(V5W
zV|-wqk%G;7CiBUcbQi5E^B7|W)xMbo59Y7u7U#Prv|UZv%Ocub_!fL?i>W6L8z(<)
zyh;~KKbzc5ua-<`JxAt~&+js7N?NFA<wEkM+BS_HhiuZnh^=#@ihd=<6d9ODzNg?L
zg1%;~?XDa9AXpFEzGnKqwg@tRl=g9(N3v$hd@^sQ%q*{V;>c&E%#%;fTf=huQJ?)>
z+V5#(`A)gx=RW%DK(&|dKFj{BD>0sa9yF9qiOEJSf%ss*4>Ro}ZpwMgMK!}NBQ=~#
zn>J_rvTaRUz`mvLr)Sub?V#F{im8C@`9eCqq!zaJ+UT{LX3^&}J^J{P+Cup1%1r*=
zY#aSXi~lg_M-fLX`{?`Ws#DFzxc-HqhUBgj5e@m|uF;6mPs{2s4xMVIamtPtK>xO_
zzfSu!E6&ZhCo67;zX5*9-S9E^1z-!>NTyu1-PBY5UfQP@8&B7n<A`g>Za3I+A?#T5
z9q>2^nxy*{j9oOGY%<1Kw^rbU`dnt(Jvh_ulxNjH3c512e$-pT^&bY#ZBO(4-b5ec
zjkDW(^)X;GVx41GiFK*hrdd1<ljps_XUcHWl%X29Iv!?Y%(~Hdm_3IUmUyp^`*J*_
z`SFHYqMq!9`pC`jDePm8HS^XQ<8$!*EsQ(4$iJ*nVt%oa%E{9bH=&K2fh};y8$4A;
z>YMZErKH<)41KJ@rNc+?U0v~}^GDA#R|m<J<HtO4`{M@=M_Tt(@73lG8S^QB^o+mS
zP41in=%=qE_AqDgc-Vk(y|50k(L}DEQS>!8$3dJDLGXCbW7O>I-+#Cc^HZKHcc}K7
zyXT0De8v-=#@EnqN|w@ieqR2nJ!qruo&D!m-b4%M&ZAU*8Pz=7TK3`F9!t(a@H`EE
zc|@s|uuH9`wVh3&@1cFROOr-DzxYkscga2fSQaqG_mENZdsMxl)|J)vQ^=Qu{|I@|
zk9KKZ8;|P-=#If3?908`M(W8$uA$e8HlJr%sQ*t#_F~SQX!Td`DWY+sv-nQGZpjt;
z7_wAR>K{=zu30j$z1W^kHv0<XOQM|R{onHc8jKmz|8hRD#{kF0j2J*n{4)J)Lmpzm
zlmqb)%K5Lw!)p^Ohn^5IF|lA~OnliPCUnH88WX?DGxqHgF|iIY(d3%nHi?*+IDnYQ
zr9>@aVtL;388LA?V&YyA6CuoDEH}rmjEjXzTnvf0km~@BjlaP<>XLiGbZl^a86Qm|
zK6tHlqxg_~ZX6>onlX|TF*4D0Jw`l;k%fqnABz}~d^kqF4UA*qXB>MXCU`8J+JAg(
z6z{w)kn5E~;8Dznyw>7%0MGxt4&XVw2p^uqKf0oQC-ps7;;~PC?N=X1=Zy8cw8Z3{
zB-aFolAko64<&bq{2oe8x{Hr-TZo@w%&|}V#T*;Y!g%1JhylOx9Dl@(`7;OeGv=&`
zrR3X+H9-m11j$>FV@(j?@&cpgs5NId3@$+ZY%Fm1l{B)Qy<(mBEar@ODfxovg9pTV
z){FL=@kv6KfdZ;I=q8LsGz=S=>rj@7=YPg7z*fc*T5qm9s>nCsHfrK%t2CQ-m12A;
zjeF1k$+h&?wPMP@4B8T`0d%ZSuwLl#!nd>N`+q#bb(Uit!FB$L>tNp0?j&E&6fns3
z55QRWbd%O+>I~htLf?sbv_5$!%SMSL=6IGbc*^L@(!SL2c1gV9Hq<=`xdTsQe#+Mp
zUvyL77jmfP0D0PiYX_G;xxmtMa_X!3LiaxAA#9(|^B3Fp<OgZrt>9S)UUAe990b4l
zTH;CYWBTbf7Hj7GJ<abh?Nj;v0r)YG0P4!QFI;Jie;@P6{m>`0+(<1(`7*H|;TV0V
z$=mn)Iwi6(zL#LU^<s?lFSh*mW;0>kKBvtOyT)4{tuEv7^;+#+AG-^WQ9A1`_VGQf
zkA5iWCa<M^W%Q*6_BZPbKlcqlA63RMWRx;>*kp2{9^vy8{C!;}S6ee=8ZEN=Ew@zy
znd0ng$W#v*CWTBIWI{|&%fxgn6US#M<YJkgg**eouF?+%Wcni7<k+sqx<Bc59n%oc
zgndgbWwjv=eAvHS4qz@}n=!xLa$l20>j?dYZ6V`*0CNSe7dUR?SFO0?Hu(L7c;9$~
zHkq&5E@7UP?Q(nEwz-!=n>zGodfBf3YTBpD<b|x<7ycYNwPJ6z^5m^&SN;Nfx5wiR
zXI(c9{qz8h|JCPKp7_}YN?op})TOM2E7?z%hOoZC+5`KPRb_~k<UK~}ZNz@C|F#j7
zC&C6Le&BKs{iSP;xemTukN$yv`O^c&_|G;NslXgc9l&@viawnDsxhvi-zMEzt7PAO
zh5H=(;ni#DC8e%-!$-*V1+<>!3_#A(iCfRUnXe7~M2u4|@E**KpM&n_23Q{VGIOo?
zrYQes?3YS`OPZv6v02Xj`Vx41eit@F`K2}*pTs(o`_*89)o(7f8RIU@kIXZGz7a&6
z1^bVVl(qz`dHp`H#ERW!l))ayCSj{OT0CTkedr|gCDL-Jh!$cUpI@>MdmoH#+2$JG
zlGEkEz5)FGORc^u<>&T32G6^|k9Co9vp#;;vY|=VqgYGSp+5VCV^{4*hoPGrvTKm}
zDU36&d6pif{m+dYgnk1p0ZRvrw_NW()uC{v4rk1LgiQxA{`|LeDAE!?M6A0IQ%B(A
zBw{JxDdSk;`KaMB=<$CUr`U(gh|?(KNq!RR<TbD@kNZ2!ao_a85cJ@(qqom4JB~8$
z_dh|Ox(_@wJl7+a`+J_hmtr1&7=5xPkE(bba0&A{&;LQp=ZzSX3lXPfSOZ)0f4o7*
zv$Y1m{JEUxbl2Gfd$2dVT7Q`O-6JI!*Rk&(@4z^*4|C9?^Rxu73zmWRe(<{mWBNwK
zs(%h`I6jva9s&PXa0Vn}iDQk|2ma+&Z2A$Cs4_$%zBR-I_gjw5;btoi1DH?zkfD|q
zwS5KS_oTb%*g^1>@yl_ox5TPT!3Qy4Lsx4z=(4{&f%zNzfl{2E)V9!jTM=Wj&0^5t
zTxN-sjrn|lF^KuF4sW3B<LG^3Y$yLwOWqJ<A;{;SOQ~mJiw>+Wx!$0Mc5%Pvxmx#A
zVvvrGl+i>@nCA-U+)N*Ccn<xhhR1U9Tqe-)KB13rq6Yr%3F_lBB*X^xKE-@?m#^U*
zs0nkxNzes9PJca&GWH?j_|PAL20A6aWi017Nvr^09<N-L*1C(&E_7h;i}MS#QN!mS
z@*IPC)ZJpznqvj`jhCS>kMCTDeOry(PfYE9#XK*PYsBM_<0$L^*?NBAA>U%qzX{A*
zSH{mFrW!bgaQ<`b1GjdJ=lOb~yB>s1hY=IeW?8?m?c1>5QP_{i9_)dS)we{e>!@Jp
z$!oP6Sf=>3bkz}*C*4ah<`xW<f(PRhQ|YSsy_7%mjOMg?M#C7N*(9+SVg0A}TR7{+
zAGRU;s+9MW@Cjl3)m!}4I6Tc~o!ux8!lt!Y`-iZ{VH)Ua`uk?YUl9A8EYxS8&jsyk
zpl$I};$Lz{M+Wsj9syQ}HOyrL^JNe?)@J6jA2v18wRh=QGjRDH=)y5@J9zu?Y#`_M
zXUXR|Izre(N`G)U`(DSsnX#$;e_{G(68hHadfSy8N)@nPI3I(p4r!3p1ziJA92qe%
zMteycVqJONjX3s|!w0+uMV~d--6yf1)zRLS96o0~^*mx>+-#fA<v?pIv*HA6Vn45Y
zuqK|IT_0yQ)yqvDe10^me4>xbcpWC&<aZ6Sv;3vd6?vk0z>4j&h*O&kX8oDige4dJ
z?PQ-(=wh}ZV!{8!=tvpjK*w0&73Ydc$eMH)tU~+4L}klW`Dmt%UcI5rU$A8USJAgP
z{=f@cFQQL-8y?v9z?Qr9?K`&U-GN|RI2P4Ik*;n%6pn?1v2aK)zpcG@x~RP?8e2J!
zsJp$Zo9oL|-`*PTjOo46a8&PV59#e)d-t|>?$y0Jx0QmNDk|>i=nD0=hog5yBf&dR
zT!HWgpNeSfV_|*cC-nLT-_EA{y$>~Q^7_0@joTi%kIO;mYwZX}_?Z*LG;`n&1|r)+
z+oBH!+FL{Aj|L*GAzsO8E)V{BaORvz84F}Akg-6<0vQWrEReB4#sV1&WGs-eK*j<Y
z3uG*iu|UQG84F}Akg-6<0vQWrEReB4#sV1&WGs-eK*j<Y3uG*iu|UQG84F}A@c+#M
zTk7lY*2}j%@G0Hb)zuzs3AA?Vd%7ZetR<{_*K|j^_O!O+DH3dH<@-;)k+5D<QMsma
z?Yf$Zb(MN~Akwi0Pit4MWV~XX&L!*CR#yGThQb{$T+x3oeIqJ2ap~-Y-=ob2fw;lR
zp0Z3}HXpuw<x=?nTvWV8;O~led6^6M08M(oU^Obr??A5MVt$@^YYZ=Wq5zqj=3IXf
zPj{L5Y`g}zDGx3va=I$o;Y)%hj*FU{^27zM9y~Li$BH1mYbk0zyK%YDo~(9f<9#61
z6#AP)MT>s6JqJzt>$tQmU;fu%e<9{{epukrEIQsf@r7@uUu(W`3|Q$ofme%n$?rV$
zW_m;5y2x<>(!~AZUEXi|j=)0#m;7HAc#FUfiJUVx{Af>>9cJTaK*)ZdPU4Y&v}EGq
zUGo1ofgcih96#2S$vtf?i9i+@R@&@3N>l_qA1%Q7X3|CB?GE(S4)_Ctk1qJUCA!oj
z4)m=K_~Q=vR~_&p4)~ur;NNq=PdVU!=YS_2@OK>WUpwG)VXqtc<+mL0bq;uy1HRP(
z-{F8i0^E#;d@B$(;+<2o13m7<-%$R~JK$e-z@K-(Uk1+d7-Bq>VSY;BI|a`DhtuCW
z@cEIT*YU$gPP+L`l$87h9vAo(flmm$Sl}Asn&n9fT>36o;O|O$_?y#Wf#>0emYkll
zGAa`|e#c}cIiB!ET-?}Qv5y}%h1+pCxURh`*v7Aov99jvmxgdO9Ak7xca&Cy_{rPd
z9qtU76cxd)&S(s?Y<I<4ThW7+_CjAE+D5Uy?(p_-=iXQgwMMsfwwk=RbIaXr6;;*i
zO*T<bFuSPvRo~UyX_7_jBSA)(ysmf89$X{Fn<+??x}uGJ(I&ieGyD-0Gw{Y3u0)H1
zeda~vE#b~^q%~OI)zJ~?G}SZtaaoAE9~Cq)GvBs}nzn4;QRm&>v}5z;#`}CtK5yOj
z`<hsahTcxgW}okhw1p#$!Im&zkEVUQdc(cp#&AcVyQM1<_66F2v3Og;U>a<*l(VRW
zERC=(1tYQUZPEI!&Q9~zw)t-Pq9fc9?CvuGrrc>>@+NjfS9^G8Zwzao2!*>Nt(~zw
z6vd_O_HboOpnZ?U5*FvyO{oOaV7T?su*Jqwf!n^$+QROy^g(XEx?LX$2V!AZGS(WT
zXe`nWUj?Gka3r=l(Av(nFx|?oXo|)Hkr;_b+%OMDf_GNd2ik+Z?cgCDF>M`-_5HoE
z@IJxcG}Vk2*~8(e84oa_d1;)b2zGRH(`;2ln0VY0>FVwFc7`4ZbV$e>3Pr+EGq6y%
z5tr2k?KUgMz+iKGS3vUr6s*V{NA|x0^f%c@85hF>EwbT0E=029{T4h69~JmA@F^3|
zoSksMPYc}6|6PIG<@~h+{R%OD*!k=fxLux*z?uK_SOVVd0$*&yV+y@$w|;@!+kMdi
zf5XN{u3InI=q3J^jb0ay;`x-5Y**sh7>7BrzALOp^E+4ItnY0KUL^1u;Jn6`saW7k
zf&aDykyk5xRJ+M}kL6MEor0d_DOdRT6r6t^AydD?e}M#%#|6&(RlFGU0w;UBYX#2j
zuChqX@AV4)I|{x@!B;Ez1qEND;D>~g%)dgxPYaywEVc$_=@|uA?f<&KS$>uN4S};?
zc#k8~1%Y$BYbA(0so?7rJXdUWm|m5?+yUS2fVVi{aR>Yv2mFEq{&NRhZjJ2YfJbbl
z*lucnT<?Hy6}Y{>Z&&Dr2~F$y6nZt@9#ZI4{4)wY%Om?QenVy^DW}A{ZS=DLPT1%r
zF1IMN?2tW^zx9S6PCDTDji;Gr*+HRK?eLI7KSN)IUd8<iy=sS$La*X68@<%`f{k9{
za=*>;bAQ<?6kZ`Zk6o{F1?NXY(61KwtZ_rZRr+dy+wE^C_-%qWXPXq9ALV{JByjGJ
zl?r`}jlM;cb=&Z`!1vkkQGq|D@V`@FoDC~@xq`nTa2cPns3^yJVma4K5cz5aU!~xu
z1<rh!rS!`gf!oKi*A+hMIELR|n#n$1<tex-kD=h|__osl_ba%{r(eNUKEnc+dPzTe
zZoV$3%BNi5cKT-==wDFi)p1OpZ}GSLCGLQ~AaJ%@l~vXJJ}q#z|E&uCy26M3H7d&9
zQutVBFIGXh=;U^JHVWL{u1~?s1aHnhqu}biA5(CZ{uu>dqwvAsK{6A!%Rh#e>7oOE
z)d9~H3u1e`6)L#Of3*X?Nx@Y)w=1|BCxZ&E^8bbdKH-4Bq2Ow}7ZqIP|E>d`yU?<r
z-M@JPx33S21kQF-*N5c}e0&PM8lUY7e>Fa13LiB-2NgbQe7<6%m*eMY8y**daz^1J
z`!p9_w9!jGNgFQtyzRgzSDXjg=c7D<+xHhm3cWgylnb2wqRz`}1<roCTj<2uMg_k|
z!D9-4wx`r<pTb|opAopde?70@YP_9La5dguSMZIBJU>@(l}|SQ&;uuXyXzhBodUPp
z=OKmu6BbMJ`$Y%(69Tu-@2@EI>iB%o0e?&3!}fepw4GFN-pa^z%sUDnmHu4?SLvzH
zV#xNnSMcVnP~i5sS|M=Oi}@Q&jI>(dY&R8Oukcs<g`x0K<8YI}?d^WXf!;50yT7^>
zdR3m7La*Xy1kQHwS}K{}Ne5h>W6J(0bt@O=kITV_^^&+Da7izl*d%bf{Ot<8DrdJs
zuj2BYRPvYYo)PqRdF1&i(~GIh6zOe+zl!HBwj{RmFBG_){~3jz<&@*Y>o)v^FvJ@I
zm+>R%FW7KN|CYenUs6|QwR(xg&@ShCf!pQu37q+C7P4^GukcajkK1r5&!E8V@;_z6
zCH*0R+vS(%(R@y#%0m^=zK&R+8F?&X<t_3l5^fJv;Ak*L6`?>ZKo!k6$E%2R@e7l$
ztEiT*R1pkzn8iUH?BXw3C@TMt9(B})$Z~r<&C3u^-xT`F0<mn6uY|v8WcC+h8nGUX
zEmqzl#xMT=Ol~LJg7K%htaLjv#>Mf9K#AVAwJQslR!yt%!aVKu-x2jcREY(x3a!Hn
z^Q=@sJj?n&wBb^IDTje_e&(@RO(%qc^8ayVnXE70x8i~8+vPta>gTPHlvZx9zf;s-
zJClqqib;024VQAOxm|XyQY|LSi{c!D`%)P`vVG}4*3T|GAj;ds-#BZs70Pz4Qo<iM
SyK(*JAF(JNmV_d=*Z+58v}(x!
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/lps25h.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/lps25h.o
new file mode 100644
index 0000000000000000000000000000000000000000..84fa40873ca2032d205250dd5704f8b79e77b0ca
GIT binary patch
literal 2184
zcmbuAK~EDw6vtm%RKyq%qcnk(1&u-?o3;rGo|YgI5<^I-Crw~!w`r4Yx7i&Og+%mZ
zjEOYSL<vSbSrYGh5JcmFqZd6RpFlqV(f7J<WF5-MA-nI*Z~pV2ncdgr-pIA9;ZO)<
z3&A_s>q!dGcz7>2YN-KDaFnv85Ez3dKz|o3rf}|{hH*18^}SPze1kwv{oq)=aaB+L
zfd13yFUNN0H`aC|P}%XI@*@M4?MbMh?rGOTH5G=XRClH7`tzWo!THz_UOR2ZI%zsP
zz?}|3I+U)aVCiB^>UP?V^)A$r20Ea1cm8vg&OmF*+~2RU9@Vs%4UmQgXeQ0-i<ha@
zCslWM{^Q#HN6V?9tv4?1FN}WVX+*V}ubF$0dhJ%-NQ)j@+<28*yo<W|Pt|T(ci>Dc
zM6t0u2GOpVzcxVGwLEXuwQygxCahxFa!pY~qr=0OwVu)O>ss1z>`dM)l(d}VY9eoG
zLw#k}$rWtO+)Tb8tPIW32K8iLGM*UJ6G^Sdbc=nM#d~{+>j{lU67eKH>4O^8Mg#o%
zU2i;6w{id?_*bt*&`E7gHBhet$>)$NhvPM}pSK_n1^lI>uiw8e*+d{v<TYP_HjJ%-
zb9FH9X0CC+k>e%iafOdFHxxd_d_v(x=F`j{b6jBlllxeQwe}3}bmo1{E_=!Tyq<xx
zb8t2b1#hfW5a825nzlSK?37AaCIzR&<0H3Bd)5@zq-Ezwz<AOUBPDajwz3RHEpf#Z
z=HKCe)Dv96X=lh51u>hopzPevDH}bBFDUp{WPV!V@{B5<W<S*@%UsnzWZsVc&74zs
z&N=x6t6_!tDTTjfPCkBZ`CyZ|^pX4i!d&`D{*}4v(}TX$h`0Kwf7iV`MPbf>?g`hA
zd6~JEZR*0B6QF15wdgaR2fFJ}hvW%;0Q8JgELtTIwEUl3!^yPO;4>pXgKpSv@;Ut8
z{#tFv0ea_#6mVSRLKxurN03u0e{WINonx+kX;zeVSswUB`{V)!@;qq1YNPfOIG0!w
zuV7ncq5N*hF}Z)~W8eVgaVg;Vfdw}dF6RYfSkX{7%5aN?wC*vy<ofdY(SLIF?1*5S
a;WBjsO|C1^2~6tEf6t%hF)8Gz&i@0=2lN*J
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/maxsonar.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/maxsonar.o
new file mode 100644
index 0000000000000000000000000000000000000000..ace87832b6213ab59390f89f620edb562bf7c90f
GIT binary patch
literal 968
zcmbtTO-chX6n^c9RuKGI32q`3Y{7<^0T*>usahA}qUy?pq|=lc=*&nag}TxMco1*k
zwo6aoJv@QFw22LIR{CK0-uLDGhRoC1<$1MI0b><-gC#R6z`G@O=5hyWu!i1qf9BnP
zK(E_9CXL?JExF0_aTK#8Bcogp8FO;ddJy?28KWnnIFUS(6TwNFhON*K+B67BgNd|-
zp5JULod!gm1b%q5oT1E9W39mFSJ|0Yx(R>>)v|EZy<hsqT(Oq7B0TKu+9nD+R^OTl
zNZGW=GbU&R^(i2`R;<t2@H8nT%OVayi^o*50iqNOjEyJxR016`$$$=u0%(+{DbJ)S
z|6kn00&2@ur%*@ppFK3+a^m)pt9<tcFPu0--5Wi?1J&cN`G=URYWn!uX8PaRBKoGk
xjb*RmRp-q#s{2u|Ud^g(cLA`D=+3T=V%?yw;|!R-hHs-&mj9vy-QU2?{|03?MD+jw
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/mem.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/mem.o
new file mode 100644
index 0000000000000000000000000000000000000000..9cba8a75004655ae375b56b722ec7faef5fdaffb
GIT binary patch
literal 7360
zcmd5>Uu;v?8UO6-1`3ps0ENQV+(5bp3MR>D6<1Jh90Hjd0!_?7VwHX4+z{7x9PYg-
zgiOPvNJAPA@yfQBYE4@<5uU0EZH-o~DeERCbrPyn#sd!y%LCfWXaOzOO0(~~_dED-
z<Ga1=VMnshIluG!e&2WgA19~UJNE<w0T3wwzlCy5pa9xhsq7RrsDWxMjdf2e@$0p!
z@;QC#z6mA@#1zPXM)eRVOLq@!Y)OWounUy*x%v5+3i*dN4@Q4K`9OiftOA?Sw&re6
zU~(nEcrvI(-T>Hc1fg&$2$7FMFck>G_BseHeGFjLnGjS*QS)sGq&4){23q74)TcGn
zx6vkFrA=WR+bt{uauZcBMSk!0v`#)4y>gLa#(s`t2k@hn>HrF3=pXCn$@a_n`85>(
zgVCwUJlau=6x%A~pGVC%H$dV3k>KS0_X33%7U#SFnN%imh{k^&g+eJEnk>B;DE#X=
zD3Kn2#%lp0Gs?<Kq(@kyN{c`UYHCAp4C9N{E{0?3;}9!;J^#GEM2qY~99BSV7vim7
z&&LwWwMZ1scI!(Za{5<Vq&Em7wb=g+$T@ul3hIr-Tp*;C*5O#Fu<JUFA&u)8&c%$f
z`cnP{9OpDloveWf&PR0;$CctBUNDgVEP#DXu7K+N9?ZEdfo-7T_+g#Kqlod7jbA@z
zO7k)DcRCD(lh}tM`hC61^^?b#N1xUraRt&F7C|hJF~g0MbIM|^q*TG>Vp^NJrL4I$
zqpaVY!1w{@LwgLikFJO6Q%^%=6k{mjym<8~9@1{bdFaJ>b@WF*qO0JQC~DjaNxqh8
zr9TAV@{AJPO#a4Rf`afBz<DX+n!7?d_ESfnIL6Kx{RI8KgScoToZ89vkFjk6+djsR
zj(7s`-ynA8HLav6@bcfVPq(m7GwAOO_BGFa`?JJ(1LJVoF+S0L6WhnIUu`(&PCPX4
z?`jd8n~^#QF4dR2{?o)mUjTuZX`Z9F1~l|hi+eHu<$R3dcm`vmahp+|a@GOO`I(S5
zWk_pb_9#qIf5dtqtskH^&Aa%}o}s;>CfXu-94mD|E8)8SqPXbob<;}x`h(HmIs2LR
z3hjwC$iEka0<BkPzbJ6&v;x~{udK!O_A^`qD>1IpMkqanSOl>U?r-XM99E|Pf_wYQ
zNo&rkg2H=2Z7K@d)F}w21Gvv`t;ly%e~QXlXH5#5bGTRHop9`S5Mrf`G%i4UJd(%r
zpop;qE@%;D8VVb54-DU^n+slm2%QV}k3=!%Has8x_{jM{{Y8yJwA$Ub|G+V!aUfmM
zwt?Ho->fud;(WWi6iRfi(Rq~UZHuTuc;1c6(LP^=Z9?-;=u7AtV@jbO=Z?<PV6*FA
z#d@MwiQHYPmBd*l=I5b5K1Xpq7VhDg*Wo<P09+P6gnqEb)y(61pxEr!pp<ym9S@<6
zHt;>eO!cRdx}C}ms{MK@WAweK8YhN~q)nw~`nITg(jL|`T<+^Lv6LBJg0_^x;ceMm
z-*CpTwpnI!Th_>ilY|fGgMAsp+->x4eaRjfGSs@ADr44>)T=Ityg_q+e}~Jp)E(-+
z*2D3x?s!LQ*Y3{t?j8WsIGVC-(}}NrQ18X~NFMgJ?{o6p@qI>?1=O88)kX&ez(8V_
z4PcmN+n{|2EIT(87a(#>!!i*5zfG(EOJt{g+7%x>?}Pj4EcW61>A>E$winfgy<G>@
zST2`I4(KUdPdQVy2Mo1!>yVl2$F-%ln#qBbjf-p8G}K7Ad24fHQzYEftTyOob}N<|
zH*F$3+@w-VQ)4sjrvH#=4Ts>1`AQT89}1O{0+mNeK_zcm<NynGX#EEzeKB5jjIUs!
zEu2%P0KRZM$?e`kyajoruQC5E&S}*XUgUa6>WTt*+IW(yzYsr&ynw_P@h2R-EGl~L
z>MR@|++wIx#s&W@<Dy06?=UX>saU6U5kI8U;MAz>re8C@$%B8yxY+L#+<ukuYg`w8
zK4<&}<3j%?<3+~v%ea7<0`BaW5pWK7sDR%`Qb5ATB_jny6lKsI&xQCC7+65!t7Q|6
zN1VE4(A8OpuXA+Dct_a;b)-%*?&>VW8yuZ7{;1A!N!2a3AYZI~xv|R!f7J&!eDLEw
z_>X+>U-;m^^uebPufZ9(!&^Y*PJGPx3SP*Iu}<l)K03FUukzL&aOv=OAO2U&A7_4y
z`E-%tjaq+#Z&bYPVuocK=3c|@Nu4yjaJQlNL4BVWK4jvl>s*Sum4>cd4_^Cvrpv5&
zztT17_;9Sc>85l{%UHW<=FGO-@SqJtdNPgegT3Z{x{9qwZgdXAv_QV6A!U7cFl9r|
z>KU<|OBsXeu~8^G+~04Qk2b`xk@1It;j;qb@l5WhYmOIvJU*nGdbV8O+qpm5+8N)!
zXHQRiEFNo(cDBbMnH#in8RNjPjTe*&#*mpBwEH1x+Cvl(xq4;T7&gEf!7<Jr(o;6Z
zW!es-+ejLz*Np>ChohNXGEJkB92#+2dyK(8PZJFyQF7);xATlKOn#|=ZdrzD@4@#L
z5uDLDLEhU;L$?j|X{VAN)BVSVF)a<TK33wo5oasmhv^H`lO8<bpa82qcpu|l{&^q%
zgb)59;}nm4s!dDyvs|X^6D~)P-yq>vxlD1&I^sNEkGQxCh<b<l-f_4m>B!@=4DBfq
zzkI3zsEm{TW|!i8*Gu?w5>DqLCDJM1mH=BAr}30=Iu|LC{ua0Bd{0aGRtf)<aT*6X
z&YM2`dlDX&bnvm@B(L8F377qz@xf;${1JWbB<ag|-Uq)X;j&+G-Y%F&=6lzz%9HBl
z*E8<rw@7?iS7M*+koYp*>EUbcFv0;3U*KmMr*UXvE@c-a9qx+LdXaJOI(c8x=c2>E
zDd|w0nu7uqJ@^FUvyzU?zwN;V{|@8c_~$(O8tZ@M!SjrZC$8APf*<00P2hsRjB&5u
zEsT5Tw^7pJ5FF1tB>uNVESTfpnVdv^Wqdc|<hN1ccSt(xB)n6?X*@sRwgVDQTcpT%
zjB)ZS>l~JFS?Bu_F6#_2PH}#RwJCdxaqsv{NILTPyf5+P^>EpPPqU8?BpsRmp$8ZI
zPZ;;k<EIi|j)ycU(VwXKXmRS|?I>_jU+c7%`5M<{9V*{oT;-f}2rqKILBc5>5mSqV
z6aO~XsZ2@e`03BNw1;;Y@r5=u`RPO08p+yvFXp!C<^!T+8W}xo8z*cC_vy9{;a<yv
zu$iL@(VN08q6*<;GV3;zk;6c9B!}^#qGymtIKG&|^oYWDi3>Q7riV~6m(3dZru!cx
z6*X`Oq+gh>sODxc%j<%x3w|@K#|9cdO%OOQe#0$H^G{l;k{>ZoYnk_L#^p1Yn(En(
zY~<vv(;ZEkUi${NPdp)8m;DQr?f}wk769kM-unj&5x<B-Lq3(|y+INU{F7Ah38Un#
zcOXXg-uN5Yew>V?<h4JDZI$e&*<O`wspz#ofLNvZn|RVSr1&V&{E@A&7xR}ztdjpC
z`xo{|bCR$Z^#LqY@_(ECCzwe7=~uF_7yf^USS9}rOzdELkqLWIAHhN;{~h>;b4m&4
z+wDKS?}WYZe-1J7-^e_X4KeYE05~TuB{}!59csVE_TpZr^YvN$c>O<)n0M_U1Xp?8
bukwfszr>+L|3R!|f06tDQ-@Xl^4k9!{6n#j
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/mpu6500.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/mpu6500.o
new file mode 100644
index 0000000000000000000000000000000000000000..e97f1ad101477d6356eb3340cf0f61bdeae04009
GIT binary patch
literal 16840
zcmeI4eT*Ds9mk*cT3+Psq(G%qS!mHx>9Kbdq$qLQyIy;GZ8vu%eKC=p?#<mT-P>Je
z_u8H%u!_baQ5U1Z2*RbQ5&qGOLGT6Pki<wL;UL(UsL7&5L6jVC35^u|Ju}~DZuUDf
zd(@VfKX{sUW<I~~@Ao{<Z=QMPnVm^*THD(_cg`GT${h88nmIC5sePZF*-yE<DRr_s
zNo#8tDs|fum0I<vQkO3|t=hL#Rr^x&)ZwK{t?EpvRg*2(9y~wM@<;tQA+~16itItH
z_CMZsHBX%ptRuLu>pR-x<J~^4pW`2G``LfC_#fD3#_l^Y{yxa>@y+l1J)eC2z1PR@
z_k6wA?bG+S3*`QGs6{RRyWE=+^HPWBo>=X>AeCArx52ac{Jq!hovnUu@9{nk*RRgf
z^QQS5wl}T^-gxV+g+{Bluha3Xbj<PoP4?&L_z)c*@BSa}c-%jZf3$Yi&vtyQ^}W;n
zv$g+d?Z?{Q#JjwH<^COO``>N<+3K6Ee@FH{eD9GKb(_q^-&Kp%nMd|Ma?km7b$xx|
z-HWuZ@S2imlZ-r@n7Z`5ZRVKS;vcKs)M@H_w~x8~M|;feW&f1q{6ZP?NA^B+?=vlP
zm+N!!$|>q_S-3tY^_B(8UpXap_{iSh-lOxLpz9-eE_9A&v(MI^D7)05)Vj{js}jrB
zZM-J2xme6+hpk*8F<5jGm0>%vdPT`84(9T*=VXU-6+2rQb?n5dwvH7Y$@W!k?H!3_
zmNT+K_L3K0ta)2|LR;FC9Wtt#6<I&1dFrLNqBJd$Pufbg$e*avB9XY9;sRYuV>w+8
z=Suw4Ngl^WwY!JmI4gzE3B)%MKMijD%{B$zDqCHQUhlW4`Fhh(*2~eE0o5{CH-jf}
zY~l}qr-<JGo+f@Pcm~|`@CV=}a1;N2@G7{`KLuU`H~MG6$H9&Mb?^yrqhBZq(fyqy
z-T^)ZZsKeLuM-~vpC*12xJjvrb31seY;`g1nE+3K8~tP8Nz(rfJVpBdf~QG;)?BZ@
z8Pcx+FOhx&c$Ih#yhd@p4n9u&4)6(z^Aqq%(mw(|MfyL3*Gc~x_%!KT<q~zrv)FYp
z`TQh!E4ayjH+X{d7I>2MH-M)|e>-@Z^gjd7kp6M-66v1@uabVgbVT>7M*0iD$4P%R
z_yp;<flrct6nu*G-vO_a{-@y6q(2C5rb;<<%MoyWesnSUKUbzC-LC|=(O(XpB>lDE
zDbn8po+kYP@C@l61}~BRAb6GZ{{gR&e*Otw`^QQDQSb@UuLPeY{pZ1_NIwK#C;iRf
z)1<!>+zfn^&!2<00+{?i4W0lu`d7e{q(ALMufHkMe*!#B`p<%ANWTTVMEVkVmGrlO
z*N7hgAE!7Ef=`hCY4AzXzXm=<`g0^vdVJPNp9G&K{pY~Vt=8mu5WH2!kuGpkUja{m
z8~vT&N#ef%PZ56tJWc$0@C@-c!Ary!ob2_tN_-i3jri5z<HY;GCx~AMJ_+vU0ep(|
zcYxPPe;@cX=^qDIGJb=3{s(v~xOCsMf5_`^g7g=HCrO_IPm%tM;Azs|2%aJRUEn3s
z{}Q}P`lrEbq<;x~ob;#50#uLN3DPeCpCtX2;8Uc(2D}cQK;9hTt=JE4z6`yR>q!@r
z=R3h$!OeMp06anZgWyThzXqNn{o+%-{-#Oa37#Rn1+M2CT}*p!0<V((hu}5R{~COp
z^iP0K5Pt!DlKA}7y!KBKUjkky-UB{Od=T6u-sJyg@KylR-|vAZi2oQ|&vU{2JOrKs
z$3`6lPm}&d@C@-2<UvS}&l2&);8o(6g4c+5f{zp50zN@}C-@{dHfkUE6!9N{*NHz0
zK25w1E-zu-V&WeGZzaCy3@;A};-3Of65kA-B7Qx1n)tWCGvMaD-veGE{o~+O(!UH|
zBmL<z3Fz}UPWt8G6U4i~CyDO>pCW!Ecpcp2b3gbr>3;{VWM0(8=wAkJ1vh#4*oTpS
z(ys?klHLK=_km#iec)-*-vyo_{cpfar2h+emH4aRHRAK-*Bm$h#LoktAbu(MB=OIH
zPl21f^@G<*e;xQV>Awc9WS-W=<ar#t72L#s5IjNpKY=Gn{~~yb^z#;Yc}SCfF?fdb
zE5S>o?+34v-T|+X{x<M&(ocX-kp2nqNz%UvK1KRd<xQ48zje|t2cIVWdT=H8nPC10
z!CS#i{=W*IApL&uB<b%5PZ56%JWX-_3Z5Z84PK%+EoXcEt%4`KZm4s?$H6}Wei8U2
z#lI4KisD}bUMIZ+K27>>fGfF=>0-w7e(+Xslh0p)Cx|}<o+SP+@D%a6=U_Y&Uj&{Z
z-T_`Bz7f1i+y<`^{}T8(xase=!6%5{4L(WyKJY2xPlDIMP2T<qK27>J!Ij)UbxC>~
zb@oCpKS^*CX9ai)+_b+3JWcu>c!u=f1TT?(KX{e&4}jN5{|E4K(yNiu=oObIlWkeG
zbdNb$XIEBdvv%HgtV*s}*xHsaX05!H&sk-)bU@|GJ%wCF^>lRZQ3Lj_)dK^L@pKIc
z*>C3uH{0ckv8~-@<wvcG&0K2h6KrJtjfY}gyQgA11uNg}SR;1-SRosb#@fWMt2f=f
zp*RqX%t%z-qxpQlbkANl<`ny^!jRoFU@Bm9SGw1jq?uvQfKf-=%3T#F&9}wy?aZZq
z_e4YmiZ&RJs485KkimF_DwoE(9w9?8E3TqR)?E9#=(NrF2J+@YeVPoD+Pc<<Pb48x
zZMH{B-96o#))uTCdD}mS(v294_-xguBibp>BwpL%z2Z#bwLRV|&Lm!LKB8L~XA-ae
zytT{jh<1y$8Nc=>eo;2#mu%t}WfQ**qxnj1gH@IbJbc>XjpDh*%2m3Hj=BE(?Lt|O
zLZ|-i$V~e$YtsHGoAK+jt${6$ycXQ-ScP&<PnqF{xLKcFsdM6{qf_SGo&6=dVIaqu
zOiT1sY?sUC(vhL>R!i8Z`|P2d&OFPR8+}Zt2pjd5qBF2&Os4zYR*7qfviW{GlQeC+
zy>L?;H25A;(>kX(TG})?ShoH9jp@CvEW&KOyR3@UYZrzp!`#ZS#rUkGjGC&L`+82P
z?+|O)G+HT*R&)YQv;1I`a6cAtU*A)ZlkAL^DkSh7;{<+$Q0jfxkj3}$#%h<Hx5i8l
ze6I+b=U1^;_7uYXPFv-2Wmrz}&~Sgns*L(0+^?;t+*K?DQ`K86S5`Yaaush4W18SQ
zY_zgF8D16zJECBF6igEI(;6JKl7mPt4fA=IliTI@CFsy#2zvBdm27bQ`k@*OA&<_y
zZ3Qp?Mz;p5_;%~H*Nnv8W#>%>rIAgnA>Z&oZ1g6(Zg)rLnz51$12XCC#F)g(okYDW
zDeM<-)b$l2u9h(Ll--VP4_f(rxDN4PW3D4Bi)Qz_StF}xES9}M8;a344+#@#^1Qa&
zPBGH#4V_ps8ZS$xHKT)rwzFxM?F{CNyQ8}?o6L(QC&RnABZI_QJzqWF>O16Eq;H(n
z^9@Z4fy_tQynIDjX3`a9)k}oNY(=U3enuJnj)aU}qpk>y36HD_5O>js2eTNwHHL4C
z;oAdTFO_w4`MxPY`-(E_%CaT`1uHYMU`2)nD`{M`(LJuwsBhkZS{sdBWZk;a9`Z8Q
zW$TZ$X4XzJNVcYn<yhmkW}e%cd2Vm!xxJ~Uf7x<t<+^oOJdtYvKLx|qKykNwe+^$R
zvx_7nZXGcJVr_kP*?WjBXNx5}ZOts3TnmP0aYRml6S4+ISI{PHY4j`Zmf5JlYlm4i
z635K8UP@)ib{0qV@~6wrI`)WN@F!f!@!Qr)+~CM*9`$W1bz37JRwJlr{TW5CCBo;s
zsd;x!76<+59&&Tfm#)oRUoP+?HBj&I%3pT5N+Xcg_2+H7MB&{*9LA#FV(qj$$Fli|
ze#Du?OOKtnr@UC3_<0Xf#Zf2g&uG%L2#S`;sJMRAE@XqNR^6-+7ro5jg@GMoTiuZv
z(f=mq8Sib)y(7&t-rJjdN1A86-5)vP8?Jw`AnS~;`%?#5^-1?S9c7*Ib${@P^^LNM
zuO6%J<s2A!n$Zo!Ab+&#OFb;>vUlaOc2AcHrhlsJEEWoK-w534f<ItN9Cngc$wDLD
z+Z(@bi7|SfT^rKjEJ(yK7rj6+T^?FCczk6HzbuA##PIeQo(%Co&!cS8tPl?OOD8py
z1b2QBY|f2{HrOLYXKamC@SoazD782hdLq~711^C_Xzyv&ixj{CvHsP?)EZQWc-kor
zp@NW2S}r4LFgG;nJ$y<_8)9nTCK~TldlA}=qn9UwL1jmjvIDOv{LKRSPSw1N(9rCk
zP29Z4IEVORL}G5f%i;Kk@VySle*=7x#2@opr&IzJYkq5h@5B4B^MpSc;O0FX*LwhZ
zZs&dAI{s6EIQn}JU3C0I-md%aCE!~BY=E2hI+{Np;O6~}<}U=eYAcV8RIDActvKFx
z*z7s-8%bNm-cwO+1M&!@+IGlKcx~C@h`U}12KoQ@6XGgOQb@ZWD22TP=%+ErX9^AF
zJUP;1CDlNc`u)`&sOsQSbbP&Q#*cYF`f+f4CMri>IYjjuj&SBsT_SrrCi_1JfB7t-
zp_uv&Y?mD!)4aDc-1vXN0BlYD!7V;9Zcwh5?@@I5zPumQMSljRhnT6~^k07-!fh9%
g>KEyMm3l_r&jpLA*D&3`DF5~Ne;2MYLTuUpf8P~HaR2}S
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/msp.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/msp.o
new file mode 100644
index 0000000000000000000000000000000000000000..3ce7c11f25817eb1eff2911028d1daaf7d34bc70
GIT binary patch
literal 3320
zcmbuAU1$_n6vxl*Y;;|s#&o4YB~C(YqnIHHDvnq(NsK{BHQj8%QgC;6c48Lyb7oeO
zie#&O(3V0{g-Y9pq{)K`eJIvap%jf4TIfTIP!Vh)NgsvMZfvWxc6-k5y~#MqmO^hb
zd+z<+Gv|NKxwEswT|EcgE*J3Og3n-S#VNp`Z)vU+rwaIB4R|UQ`6mIUb6b>mzz?Ha
zmAVICyCA4mDe~F<P%VPzaDxkWskqnSftR!z7}do3x9a`M-Zl^(V64OAg+lPA5V{MH
z3y|F^3g0hYH6Xjr!(+~$oc>~J+ZL#PBEaa45y&j`xuzCSKkS8|t45LADj}ozAUL%O
zf^Aih5!aygLuRG|f&wT*XD2TND*PZ1gZtzR?zz2+9Qp+^?dx!kwcPT-?r#c(cW;1r
zQb3)VjS!4fqtC~#On3tX&tvS+C08c57VV@fGq)asZ%kge^X2OC{D+u-!`t`sles_h
z6S?;T6S>a~y%t6zN3aGl7nl_)rlSTt((-WqDr(HQa)EFF<j9-KW3}2nbQa(m`4Cs2
z?e6d<kQe&er=Fa?eTC|8^FU@6d)wy4e6eR?)YE++haG+*arbhr5MQ;Nj}fn4&U3`q
zE$8@rjQH^qJc?WgFq(5Kk0WkH#>e6k?a`Vzt*M4@3x#LN-?{f2^3V^i;@O<TbGiNe
zm=U=OgVZyZSn8K%!1WW@t2xXiyl1Ib^?wwKy&}$g^=TQM`^Yi=o!ckI^YiDttrL|$
z<~5kj+jSy&JQqBh9@MIHqt@{yty>EvE#h43J&ft$HNn&MUL?J>xj+tUy7|?ZG5-mS
z&Q0KRFM(`fZDFiw_F}0&bLS2;xknmmOZEDvhwEXe&Rbs#c-37WKMr`Qo8U~i7S3$L
z++L?==I~N(^FLE={%PVoH`CFFd7)wlKab0}hvxz>_VtPZJ(JZ<OB_&5F_t`~#$!=2
zZRlzu64%9TQT+Fn^^3*~U9)1TWYMd9JTvwh#aeuOl+)D=O>9KXx);!UyAJ}orpHd{
z(Z$44h8RnvjZ|7U;zMG8%1Ee|h5HoHC>25?i}z)dW;UHp84jO)rDVE0JNJo=-A7&)
zgQ-+p8&G3OiYZzHy4c=?GW{{^LA#+1#4M~cYv`gZwKlajx5!dUtJtU-i6)#iZ{JQ_
zY7uFtrMY!C_4eNeeh0t<zZO>V5mtQj0tooG(hx9`bF3}`Qh9n%Z``){LEE+f6}DAr
zy0vJQbHW0wDmmFc>v3L<@xzQ&GP{HEG+Q5FrO?ZwiZQ!6T81Al!~4r{NSJ9!gN8wx
zbfyyNtfhAvnv_-zOKOIODDgwdm_@eNNNKuhb_`iMgt~i<cC`0|jvhSN*A)x}+dF!?
zLZGFRW-6}tW-WYH4A9d?ENS(FsVB|;tchQPJ>9z1m5u90p!XH3=OH_SXV8|;gebrx
z8|OVLZn%q|u+ib~VO&POw&YU$tYmyM@^v;|#W>d;V|)HGacUUny4-(DnfQ&i`1bsF
z+BntQ%XFI=cjmu~ajwh#_cHFRYs41cu6xPGNw<;dUS`~>`vK!zm-~+~?$rIu7T>PR
zzmmMq_n5ASKi`h?@-ohKxql_&PTl=BzMjP<bD43{wdeDJjZ+^6**#;7JNs~jah?zN
z|A=vCJ|LMx2}_NjwTzM-;4?#ytCFP;S|CMLO9d%nnjje|T9A8-v=<~Tl}PAGi>39y
zjffGj1<T$<3NjkkSRJL+@^{T<+@QCo!X21B#=flIv2&*->3G?G4YSWN?vR0pPQd&r
zhJEbB1;uo_|JVCl@Lr19ikE#nVgdiQL!9&cc^(Qfnm6NRAHTDolvnK#=lnjqWi5Kj
z^BDWd$T3IKrQaT|&-=FqnX`5ZbdUYCoS}tna9xfz;AExy8%Yeup^{nrbl(3DO0p)+
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ow_common.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ow_common.o
new file mode 100644
index 0000000000000000000000000000000000000000..be79548e23f262991b48257d0b92e1ae00d75998
GIT binary patch
literal 2216
zcmbW1%}*0i5Wr`<exnfqjS&;y0SzRuX&W)Ar}7~m2?C)Q5;cLPeYKlxySQCb2qtnc
z@d^nCZ*cG+#=AE|{2%n}(SrvKXQDH2=e3(<8xx1{X6E<i<9&5sJ(!tD83t%E;1jew
zO#yzKZrOQd=Ai>FkkxZbm|yk(=uPMX{2vFSWAD&-?f@(TY%Ls`%ik#WU-QSCpAU{r
z*f}Z~2i*YME2(@=7%<#}_HGJxzMDNCu+Fa50&B0NAa_(4IXK?@@}BzWwUEZxZGe1^
z`=bl6rp7kI<k;AK(LXu+NGy7uTddelO_V)f1QjVphSq$q?6_$8#flTiV(`M3B4=fX
zvgu6D%49{q?N^7;N)HSWw=#leGU@Dan|_Sx%um7ZKS@z$;*9{9_?ILmR*K6d1y0^<
zC-PLJzRtYOoaRY{8UgO2rua1bnvbGyMEdGZ(<)9^<s?=nL>?8hF#aT;!FeMRFF2l*
z31=f-Xg)@z*B+fLwc&0XUPs=Ao#(m8IO{FcN%h~f;d{ub&OU0Ai=hJW8p}nmTJ>sH
z5&G7lV%JKpd?>4vGAKyjvE5m}1($q$bS-y5+9h!6(={i6z7kYrbxNiC<Fbr}v4m4A
zduWAuUPC2#jWN|wrFo4)(XLUd=Wi^?XHGqk{#=9WU}_k<DC>b<vC=p2f-gtNAlt;F
z=R)^JLi|c-s_`k?-N>V_V}<#(7_UU)JJ=>g_eOFR<D*=!wih{mN1F1IE#ml1Y07K1
z;(hm-$JhC;P5e3L^hr&zO-i4M=4qb0&RTOF2UdNf8rZ9-13%OiZTZr*tw62^V3q8^
z25Yrm2TM`%$+BFpXuDw1(~>oP7~JcBl)xn15}b)8=h^=l<IR0A??p}boM&IFG+(};
z;wW@}Wa@L&=W~a7{EPP!d6ICs=F}isRI^=vJU;H<!(3wV{9njOgc@6eUcV+8G?Ml|
z&!4&}4x~InI$!U90vYw!?*>gJoxIQ|8n9-patM(heUBUlYaH0gljm`Qe%JB-#N&IX
c8e0tG_pkd?3<>@Alk(s4{^wLwYl!Fn1p%SG_W%F@
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ow_syslink.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ow_syslink.o
new file mode 100644
index 0000000000000000000000000000000000000000..30460c75456711b5dce4abc6e960daac2c45e3e2
GIT binary patch
literal 5944
zcmbtXU2GKB6+S!T0s%z9Yx84hJOqdcfvta_Vh~DaZEQ*~g?P6KDr$GvyW@JZfA;Jc
zjEw3fwNjMyfd#AKp$ZiBfwlTjsi2Z3Z3$5;)aHRkYM=VEwrSH!s7h;t<tC1M&dizh
zW!PySdSUn8`^~xEIp@3Q-W`v0bahHTA2`hiKY_)Wg96;FTO4cFP=n?01k4ZLEX~VM
zd~iZ4?b!siYw`07$v05`_T`4@kgqf|1w}u=`Md;0TsC&~N$tXf>>qzP1!`eAuKN&F
z!pm~qIQ3?&HU|T*bko>(M!V?XjWzJk34n0)s-}Vjd!|Fd(t{IirTO7I*KWy?-($?@
zan1S3DNWrB<O_L_1EA3DwjH?&svB!m<loU}e)#8BKGQ3}THk}~eNgy7!4L6KE<Kow
zwi@QH09=<5m+(V2^qlgH-nMg<Fn+`@L@}qH9-D7^g*G=oeES;O);;16wIXgGVEhGm
z;fpI_AnC(=k&ie<KaE#FB~Hr0;WE+2w+xC>P2mGaGmN?0y|#e4yVp9o+wuI&%Aew<
z{iB%T$o;?%a}Q(~k49}>@p(7Y6uJuw3vV=T0%Jyo9Z}jJNmH*#pt}7=d+c=>+YU>6
zKk4wEwRhG0lkYmLC8{fm;UvW%`^G7*Tg<f?V^A;#%w7FD#)0<6S=8)*`nKxE_WkY>
zD3;~=ami=zAI0DJi99f~^m4;L78ceme9QOSa>Q4hANG~z+o3oelCbXN(n7>%)h*=?
zOCe14hezc6WF%<SUqRx0aqh=BAI5z}_zdi>N1Gd%%j_1ITZiLW9AkcUlOsWOLS8qX
zUjl2&!$I}KQ$cld1-$jwd{8aR@YY{)LG@lLs7`$Y@pw=b`5U1%m46ay|Bks&$ZN;T
zvVR9)EmCZgIG(`#eDe!oT0{Kwtc-Cv>-s)j2+wY@<DDN4mZn2(m}7ehb1%}_qP!?S
zT5q2%82dG9W7o^uR=u?0UPW&C258?}_d{)uB&`TzPy1Jo&*(mwjmxE3SstHD)s)sF
z-v+!lC>GjNC2sp4k?K<QGN{rL2=DtW6zfqt^7CEEf7pk6{bvIPH0*cE5I(yK*3==#
zX7C@rSPMgc{B+?BKjs{*f$;5bY8UZ&u`KO*oqViEJMjzw`y;KKyI?lnUYbiCz%%tr
zt1espFmwkwr?9rK%6P7jYXtcx<c4vL>g*(}xq%<zzx-5d>IUvX{yC_<_V0yoE5<#A
z8qwZQuvWHSKdq`4)jDZLI+11%Q76)iYUBad2x<0J)YH-H3ZH=ysUbCk^?w`nszYDL
z<wEzz&%)f>YoSQ~4#@t)Z5aEz((czUCt#o~ZyZmfcB9CJ>x!@J*De&$mh>BKfg$2Q
zyGm1|sPX1HSaS~Z|M*#LZUe?gwJK^@<`~NIhAJBV%F^)1$UF8jtjXi&Ci8z^;O|F%
z<Tmg}Cmh+*ni^vbzl0i+UlntjMEz)7#{TF_`;_)fLTMV>c3d%&89g^>29^U5-kBTB
zCX{UnXC8{jvdW3h;GwRL179N$8`*_)BN<EE6v*<}e`oy>J+p6HLOH0L$!u@#5vGIf
z?faDN2fzFkC7jEp<9)GYR_V<dirJ?t!Cn1Et~Z&+krD4pntI$EG;~D`wCrkWYE}cy
zEz0(ok=cc#re~fZJkYGrljf$DJywwa<qOXt;7{Q~H50k&FE@aU|Ee_^nW{AzFDiFi
zWdV=lRQyoIFTE~E0)EG`1F(4>_xrTPvWP2e|9Qrp`7*}$GrpbYqzkp@@#Dk1nyeWf
z9_~*tev9W04^3rQ!suexi^J86)5<90ftw!qs~-4k9{8Ic_;nBbJrDdhh}WVLcd@6I
zwmYDglxlhX$pinF2VR4MSL0DU@Lh;gJQ{D*D97_0<98V+9jSFNeoV6G=j{%TGG1nU
z6R&#_`)cvT+1@Gj?QH)t<4s)BPF#>X70I8@r<2)KAP!p-uyqKbkd1_mST^6Q8;IZ?
z)Hc`)r(#L7GiP+`{pr()9*CK-L-`kD>0|=Zxp>O9LPJ`#2tY6t>gWzbM$g3iPXqf4
z>Dk1wSUjbhaHJ&+LoW>KgL+8M#QOVkh8~Wkbch`6I@%WOiX83i40VJf;b2==M+D-z
zY(AIPj}4l55gDNO8_BHMi{Tu~CQXOk8rz%)^(@|i@peOxnL7JnjADSHic{O<$e^hY
zh0K_lj8o>hOeUAL=qkc=>+z(1Qpcxs=VHfqCXT{--mI+RNw*$LAoh}hmm}}%R_^_{
zFN?PTfOEd<UHDG6--x)l?*|0jzME{IOTg(z)M>|gKs@*!R%r<Vr@PE)=XgMIinrl+
z1RUS-Ds7BM6u)SHiE$P2wH0fC@9~)8!QcK$`-6aQsGtD%1-wDPKjN`l&l$$udagu&
z)X48fduV;HX54MRUa;RJ*zXi@QMbK}H(>uc!M=-ecbrki-F_1u_$cGVFUEh)!~PQE
zl&@GPS3K-*G4AFsGwzQ6o(Ini<K$P=XEonvYY`Xge?8-F9d<JA-me7X?s)n<c!mTX
zF`iMz-SLch@LUskME&0va8c*G9{isO_KiZFEaO)g%8Sks{{3LJl>#oFJN&!AYNVTJ
zkADYP&3*1RF;04l=dMZMC!RigIqY`vJNSN=y~g&M%ih6<7<b2WhH-a1mjqm4Zt8yM
z!E;@(7xQ{wz@HL$?lDd}i+cV|z)1(^UcS$`JN}Otcl3AcXBc<qwU>+DUAOxgch|qh
zIPr-0f0uxZ^&Dp0UC#v%{vQZDV%=WzuzyFe7wf-<#KJ~#iab%q-T5XMcjwzL@QC@I
z5pXfzQO4c*zT?4vSKtxjyzgP}yfRZ>V!loMD(%h}0{PP!GuDH>Y1n<AGcxpaEP$^V
zCIk}r0tJDdd>#TujwWQ@9M}tiIKFo1S<_bY|NmBy0z-Gws1RyA>UaG~AZkt~lrwF)
zh99w=TWQbAOYNRI^0UmIR_?8*8Rz4`PXT`9^6NYx4zcaT32}O@zatv6tq3*agg9G7
z5XX-HS6#RhzY~Xs&uQG`vikz(eZqx1>%^X~`bR7;@p|W8B)_D+<KMaWpFqr=I}xp3
fLEiv|<H(*`vGUOBsK%?U@8d&sNHoT=iw^z+3#xGx
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/param.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/param.o
new file mode 100644
index 0000000000000000000000000000000000000000..30cf4e65bb813b56e70a9cfd252cf9a569b13ed3
GIT binary patch
literal 13920
zcmeHOdu&u!djIZRV+=Tnu?-k-@Evedpx_u2W6zfD+_8BCiEJEul9EkS&oCa=j-Sko
zSvycNuvClcT@`PfRa7D|=F!GzBSj6#LQ5KF8&+t$mC!cbq*A1g6S|F-R3%GRVH%A4
z`_4Vb94@{|AAeQiNS<@<?|kQbpYNPIwx8R)eT&a9NHv3gOt+pCN)%atYix_5O@%a%
zCinjJ*rZ9rxz4<?B}7M_H0{9Rd#M&Yj(l{@_^WFz##rp}7k<+Mno>&tVmaBl-#+CV
zTR`b%3*(*nl>0npjxEA7k?-&6M&t9e&pcW|v^%ojx9XKS6dq`%;XTjL@E6HhV@ttz
zFL*5`D&3f8=OVMH?)7|{KMLOG4LXxG%TGhSkq=EeJ%Mp#KMnJ9B;U?q$q-=;KO3bq
z-@ng(K5H&KJ+jlGi5A=EA`9tUkQQ`)-=y$_S$6s$_%aQziGqjKo~rkQPvlt&(2Zc7
zCHYP4x1aYH(6FCqDA-P)KAcZsC9@nf?@diDQo1pp&rMp*eAtFdm<z(*wLS{(#GF5m
z9y85!b6dh5v?I*(#L-3?5By0U&1bt}biMB6Mk)@#XBA{zA<!68Q{h3AYQIQs9?OT1
zeoDa5L+>LOY#-~zei*LA8WT487PG%;<XTH;%mVh?ry9mSk2Q|jCIxbxo5m*h{`BQ>
zv-Ov}{=*_cJ3L`76@K^`^aUN_v3V@7j|MN}xxzC4iGP@$$PVyYexBU>HzGeO3TQXy
z!qhPuv}aTJ8tnfBK91Z&4^`yRZa>CKU(OHKcL8|4?qj{}+!-086Y$9eI@El*BHcWS
zyvQVI__b#!z;QZNLxayzUT3WO(2^59h!5<`nx#T#wvTO{+<QUTRZ&R055Q+1fmbQy
zj6e>{Z2+GGAJTBThlXE(%<q8b^We|C4nQ8uN$+v;C2KAayp{jbzovjL!^v|x@)~$Y
z!H;=!u7Cdf#&FhLB-TcdbDZn1!2UMQQN&*9<IBUEJm1j29<v931v?DHsRTS4uKw{q
ze%GSm*+}TO$monB7t;4qI0=29^ZBmW28Gk@$@&$@7n%xg_{_{dZB5PI@L7BEx}xEH
zVc#yNL(Lhi3xW4>*lH9wwz3^6CzQ{WJ)>A>72VRilJ~$2djC$B9bmm#X9EA*^`_1U
z^v)vZl}@bp0qAW)Z$s+s_t4uf^&W-J$Sn~crL)ra4d`j+rJLF3oCkmR17qL<^5X4;
zL;tq34^R84WJv8}qDAuvwSmg1xMF~IkME>F0csGhcXE+NI4%=-&L9uofbaA?8wF3$
z4Xp>yB*s~@M8w&tM<u5-&vH!F8mF!(y?OuLru(LJ^91sQ^JX0R!}_x<)|>V5!&h(b
z`3hUgZnxzy@@z(1px6J{7Sz^%z}{E;R@In;mQ!0^n`!O=XYOBQ&6wPKR@4U@`JvZ$
z&b5Wum%l^|`(rfBwS(ix=M4K`0(+0w@Hmri2Plsc8SDYBCF9(q-b9KiJUZ77jNY88
zjr7uR>?0cXVT}*_#wfMxx#l*M9$fMq(G{)*tyuf-ehPmZv}%9eK)vPhOC?Us&il%T
zP`iLR=gg?DWC(T-F-@QpdO)A++I+OcK9{Yd9LsuTF@<?A{3p&6oQ2JEpa+j_q7C1~
z9vZ<p#(N=xHOG9^xw;JJ!E8In=a`LHHz23dH-mLH?>ERv!!FK`thq$w7_psLTS29r
zk1RxO#oG6L>1G3K32TF<(HX*it237r|MUITbrW@VE-;&lgY#%N71+5l(-<;fXW3HN
zdOwAO_tEY&_p@ntwj93n8AJX8JAilxQo=`0ZJpU4rKjsko!r#tCxmYn@SdCJFT%O)
zb7*FY=jf+X;SA!(wjM&hM6TF@>>R3PpPmHHKD`I_u$_L?pIJCFIlg9uhF27xI?Csd
zfwSlU)z=*(Unln6{74>!`Mj(k^NJra$5~h$!kUx!QeY=~uIVS{Qs6lB8ZCBoi!0gl
zZkN6G=9H&wCASsl5zEa$PnOHM#&SOd&*gbkY{2iW$kp-tDBOxOiF23pkcue09J#`I
z%l31wgGWG}IX2c${99ce>@Mcm1;N9fk63|625W<o$LPIIynX}vXs2@qWxp^4Pxj;G
zDSPmL<ww+N-5&O#@}KUzh0@Nq;7hiX?Tr*Vwr1{eY|Y?V*!pe9*0i+s0@nT^#_azu
z(|zrYua3iX{H5M1{$6^2d=vit;CBCJa1OA4iF^1rQh+^C?D+T3p`%{M`3}YRqshG&
z#eKtP+=``TII;Xb)*RGgoRM~a7kGn)M<k9KwdluKi~LzM`pm#t?89@*obdq0gG-(9
zb&PXmJg%_?o^-|n?{mgyd2KhwLca8SR?7Jna3NpfO0OtzVTZ&c(vGK?=UjV`b=bk<
z23yE_oX7e0IhNIoG4DrpA5?dV*HPb(;||n{z5EF7%&O*dz2{oVbyD1!P&cld#_8M&
z$}I*q5497uYyJf4r>fQDqlYr!rRu1tgE;Sw<GgH?^)q%exFL3P_J$`=LwOyq7yApf
z6S@K`6ZZkXs<D$(wUF}|--WCotxx|!(Rz+EpVhe)c21qwItG46n4af|>~rca%=W_<
zM|`MLe%xtkUr`I~JATw^kJKv~6Z0{mVeH9V9Cs}ECHEG5vle#5pwn!uJ%w7wYt=o!
z9d+e$Vdm&5>o1Q2E5#jH+yP^v-pmr?2<o7XI~Cspd43mo8K^@KfPVyI8$Ij5`uQQ>
zZ{d!2@s?h!JO51X{abNfPfQ(a4q8^{wRw~)fiBi8)B~(FL=Coc(fy-G?e=JWh>Rgh
zEiSGo!&w5FLe#+u?42yed`7=b6t++kuFYd#{$$!;mXB(0$HxQ0N0q2=%wr|$9qMm|
zH6sr}OUM(&SJ}oovVG`>k8gMG55GWe-Y&}?WO^6&CQ<#eJMnQr>**ilG0wl$rSK8!
z&Hg1B|MdRM(dCG}h5JJYJ_^D|S@;8Y#?{boglPFP&MWo{%O&=cd?vEroYAHx$EIJ&
z{RTdzN;fBd=SBR){(?^8o`rk(M3By@n2yh-Fu!}9!QNzD4`N@efG^u3hnjy_lQ$57
z-rt#P1P&df!4ULsg#P}4B|`sk)W$-@R@6uAXFiugu={e*KF76Y;u_wqijCnIY-vMX
zU^~;kPypxM{It&qz(<IUb3U=H&OUla*pIqb%Y2x}a`4jlh&zJdgR}Ol_ymzdX`BN=
z&Y>@+!a?MaJ&C)<m&jIf8*Z07IIVxdSIZT#*YfXRvlFXRh*dUdzsYv7kCa{XzW<LR
zM991UzK<sNI`LJpbjLXxq&KsO2ft&!Amht*PsR6*ntT!86Mt$1PX2@jIX_n*zBb~^
zdpHZfrFmU?<`}tcJpQC(BY#Jr+nD)*lLN}W%t0pyG6#*om+`Nvda%2<t-mXtd@z}a
zJ=hmbM7yg{FjZ>`HHRL-Lt|G*yeDP#C*w)0x2w$(gjT3&n}4n#?W;<5JR7$*e%)$p
z4mY(v657$aDHIO1wru<6W+o7PTAv6tZ`;(mtp$Va+cvG-6HRoqtrF{}(0E|@^6;4_
zdogwQ<E{tpdf=`H?t0*^2mb$iU~6OJ*Q}LWzwx*g?(OZ0wMRR8tX;hcE7cyiLTmdH
zy}LTPFiOPQJ5upjsy`980#!9@YpT};s@Bz5E2D|-wHQ^eTE%$PI*Vu4RoB#hxodEb
zz^VGFIAh(ECh_c@%_Q?q5Qqs*Gc}WD-2vk}IkY?RLV@2Y_dei0=wsu>i`ysKQj;X;
zOo>m2|DE_^%o-ZK(irb&0xys}@ZKw$!$(m`5ZyZb7@ECGV|)Q9aK%UUL5UZk=cYJr
z!<hNto+z5ae+Y(*mr2}`eG7WVSq?XR$0}MYJ{kX-d{+9zC2mXHl6^ONrjN*HOZMEE
zgx`3$n&XE%@qW-58a@9ajN6~#hjI0+;>L3(DX;L8)A-AQVysZDKpJ)ifbyA|<NjwJ
z_<J7sM;`dEJ@8LG@O-E^lRjl0_zK``SCO>G$#0^y61OB?E(8B{4?f#HaDLI9NuPEP
z{8<m2e~CF0pBI6%{?$_P>+lP=zfkx+&U3lb(Q6WKl6YF;7bSj4;ws<yiyG#CRpRVN
zZW9tO;*F2?J*T7pka$MoYQNl&_^T4nN<N%N%>T%Ihe1~IA@xR6*+!KE&Qmy=?4*vK
zJ<+a?wkM*AZEchq?2B)Y_k1hWP94c@Jsl~BFey7s$x&k>rbfN}Jt@Nb&=WP(*I89t
zyJ5Z4*KMHQWXoW(RY+!8{L|3CYgatso@q%%V`@r}3)!t(w?Ent+TQx;mMtxt!>!>^
z!}iUs<nU`vrlN_|t%u$|N~RKBP_R4R9qSvUSR%H*rZL(T>+g!D;!^AYtI(K;1A)j?
zM~tG$WIU1D67A@6><Pz{(&+G`jZKN(SUj1eSZ`0Vw=3S%pTaqnpm<-RqbIcsB2s-V
z@t(FOC?8KXboItM1;)y=pvU^-{c(Xb$7Au1J#n27+Qz#39HCp|DaZf9c07d<hv})U
ziQfLcP*2-8qTLb%aSPrurzy4}0&3}&uHNXar^lhFGu0ALO_O2lkP-gY!f7SQAC+5-
zsJ*e!g{%6^^!LlP+^v-31upt(iSsXamdP=98#TN_!~5iz`D;fWr6kV$b$mqPOMzQ*
z%-u;jX56pgTwl4l=`T94z?aK0cOPrG&L<Cixw-jNd*CAyXS)_TOT{PG8*Xfuj=!YQ
zv%MA*p=C6jOQ||%UY5A>kHy4jKhkiW9)Hs!8tcEp8H&$K5_iWvD{&PUl?NY7T*+1V
zRf#kIN{#<@jsCWLW9878zmAtm+^x@cjh_9Z@~=t5_59o+aiyoCe_Es0<wi7m9dDC3
z=kxChjh&A!iL<?mH_yDJ;eL(&q=v83@OLEc_QOSqv;Mk1A8UMc{?|Qlb(Lj3b-9+j
z;=1KlO581Xqr{nyE*HP}6wRF{J2XBVFO?_fHC(srU5&r4=T(irPXCz)pF&CG)~86~
zDj$?SDGk^8AC?bpzrEx^e^#Tn9G8gCpL^h+c<{OEL7yj!pxgiWj$AaxEoUe`D?RXf
z4cFsnYq;+J9TIovL!U;k^Ess9x;`&@;AcJfpZB1@q~W^U_cdIXd({Kaldn!HPn7El
zT=>IsqEO;0e-wR@3s>}I66d&7Dq{4Oi@%zxbm5B6N*8}czs7|t`iCU$mfNK9mnkM#
zg*84p{<KEVE>!y^qS5PkO5!YcwNes&TEl-&!#~h)OT$0$z;AfqMe>!+o&V(?_<)A5
z(c~WXz}2gqn}1<}v)GMW9{3s$e3ORj`>sjDb-%S~_yd~$Sq<0uw9UDtr@miO8m`ly
z)o`7@eC{niI(?Id>+~rP{9O&#`Bcj<B-o!ipNBp0hzEYr1J8Qk*FEr!@}lfMA8m=d
z>tT~dukVYnMz7<CCC>J)(c<`y2mXNvUMk-!Sx*@{!OfER{Vu#(qv!oD(}wCLz6|s_
zuHJLqeh5o?w;%Rt{B?WN8oiFI_hq;K?`rhAU4{2L&Qkg){Yxe8*8fKuJ<C<?RTtha
zC(cORUFXlba7B;5vl5NtSgDw!ua@uWZawQI?$&dM#F-C&_oiA}<D=_;$b~C?4olpv
z|My(Dq92jCTYvTa!xEQ1?`v}P^Wp=IzmD7T#gh5^l~L%MB<{|i9U8q}9}a7{&gVrB
zJ{gT(=ks$9`gc9(@mH^+x%DrSxLf}+jb4|#M&g_gdK{}=xQfd|8h@R>-i0fA{LS99
zo_Zd(X}IpUl*UJo*FKG2*Z-`<RX#h?h|YWP`OE{q;laPC*x~5*PpJ!6_LfQ9o#*8)
zT+vrb+@0r}G+g&jSmUGn=V^^z_YYMi2fI_zo#;~ur*BuIM7%3nm5L9fsH!cRic-~1
ze8*Ik=;a3{UsqMH9;qr8>lV|o-tKPv<$?0^|FyTk0I5gv8a2(%mZLstmzt2<K|K=w
zUq+k@_B7%QUY1VVA>%p+Fv}^Bbn4#7cNNCvYnz-UdetRYO)#zA_>5$pUhC63v82_Z
zb$DQ&H9Cl~l7GmBEB%!oHs*OOU$dvF>r0%W?51(GUI7nd!0X-mH_3&UT!C?~Z<6b)
z6+_uu_-83@PdVN6r_x*R-MTYzTCOjWMTW0u{9U(_uj0pXb?Xj@j>s?b7P^=#xlF^2
T(_^Ofv|dcplTJ7N>0bX|#l+lj
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca9555.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca9555.o
new file mode 100644
index 0000000000000000000000000000000000000000..6dc31863365b90a6f259b889098ba06dd9541a01
GIT binary patch
literal 3264
zcmchaL1+|L7{|Ze+16;KM59Gi>_b9{!3^1zfGZwmcS)kKG>~j*p~5<uow$peY@D5x
z*c415w_Xyk=eG1>dh$?c4?Rfn;GqRCEj{$mHaU7|34)6a>G#ciPoH0QL~7{^Gw;3M
z`@jGD&+MDY?v2s%SUQygT~hE3Jnd-;u)ObS+liVE?1dg`t)hPQB)}Sg)3GwklO+Xt
z1<<);Re#=I`fh#Og0=5qd2(wiwZ63jYa3SIR}cH3a|q{snufJ6PCEJJw9`Sao4;Ey
zNaNH$a~ux-f%9mb#sK>_(r|5Ss<56p;(Ykqp3jax>~lKXOLuS4T5l@rC(6=~SvJsz
z)>N43V-?LmB*)2Hj_bS|n6s!eqgPVi%^fFCI?70yYw6733g+CfGJ~5t5ap)4GACuB
z!(4Cr1=l0pf3e=bxxN)Rv+w`Bz86^!_XfatsdP>ajKBSks<c{7ukJSH)J!W-Vcl1S
zq4}US(`aHV@am1w_rit1S9v=(lpD_G?QBjBxWViYwuVogB5r3Djbw*&BawUJiJp}V
z{I%0fV0C?x04)6LRxEUq<+TXxej;Cw_-_3H<SD}^dP0%C!Cd!EM+;tw+|1Jn>>M=m
zD;^xgx|iE#<s|S6$jL`xO{E!EP{F#JkB6M}tE@ZD^-_ZV6V~4r`Y)N^XI|s_Tjmbm
z0L_17ep~QO<|-W<Xg$n(ZhmBB#P*<n5&COzF;`lIn*TweRtxmt#kocZ)$#H~u~4o~
zjEzl=R;raku{>HurFXTs(ALU|-wvUX^Uz?@cWcG#p|6KZt+|=Tm5GILej%LnuM}AJ
zZh-svIl7{rKjnwUWR7jZC(2UOcZ1#9XK^vU5Bl7P_bc9`G0E@%aor}Q_uXN^_p?5a
zT(=1wVSYmB&oh_)4s+>G`;UtBDaRO&p?~}=#o#^WQeRKd>wPNo++@AX^Lc{*E#^lt
zPcOHr()(Kaf6W@{e}}oue~-EJf52S&|H)kXKT7cbo4LH7`|*0H$UKTU>CNlC#9ZdN
z%v|QFGnf8N<}%Mm33~bxLq+EKfw|0cpSjHQOM?HehQGPr9wg|2-#0SPdFC>Y!(8UM
zz+B#+vf*#$xs;%vH}vM`1$O)TZ0Js79R_h-*R8;Bx_0O<hG5s+&;@(C-3Hrh&CdFB
zVSKw^`mE4_ZsDuK$>IJA=hnl|WJh=m4|-2Ic$noZ8}{%^jJmW=4~z8s=`H5+Kl)v<
zE>DX*bernac#x-@e~;(yC6Q6|`Wj`iLAi!C;9AdrUvS=TPjXPdThsv#)XRf=P)9!j
m^!obxDWA-a2+s0XipSJ3ie6tM`o7X_zQeya&S@dna{fPi(3va%
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca95x4.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca95x4.o
new file mode 100644
index 0000000000000000000000000000000000000000..2d98dbf2b009ea3d660cbe9fc254aa17f8f67025
GIT binary patch
literal 2360
zcmb_d!AlfT82@(1N=>5FB2w%n5-K|EZh2VgFzco!NQQ0{bXdpPv0YMEX2()IXdu*~
zg9`>7x^zqG(5(&;5*_*n>Ky2yYlx80V&6COy&Rvrbf|Bc`M&pizxR8;;eE5S)IU5B
z4uwEQ2;Rc}NTL8gkM7roR~k?Q)l{t_f3+2$2w?1LRm-DE0dWDayP>7O@_ezh_+fnl
zmPbn(6gQWkctIF(;^X{UY4PJr;+_}U7t(4&txXL&i7$}z(BncQ&6gJ6uX`GMP;ABd
z?Xl4MHgb0wV7C$1J`F?hMXM2C4*S|$dq$ji63c|EI#-&Zep9RJ+}Z>50BhT0iS?ZZ
zW4E;U>5mWE>woOG0+(w4wjX)`7)&O6Mf>3On<ACZPgz+rHzOwVj&QTKNOaFS`N`ZA
zR*sd;xwhrbIkt%FvF=zT8rP#S(QZ1^-B?9BItbUJf@Y$TSdXV(@kVD|1wZ!65wx<M
z0HEQoTxh7I#&Hig+)*by{4oC%;-P?!*I|gAVO)-biW(g8)PlDb9MlK=3!d!6e3I*6
zGAiKL5GNghnWD>2kiuL}$3mR=H<;JV`9TH#Bj(RCFT?p6<KGk<W-T+`Gk;mPplu%7
zGB6ZN&O^q&pU7k!IXN_wb0IxAJkpmKPLB)>jP<9|sYKs!e;S$Ay}r4EWTxzb3%Qtu
z0;9H>>05AZIhD-MOy=&6%(=63l5)$z-V1WZY?ldaD>-GG4nyqRPYrlrelPfAdGdtI
znr7tro>uTWe;LFPmo-6W8E;Yef^k*9jd4}~N(CK*@g~&wd)5c!`KtQV7Zj@gxQ7C$
zKC_IUL;YYsJz-qcUu9g?r+%SO^`HANsQzCwuJShm{Ggv-jH`a+E2jFX#^<3>_3Ic{
z{WMqLM*{qyAJ7X6)2=yz*>(J!m6c;pnYwGwyP#)G*93i{PypS^Pfy!3u5as~?*bLb
zTHv$jX&T-g;41s(;eoRytO+mbdjqdvjPuKIJM5#RPg3%|ko|s<arK{gMcLO^@ik;k
zxeG7SRM$V|^)*Bagxp_3Q7niWkpO48{*Ho6Tfxkac!2qx37<J1!`WKA<o@#c$)D<-
cgx)atiUxs@`$~wuGv(I5;{)xLM9%8^-zf(6FaQ7m
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca9685.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pca9685.o
new file mode 100644
index 0000000000000000000000000000000000000000..2d485ce3a80dc5d1e6b391af727cccd1df351efe
GIT binary patch
literal 2384
zcmbtVO>7%g5FYPyYBvoie-eQfXOmPkjgpmZ6l4QZ*G`-uVYRBg2oOllX0vImBzCjj
zK%yYkNE{*oQY}T$BOHq23JGp-K)6IIYHtAvu4zz#s^t*W3z0Bk#``weZ0rk+wVrw3
z`)1xZZ{M@8B$8u-#{;%`;43&7*(ku~v4dEyg)%h5aS*;-PkG+^IQ8AzWrMX22I6og
z(1Q>7djmaPVxXtLFVF{(fZ75V&+V{<EPw(~Ox<LepQ|h1ma7a(y-;j_l=hT60j_qO
zg7$6JF|a1cyLVaV4P0ui`xF?T^1MgsSh>2gu}=BKBMxEATTBU9m*z01vs+|8(NkUd
zqMQL(pmpvuVc^~flpZh`_>h6(gW`|BG4BmQD5j2M&K5v)!wb<ZKRzuG{oM<t?^~hN
z?eWb%CV(=rbm^O>%_jrbUxfC`-{%%q|JhS0r~HmTy@h#A0t{0Q<=c51JKd2a@_Nlc
z8g*TbcR?E)rdZzHX3YcCUv=e&T0gfi?+&i}%ii7-_4GgB`X6%r6MiU-d*PyQ^vwHy
z?BQ4Jh5D$VrghX)!Fm;}ry=h;_HhM#4{v%vnFe`z3-#YdUBtbE`YXskhWd$1c{YC?
z^}ma}KCXWf^>4Eis9WA0sr7N7|1-=h<9hcT`bGY(?S2}KYlm)pWaN3VfBgI_qLR<g
zX)|gzCr;-L(VWr6*wAGoKb@V!$k1l8rmmTbhAu{>@K87yib|od*smJ%Ll_0mo+Vrg
zi8K=mhKF&N8yKB+FZ{VzZ<^J;2>=W~^^9R9x1Fc~^==f^X>!xy@fvazCzyfb67tM8
z^z9Cv*Es$(`c@u0-Lnnw7aHI%BTn@{K~MIz<={>9_3F<dPW%bpvdu4YTof=s^IHx+
zLQnjl3;&$svJ1b3c$;J2_ILcUrbeHO3`-iEUV_t8z{lBK)`ZM>@<Ke8%v=~7ODB|!
z5{oAj8JN<w+4y1svSDpXf9q8P&s2Qb)a}fIZjLURS^W?prC*91A{eTf&F2dHn5i0O
ztgxKZ6tytBkJ_bbGlx)~Z%rf<qnY#Z*Of#Xl6-$Ua37m_Ozt%vM-jKqmIX|3{3PNn
zJSMls<ELEsAdbo0^&=d2*Oxg?^{q2%<^R#3&R-4c0DqtEIv^F6=S_7Iy=ho}#*Peq
zPL)i3$pmRiHC2!%3k8sjyfx7B^YePnwB-EnZxJhyboWh@5hHtv>$gTn@4!i%pff4k
z1n#f#E4{<VKJ>JXeGj@g{tU<6zc8z=bveCO!;Z-h;zKq6YkmlGNtb&$d;R_Uh8!~Y
zIEonM2Wiq_AMk>2I4}x{OXl?MwQ2r72k&ws^@#s<NA`~}ckc+nZ7y_^1`e~=wITXF
Qt(U*b4@BH1a_`Rn7qw$d#sB~S
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/peer_localization.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/peer_localization.o
new file mode 100644
index 0000000000000000000000000000000000000000..cd330f18f0c8c0b825da5c98c65810dba126827f
GIT binary patch
literal 2032
zcmb_cK}-`-5S?}_mf!&}Bqo@!t&M?bH*KQ{aA9dtY(fkn<)lg7ZkKdJ+pXKh6fw}C
z2NFEc=t&Nepb2^+(ZqN_i6_q(J?q(v1}+>3&M))B`di|~-*ji@{WouB_V4b(wXy47
zj|cejz&kjOI0~?N>eyH7t_rQ-hixhStw)x=^1lq#2{(pmE9(F?FXD`o1$96lhnmj=
zSDph*Zv&*_KIlmI!rj2(VG1b!VD7`KmzZ}TK`rrM{z+y#xE$Y`|FYW#`)|Ozyp{|0
z2YqT-_N!Z&7Ekz2Cv0I`Pk%`8n)RTy!28`cb^l=Q(}ueroNXn5x^NykFUV3Yi2Vex
zpEUNehP@1d^iy;7A<pB&{6)(5V4Vc!$1#6_W(nXdLpaOuk;V?IT}A$)w>lw1aMj%l
zyC1BNhq%Z4>cL#RS3BTaUxmoxGsefc07esuLAiJI=A@jmth}Dn%%VJH*|L)}<l%71
zwx-NHdbXZ39Yc3!Y(pMUV&PaMI-o>ja<66=!stc%`WUW6WwsNI#IDxWPrR^a!3Vz&
zn-Qd@PYQs9zh+B9C2@7t0aoSjb*>&Z^1BiDxO6_d(j;&_q=a8W+v)0)E2@OI6VFd}
zl5m;gC9*bJ&LyaB9^sYgZxYx~7N6}p{)^%fvL6XoY2*;$P%;cVowsx?Z{F7&(<&-D
zgenlqf`vzHr%P7ZWN^989CHzqMbl{jQ%1QNn9q-s4pdTFd3w}vQl>tgux5&l^kg|X
zGORo1J)=P$^SDraHaYT-{cHtfn)58q&Ch^AeEu#0zfF7*e@u8c^3RaZ48Q-P{#)XR
zI{aKj{@w}v5Y}T$)VV>ps55o~AC&TJ!O=2k9s9`UxMv%AO>vBh14>qNG*B|-GAO!L
zC>VG;|7Xc4!&++*<W!2Y)HmO5=MGu+{;~5@Ddr|ehw7(%rq5jdULC#902c`tzYs5k
zx?ER;FO#O2zd=Oz_kd~e`dlxH4x>gmK$hp<5^!GMZM_1Ag?<97L_CdHE5q3)E<QiQ
f#NOHd5`o`Y;99&chdR({mS3Vz-ykQF74!c9*FXs+
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pid.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pid.o
new file mode 100644
index 0000000000000000000000000000000000000000..63c292fd8a7bbfba3b3fc3c56d30bfc03b8c60a9
GIT binary patch
literal 2184
zcmbtV&u<iU6o0d`z|tBDO`}cOOuuU?ZV8?2ZYZH>;&(%_Z6r!+Nk}-j)7hyz$^Odh
zXdoPDJoVr~67;BCwAB-d2Txy9{0oeUhInc@^$NX|m`#0e_I+g-wjA&^-@f-g@8|c;
zyxH5AF2A2L4A5l2FYrv$D8T&TXR?e$2}dCVxhxE)VC|1De%^S3uo{=JH@*pb##(C1
z%z{d7ruNcjK^a$!nKHoiruoTV52Uc};ejo<gE1rH!u(U8?yX;c?3!@ry(|Q~gYb0M
zgr9bXpu3%hB{MA*q+zJ`x>U}9RMm4*)iQajvRIyR&gZP!o1ik2!pe<KSX(AcJHw!a
z$XP#NY~`3#o+Z_?EmZ~5<GIXR*1Qmwa~f1Wk2#KkdVqe;82Xg3P9_)GE2lsK+P70^
zJ1o`CknB1Gpmqo4)9$U`Ht0SkNadavmYD|iaDV>|fp@DsitcvTAQ}5`F_!wJe%All
zUo!9>)ZgFeUzRxw=WzF+{Mt@EQhq%v;&28O_3$6Y^Vb;8>p43;BW;V~vG=&X{pg#;
z+}L_xj9{<uwpG9x9Wr3a7?q0T?*Zj(Pu`mQZj53DtS;&tFp|hWn$Yo`(7sXqvppT=
zE?&GK@^c?v6-%vF-K{x(Q>?TC5!O6Wo@xiJ6~B&B;MV-mbHmR9Pt4e*sZyahV;4&z
z?*xr0lnRrRgxf_ymSUkajW>P?(Yv08$NT+U%)XldVB%jtGBHz<jzmDejiNk<lI}2o
z$Z)LgEPD(iKmLL@K$iWlux)}%ojSn3cmVzm=UL_W4CniZ@vj(vjqz)Y-%I#c8NZ*v
z1I9NK_$uSSGyX2>L|@{eIUG+#Dt>8t^flumfq%<*A%U+mE)zJk{i^N4#0?S_ntllN
z_DZQ8Nr+r+SDn!7VdZwaeiPhQvl9mRR#L#nUbxT<y-x$De%WteFk*{d$BP6sUJ8O%
zz>c$C#}B+JX>(o}(-t~qH}pUE*zbe37JMy4L6~kf1c~<`8pAp1S&*LPxt&B#?~bPV
z7(S>$<h28Eusb&!p|gxU40^n#rNFB@cIe#*!N#dLU@vz%V7skG!)u1I-2X=u7)-6j
zerBR{GWw6dKm7byePI_)qJg$gY6s>UykZsBDL>WGGaO}{_J#1|X0IjcvU}vKW#VV>
zP|jD4r@f^51w3)m^{>Z4l*yMU&il2x!=T<H`X13q-v20K$=(ryJ^rNKCnZL@u7*ya
Q&@Vp25A=d|WS)%w7q<94Gynhq
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/piezo.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/piezo.o
new file mode 100644
index 0000000000000000000000000000000000000000..d7044fb6242ac42f178c71fedee6d9622b92be8b
GIT binary patch
literal 1368
zcmbtT!A{#i5FO*T6sd={NGMVd-AYjfh^*pBNJ&nvC?F)%1Er@Pz?em`l*H8DN`VVK
z^aJ`gz4j+sapV{H0y?vv0e3N{PGrx#H#2W{HtUPc-L1JG0I>jm!W|M8pcUT5u?u5Z
zfTtAw2p}FL0PAny+aC4~euW2rUaRmoJ(LH`3nyOkgkgJQW2lz5KYUXAc|J}@Nj6m{
zd7<pcsCS*yB0tH-7!~O#vnI7)3!?_Q*XebmfsT4=IVmO`jJhi;#Op{=ChGRq-9{T<
zG~*+<zG+H^jVAyQ;;+d<RPt@X5%*8>8S+7`UMdz{{e2yxLwM}6_16-Dm$iMiIH{N?
zPe$vJt>Q!VU59A)%KFU5jD?5O%$(;sh4u`xa%Y-ZXdhRk11`O9N?UOsjonLZmfxbS
z!hB&#=N56$TWw?{Uh??o+~o6$d0(gfKt1U4Y+{om^tPz{NTR}w6K&1Rf<8`c0{W;d
zL8tj-Vy2e${?{oKp#S!XCloV&@9{FX(62C{Gm3>^e>hhKGsdJ(>$oowz1)Mh%=<U?
zJMv9N8g*MkK$;Kr`}IDKu$MTwZx}k0^*;;2Ui#~vNByVricy~n=MmGl=Fd-@zjtbF
ZvFIj&n#sCCy}+QU|C0NMQpn!#{|g*EWx)Ud
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/platformservice.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/platformservice.o
new file mode 100644
index 0000000000000000000000000000000000000000..66eb6d4fb2c8536acdd12a118ed4377d4d633fa5
GIT binary patch
literal 5200
zcmeI0PfQ$T6u{r^Y!QnR3l!-e%aD);j7)$O!+4s70wuxH?yikV54*$gQC9X}X9fbn
z=+={IJg`X<J$R_-p>XnI>_JU6v0j@-jfp01uU<?8CX$rmdo$k$AH$9pZ-z%^zW09f
z-uvG7=I`?E$i!$g5&<C*_!9OkK>=2d?dgW68qfeoVSD-OwQU6|w<G1mUst1R$I*2o
z8Ch$_(TPH3p%E(Re(Q^<vDL0BKRr^K*U6Vyrq0kI22JfTxL%Dws=Xer8w#YVPj?0~
zM-3hIb5-;w->^9I=}wA#DMvZx=g34Mb??c}zzrxTR&k>oQ&G^(ez;4ye&5-7QRMv%
zb+ggXr_^#H^Bz>DhF~dD54txe9;0znf%R3T{P2;|vR+kMy?Uys)3J6J9)GKp6Iq;-
za+){~@%tG239gyqM9gip<(T)ecEKVsIM#6*n*Q`^^K%RK2Qum%ZQIM=c>UgJfGyGE
z%+0ut{Tra%b=dd&02MrkD`>BLZ$v8{Xro?<VJ{RYKa8I6`>&#%xf#(n8jP*&<?rs?
zQ_??E41l4NPV+@#hW_c1a#Kg_Oj8FaFJn!#zLrZ9@zm&K;`N?n;tJY_a@c{x4jgvi
zumgu3_<wX@Y<T!JwQKC+8)~Xp%vrN$wxG@wZPlG+YP_dp7iY3L)NE@u>oUuox0$MI
z{XPA?eY)1yuXdSsz6Z75?r!2*pGrsidi&`u{Vzh_UNLyQQ_DrE`DF&6;9o6KFjG+Q
zn*oJp*)OeVMkPKgxhQaCzcX5AJrc$b&fAUt5vd;4iwEfCT-ZaL(?<sRPjOo+2Um+<
zIRWwOImiw4i%9<TQACo#jkvH4DO7=H$Yr10K<kBl#5X<+;cFrM^AP?+2>&&NZ-($X
zY*ei}&xUX<gbyHZ!VZ;iB*}PtfbkIjH$(VaJkJB3=Q*C|9nPzqw{Z@ooay3ymUo!F
zkhPd*LFeKwOxg=6)0u<LX((v}=LQDB$&vD^4q0cskaeNxB$u4DNW%RoW@vt9hS{}`
zCtcGL4(YLp$)Wf}dUA9$Ig(1J;zJW7X|Qa!MENPx<#{&G;7U4~ijR2*63k-R1$GIO
zFn1_dwB|gVWQA#&nWYjwMhXR%8!uSJe711SKMKy0lgk$7_WXC(J6tTxWUq}e_dKI!
zq?StTqM2vlxOTxREzy``g<W^vGp`ZyY}l7Ys(jdHrps`(Zq^D0rI_Oe8C4YDt(sTs
zpD1ySHGAh#oIC(=9*N6Ofz#aOcz}0uehRt&Z1O=D=Q{EhuG28cb@IpGn!7SBae9^s
zDRCv}Pxm1SaoPVXAA6jB{0aGmE95WMNT@3D6I`c(?oSf(Kk2L9{t4HKpOSbB+9bhx
zx+E^=>6N&g=X?mK`%~nX{om$1c)rS<2hZ0BQl6Lml-_<t%JaO$Z%KJ%{*mM_KW#sj
zcvQ;snUqKNzaw$k|1Rg$&ofdU@f;HC74MfHxqmB;blnQR$@xhf<?94AXDRQRQ#iV|
zKh6rxW;s)H*`f>DwCS3lO*sx|c99Hn@6!fBv#h*_@kx+p1y?HZKdCB4Q_0fn%*$tZ
zdw{?BdboMuT|w6dt=|w1d>m}#3jfroN0U;~NFweDdJhv1evu5yCx-&K1j>O|kW<dE
zcuNHGQOqxJA1aiyUjROe`Q>Yn4vBbChk>kC{TF!s4+4!9@sx|?0&W!FONJzE&-%ty
ziIFPimB(7GTIBI<yfI`p;U?x6{U;vm9U@raFWyx#5kZuI3G{EiTJeK)0Ohhj?Cyi{
F{{VSspeq0X
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pmw3901.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/pmw3901.o
new file mode 100644
index 0000000000000000000000000000000000000000..1bedbed93558a8926382b83cc2d4848a7c4cb5a5
GIT binary patch
literal 1008
zcmbu8!AiqG5Qe9XXhjee526QG5NyFNNs5PhsuV4PdMNeeLDDoOfhH;GiuI&NAIF2>
z)t69w41EHfsk?SrbJB%n{`q!hXLpjlJv=!o77Cz70iIy$DGKne!NvqPpagTM?%L1R
z<?AN1UTBhrR<pU!%B{0=)=ATWA9_*3`f0{Q7_futFiZQ<09EFPkqCTol?ANM-KuLl
zb?&&V>}7Ekm0hV2=MJM4$9DIo=P?x>Zw5X-O-{a*dn4k-yl~{!FTOA#S`)Mg3oDyr
z5y6U9w<H7BC0~;MPv$VbuGMXa`>;I*=^Q7KP`Vv>z0*`gX#&7UH?i=#XhrsIL#0G8
z7QlO+@PKzmBjA1-$3Y@wxqq7t+=03<YwXmJ{;I*%Jr&+ULHTBfJ1W4iX2*AMoqGA#
z{9VkYJ#C!&Q1vf#h+5UxZQft=AoJd&rT)<CP~Uw`@_Dr8*=gxs7NGO#L)BGm8AV?H
LqYN~kh?)Ndg7iwV
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_controller_indi.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_controller_indi.o
new file mode 100644
index 0000000000000000000000000000000000000000..de200ab3c098cfa81390ffeac62320e753cb653e
GIT binary patch
literal 12064
zcmeI2e{d8>cE@{mrDb=K0D}-hIMbt_tRzMVoqtI9V$TW?KaDvdh|ajOyIQTJ1+65n
z_Iv_dumah^Ig)}a--RMBN5o)Dm_Mk*caiVhDcQ~ua&c0wRK-P7NeUAibA-F{9Yuoc
zjw0{PbW4wgiIZ}!>i+Ol4c+h4-+ul2P4`T*uz$^_R*$AJb!qG`*o>tpV`FtQb<3_=
zYz`}Av0sj~l`S4m-`e|w3BX6-K6=Z`j$V5FKwD?@wR9O<s+S$fww<{ATACSQadmlK
zDmbrRzp~VuS`Td@xHpCk{rXmI;<}fe&aiA7^Oxy27O>B5tkRBdSZwH5>w@Oh9ZYPf
zsnx$XpB=4TT&r8q2gZ6)vkbewf1jsj|2}U`c}YkwgZ>pwb$Vr}TrY1b*W;lIeKb_3
zx4>OiQmMDVT@@<RW5t>ohk887%sYL}0bg_fkG=|}uL8#x#KHWAp7pV>72VI$`}dWC
z&m}b;h|3FOYfWVk55@*D!Oco4AhrrUFJ$P^`HRgKsCW8G%%KD9Xq2(`(;iDq-M+o(
z`quEojRn?cSC+0yU0uF9b!+dr@hNZQ18#W#5${`j-<-hw+xdmu_~FK!*FtH)t@4cd
zz4mZ^3g<l=+ekhc)MEk2kB13tFMxKMZ`2-!c5EwzHq`%5eny@%dCd34eBt;Q(@1_H
zj|ClHu5r)#Vq@WarpKB;GZw~x^Tai0Kz*0Y0p<t$(6$<6Qj7h{FrUvY<FR7LANs&P
zWft&KhXsJ4R`s*nv7hd=<Fi!l{(u2{#QF@^z_o|hq<YJlz_o$v;?~~3o?a8+t4OU4
zXMMb3uMZ#W)gQrL{RsBlD*sv&*F_Pq)s`i0?C?zdr`LOWEyQLNZ7^{yRd-lo1Z-SO
zp+W0STsx=0{@G)`)Vqv{b5MV6l$kuAJsl2NVywtxu3Kh_S4)^!+h7TJ#kALe@2toA
z%xEstCk!SuW(nNuWAm6WGS-_s5Bh?xY&EQPi0vR~{h-AhB|xiHGLavs(({WzKTP!N
zEO8F>==&4cSE%=a{_PMGm;KfHIfx-T`EpyfVm!SjRHZM3dH%VF9sNDf_~HG-nkw`Y
zt$)(?_R-hUou|X*XsBAh8223Qf8H{yp*{X;i`fz=*I$P{_=!KHr*um^2V-G;m;4$Z
zfwB*LmHWN?6(~pYEYbNwfY(9&lz*A-^;hUwza@HVJ!VgfCYBxw>F>Ny$anhIn4|tW
zJyEZTT@P6zUaJW&wDq)VqN`C8@eP{jtoE9no1tv9L}H~SlAiTu7;@IN-4cB*mPqZi
z#D{r79?qZ5Hx$4aL7&-E4&%33Vplb^jpp;7M=fE&yD0YDEWQ!qh_V1Tv^>5Z;#?i5
zhWB64?3}aFj1|u^6RnnrwP_;u3_Pn54?hgK?CaOWSk}wqsNJcFXmGY!4)x^m$Ia+=
zh^<=_f8(#w6MJCX(m7_d{%hvWm$#YgD+_twpE1$-ZA)~Yw!}o0##7(5#8rQ-z7ggf
zI{<SI&NutMZ;9U@_wk<ZGtu=t#J!C1xW38!aj1ZI?}K^oV`BEQLLNO1^FNu-<3F%O
z-5JJXFI(a#Cw=@|XEdJN!$dL-dGstWW3Y!hJ?-YMXEd>4+{-)v(h|XO4>y3fz`b+M
zBJ=j`z{Ks_!HL^HWN+@=quKAdPv&knQPbHL7G0ae;-|B=nycX1ef*Ve=H(w+0`q>b
zU>5J$9u_VBD*Z%$9{=|OAHTe)-8|sW=WplD;)z=5TOStjP)P4?42w(t0)7tGSL{i6
zo}HR_1=i;Xe3LqVR}<Zj0(%H@z0w(f4%y%MPQh3hyhCu`M`c}o@BH%JgSNA_C)21e
zg!QUH+uQK2srQ?9fAppLd!cTD?r@;OZbKXU9R#~i>OE3(X~=o+%$1t|O)Qs&EP?(o
zhSt2f{PKRs$N!hlaNcshT*mo%dBHd^PyT?Dhv^vhIx)?c^ZLa%9ox<&^!ZTE`$L$E
z%2zF{1Dro<e(|l%_BsiJ@3ztTT=fq^TNL`E4#&drTV5#Fw?e$vrB64_dXjteu@U;C
zpX(bpn^yxN{iDEgJp=Fjg;2k|-x7ntubV%vDd2x~-yH4@H0mG29s37Md}mt$e>~Wz
zM_&$$owWhp^NuAB7W(*)7W#PC{002MZ2|uD%CM;O!y5bm-UYr=v!bwwCyI-B?4K?1
zcMtgZ?0Uwt@J`zisMY`Ap(1|V|DZm*-opnU3XAQqPW}jTF$wHHVBhupn<f4!SfyVK
zR_MR;uT^{l<obh^O?pdDA%F6bM|9@R=ab_V{1oh$ooUz?&^PKW<fAW|JaNtvul%9O
zQ;&v4a~;I<-LQE54D7G!uviH1&S;D8X!9e6{$Hid`YzuRbJua$-_7OvC;r)d*E3=9
z0r335!+I9(GPs{y(yV{Hu$WJ2#c<vz<|SaSDK6zxtdt-3mGaS&X1xkx{o_EBUJiGD
zG2;x%-N5~UO8wNrQhpH1O1Q6-mGE~9OL%O43BRZ<=IhEA@xM<k=J?Hfw_p(;^)2F-
zr<ivJ7sLK8=BG*?)XRb){Xnpo8$nqAJ}+k;AIEn@{{74x(>(l7Lre7z1D<Q%W2SxP
z3)Si;^H@7$huf^5j;Fn_cP*nrZ~2!B{Q%^D48BQI@J%`a->N)lD}PB7s~|6Nf2H09
zam+IyRxk92J`DPdfvy1<dsY*b9@cIEF9ZHP;CMDTaX=I5+=yp}pFP%^ntGm@@4$KK
z#*UVWTYKNL&kdeDHuoZ&HAi3#{v66Ils|zI*5jAg=Vu^1@k{pGpD+7$DU9&!@sVcu
z8=EzAXCGtCxd#V^R%OzC>-)Qsb^u_vCAuTSDjI3;&aw9>`<X=FR#e+1sO%D2p}fP7
zw5R<@d)iN|zh`SCJ<!)D9ozO`G86B0fNk%NeN&AKc59BlHFBrEHA40A_#N@Y9D6z*
zY0tzHkK6MCzBK|WyM$IKTXDX2>G0Nw<n7Rayd63?<sK~8q|-C`lr|j~+o#7J>`g{8
z$-b_HoM@&uk%<w~F6-@)WPg7m&14zrmU^_~=|n2gpGkB9i>JCG;L|Q`Us5-e85oS@
zK744~7#U7tv~~$m+9gD{G16r>IOT3>?_q;aN8)|4)L^o|$M!rT{pS|5a)GqJ<W3^K
z%)^&?pj+hEy&kf3Fj9BhzwrCOJ+I$1p1o(30N1WswbBT!-Mr0c9~kJ1_r{X_M)yG4
zfR~~XHV4xK-N`<vrQ^NHOd_87Mmk|M*EgDt4J(@KS2P--SUP1wt)Zp{dHo6lTUInQ
zKIk@}!!;=K*w1g@OXX$QdiUjJ-n$_XFL=tm?ze%PpZr`o9B}b+<9Cl+4r-0WGbV>}
z{M;SSGFv~xRqZR1D_fN-CHF&#m*QclYhcZ@DPsk)d|YxPhok9bcdte#&b#^7L9Y@0
z6q&l0sc7UNP&j_>=6GJwi2lM%7l<cFET=jG#eC?Yu0yi=5&$(<)rRE>xKV#Z>Iytg
z>#I=QOaHnHKP&x=$$6?g|E=U_CI70N;w2Y9H-X;=GkZ(Mqx{^Kd@_goz()NWIlNHv
zvpIaB<Y#jDZ%IC$!>c4enZxTOAIsqk&OFIXa-csFAL!5EfisbYBU4whKF%tKS!EYP
z<B4x%;A~}|Wrx+#*0%PbH4sl`cEf3M+85R%k-mYRp*xOLk;q^y9ZTH_r^m-}VB};b
z0&gA|Zir=K{oO1T8R%s3fuU|Tlmt`BS4~H|e)H<}>!F)V6N{|f^h8T|Q{;)()~##W
zBkkdqO=}{~Id0e~@bm_Uxjpg_hZGNYGl#m3kxXxT`e+AFc4q%AfP9jzGQ9@zxl#VC
z-HWj$z)NHui}NnLNIs`r{S@J)#Ls&!{378?i2j-j{}tiXzhCY%jEC|f!m0mdgj0PJ
z;Z(nlaH?-7oa&=4e3)?RXOwX2=a>sW>B8S|;Zuauao=;{AGz>P38!(Y#f15%yg)9p
zTz)^{G@b_tr+(JC@OHwfpI#T9ap7Z<mqPsXhmuLjaUZF7Coa>sB*%S3`Fli<KLDyL
zPm1upNc9cUXa??lvz#6slIQw=is%jH9Lhs3`olzDM)Yq;p8I~7B!1*n>|WO-$M`9~
zN&J@+|Gy%<g77?fl)?E{5`JEO@^PIkCVZVdSm*BRcEag8iMsGU7yc~abp4FE@G~y_
zEf@Yi;WW;RF8mtdG@hG;Q$K$B{m;!$r3-(+g<FJE|C?O+Q!ad%a2o%p3xAPtI_|g&
zpCp|6KkvdX5KjGHbK(Agv-on~S4D)=ahJL9Cc^2sn+T_Vo^s(AB**<yMfOF<Y{x)e
zO?a2&x!?E0F8rhmm+4^|_@}3FLyo1mI@5*-$E~k)O@yN##Vx{7uigb)2uFQ`v^xk#
zy&A8VaMWAU9wZ#~>dMNBihrH74-t-f)#n)D=wHP*MmTEy(mqQ#>Q&s6grk0*w9gZc
z`d(?jPdMt~-}de6qAXSX!_vM&IO<EJeUotXe@NO4o-1DH2jAyi(w;{+>W`rat`fpg
z-z)79;iw-+F<cFVqrOkt7U8I$L@`|J2uJ;(v^xk#{dp9_6(t<?8ELD2DnA!&HDkj$
zdSxFX9Q~_29w8k4t9gzQj(U~fal%o*Oxlx#quwv=DZ){&^7TI9s4tQB1;SCU@_2=C
z)Em<NlyKCqmNt{;H<ceXFLi!a>tUVLm*nVGoCe|Of0NWV5RUOQNv_V-%KsM0)wx>5
zqvo}R_(A{eQXeH8{i`^82}ga0)T{Hh@~_6t=IEc2`Xhv+f8|G=!&UrIsUOeLD}I)6
zjOPKVpCTOn4@!QXaMY{3T_7CwS*gEBIO@MD`KN@V{)pr^2}k`Q$^B@+rSdZ-`8>k0
zdRTIUaP)sx@(|%zRpT}hj`~Tdw+P4Ti;{049Q9L@cMy)%W0I?LzKZ{S$p>@vFG-#y
z9Q|LE{1D+-eOB^ggrok7<YR<mRXrE=yNrtGrqugEgO}ot#h4*0iqDhJDMUE^dqET7
z7*C1RTZ9|3j)nSODgTDlcSsHLGNSJ#9Q}u+evt5TqR$eJ`Ua^#M0ka)V{wdd)Hg}}
z7~z$&j>TERQEy58B;nPvj>UPxQLpmP>W6lxGO<o5Gij&nRkd`YFIJyP3};w<S1c1_
z^_@dQtUf(}2Fh2|H-U*F_{pfA{v(`2?O%=V<ne(N{*#^z<_i=C^u;BFbD@_djcfA!
zrrPGIiY)Q$iRS@J+Nvm#hfj6xM>jZ*UkXZOiMd5Cm%F6!oaGO^Q`kr@)n6g}eHmG9
z|4$1Y1-8>GxBm)g#334~2<oc;Cb=F|v+A$HS_2LDir<onn#u`G^;iBZsN5@m9p#Q<
zi~M^T<`18d>aX&*1K7RBR|mQaj+^N}ReuGxL*-uMkJmVgtehy0k9}2tHGV%Zlr+Fi
zuM6@(iSf}(y0iNrM>{9Qw!8`c6DD5cGJm)n@OP8k@$s)OIVlDL?_C+7`YzfK{!rs9
W`#z}LtAD7@QB3~_1KA<B|9=Aq#u&i>
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_controller_pid.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_controller_pid.o
new file mode 100644
index 0000000000000000000000000000000000000000..123e9a3fedd8f76f3176e589a24aa02fe0c26775
GIT binary patch
literal 9440
zcmeI2e{56N700jh0+_%`N@*Kt=ez(aPSm&|5?g4i@@xX7K&vdIQ4*%bj_uTLo!Hn0
zB~UiQx+<#J1{HtM{*|$|bF8XD-5&$Aw?+KZ{FzPrfhH!IwSPoa|DXd3Q5&&y-aE%W
zd5Og|_DA>QO6K14x!-&4x#!;Z{GP)PcI@3*<#H)5F7+!_wwNka)XQzdY8t9mtx~Et
z-#K^WHxqN3I<@rVW1a?;>zrAo=G<zN=lTjY`+!m>GgazTFtFrQ<aNIpD)`NT5B%m5
zzwQZt=r@BG{U*3OjdrkVS;<G_3(&3$m;;`G8D1YSgH3_5?vlH#8w{ACH$e9j(7g$|
zx68Vs_CSGSihRp3Lp6Jv!vlsHeAy7bTxDPHp{BPv{Cm*+MQDy|CC$t#V=nR##P%et
z;~Bph4!|0A`_1bsjM=#(m-4WdHTAmoNB+F~)?1xF`urE^xg!^>991_T?~EAv^v^Lr
z`&<*8pBtL15PC0Q&TLvTWONwjt*|z6OH&10!wAgZ;NIYgwHfBk{Z$h;HLdW4R#lkY
zpk_xexlVoh#L}TqtAceYGjvv&k=3pXm{Z&f1$jjuXfHQ(&t$h@7PYm7{4=;lW#z%v
ztSwl2(1pG{*4eN;pZ?i>hM618ch<nT^$;)aX@h&c$6M$1;289|0{Xb^qIQG3$rD=A
zSbwa>_Rrjl{V+y@{sCC4`f+2u-)QjUmfAXG8fbDghWSHa*oS%?KiP+I*A?;s!$iNq
z-7YJ3WH^5*_P~y##!vH|RS;`<=Z>Qdmm9tpfsd-Ls;|{IdWu!bj4IU?zTEKrkD+~i
zpMT=!{=meo@b-z>4aV%urX53{KCyFX?#M^^Nv;1+@4)`OX6@g3YyVuek9%;B#=t-B
z#TT$gxK|IuIll?#{5I_4*+KyPx+bo}9^HVwnti2uBH;FVaG%CM2$*M&yUeqHx8n~(
zt~Wrgk3p`FL$2MRdl`H`2cP^vm5I63>l&>*pa%2Z1k6}#v(dD1!3`|lw7YrRGId~l
ziRub|=-(PTWLz++)Rt}4>OgLp>N<GXxbWMh>VVQz*T>qL!r$Ob;M%W3{)*Z|g;EY)
zX`d+PV9Gkr3g$yU!DEf}!A{sKn8Uri(StsN4K?-XH`opPHFu{gxEszc<Y5-B(Xm$h
ztQFs`DxI^d+JjAa{%~J|eaignojVT)VNWl@{o%8x)Lc<pS2)pRnBy0Df7caqu)kNe
zwN2I-SQo}n5Alq{KH^$Gd&-#0eR*fgN8k(FSMh$c(=fNFWv7bTgM~4lVd~y;49NJr
zVB8mA9AB?|FLU0zthwR-WYw@XtogbM!Zm1dxK8DL0NB4&YW}?8>AMe{@++0wc6Z&~
z6<^=^Qn1E*FaO;7lyUDf*&e>e^DQ_p<0teNlp3eAl-rg{X0~S&9q|YyV`NXtYK`oP
zQ*HN*5+5Z#y2s{+i616@n0PjpKA6b{LK(REVzKS#<HNS8(y6`ip?Fq}jCMy8&xb|`
ztHWewvdL7x2<}icF)z+T6e!eIpio-@9il*?wmAiQhysP$<`k$kk8o~J3Gs%~FGaK6
zJscO=y$-u?zTHFPda3SHJ$5=(kDX4{Ly7Js-b=ifcpvdT;(f%s$x$~s>Ly3sG@zRX
zbkhKlKP$vz9H^sS=CIlPKesdS-<pRUZ?vPXbWWB!bZq{o^X0q{M_q~kyVjd?%*W>c
zTK+5LK|Q;D`;)r&*%w~ayOPO7I2MWz>x0R(o{dFye{(9G9E>NRl@7<^*=RU>Fdfym
z`dXV?TQ+a?ZEn@Qq4ZEQv|1V)k^465*t5B%bqi;D@!AErT77<Jv0iP_H)REn*xF)p
zpw$cbBNo9~78VU2w4DWC1XM-7aNY(`yF@(iR9OzxW5n6!$b7`}q+|YV;_o{+dehXx
ztH6$PA;$+0m(Y93pY6wu)x2W+S;(IUl}nX*PNYy%HS>I+Vf$IggV5&^diOj(D{<(&
zk^yTqjNr0{nr{H8Whm-5p^bW-bdyxSTS5QJ3LIac7W03p0{^H2{~d6Q2i}9NGDGov
zQbGSI>8I%+?6rp}%+q4=D0pCsXXDA?{%~?Qn@%PY(R6<*9`S|M#u2qK0uO%i%)+NV
ze$4CdPb6Q;(1V`p?@xu&p&_>MskDU3&uBd3_R@sU4a1WpOls92Oorpx(Q-F-?TcpH
zqnUU*8bRyDR3wy*s&Fzhs50^4L1+zUvT3--l-47L4-SP!1{dk*jAo))e<IQGTsu0o
zOiGv1sqp~hO<tuNi9hJz?Zh7eUPo=L5*7IA3jBNpex(Ahh54|obIfZHcgEjN+!_BF
z;u!xr+oknyUU2)~XLs^-;nYu8(0?WPqr$(N&Nce^rr>%7-Xgg4vrBOM-eEfnR^YD+
zF4ucPaJgPL9Rg=QR}y#T^J(I^E?ulECb*3MRl#K*io|h$*9t#t==yff>m}~omo~xW
zy1py8%tJzOsXtBJIq&;IFa7*laOvj?ac4e@75vW#KkG#vu2tZ-D{%fQ#{5V>Zu;tW
z@;c&}|9N_f0e_0eZ%w`qbqBA5ek@+QQmCgbwMd)b=*LTXLvYm7Yo+QC9QAFa=NDb}
zUnE`3q2EP%_Q(1T;yH(&`Iz7s4`2Uh1jl%K$j`XosORhUoZzSrlAiB-98Ze)ltUjQ
zJ}o%<&k`>Rj{e!tjNqsrA^mN^QO{gaKgUxfyH;@2=g6)T9Q}VnHt#3;LH!u<7KeU@
zY(sF=pCo&i;OM`D?o*s^_J4+SL5IGJ^qddYkCTqq&Fk$UJ;%%XJn1<u*6R=x7WT*b
zbEM~StlwzM)p-#ou9xje!EwD_(oYMHde&VQ9QBIq8NpFMMfNqpQD05AqIGlpJRg5g
zar|!5*E#eYhZ|#n!hUQ^DV-Y3Ysu#IvHuA9Z*%DD$TkGW_+zB+5FFR5liedY>Jy}o
z366S>BPBTM|3Lbj;HYmQdrWZDa~{qJj(T3txZtS2LjKPQj(UUa^Ma$ko$@{<IO=zi
zJuNuu`T3wIIO;pdo)H}Nd&&Q8!BO8sHlHuvuW{1X(mHs5W2CPW9Q~gqy;pGbKSKHz
z!BNleeTLwu&yjwY;Hb}&{~p0nf0Fb;!BNlei7CNRe}?pKs(D>`vULYPPqtTZ^uLDe
zHo?*VB-sYloX<M4d4G7`DdIg2JwHpu1V{gT4pM?+Jg<?R6CCxI$sQ9N^=zLJ9Q8%A
z$EoJ{Pmq01aMaI`eO_?%e}n8P!BKyWY+eWZzfHVIHRp#p&%^q!NXPxG=X0!lnbDza
zXaMSL+OA{VN=FkRUp6|DRX%v_3Mt<}CZl}mBpN8+>}vxPMes7{qhH`{V7(6#>VVfl
zNy~49zHoAAC_0>_81JRhVK5$H%$+O-8IL-CqN$Z4XyY>~J~|rkktGIy_{XASCzNl%
z2j_940j18a=y#g=&v@7sq<PQLbxHElc(xyh2KvM^AxkY!Bq6lvaxKx##9B+lZt!@1
zF5zx=%YJsyc<21L=?7KsUE()j{9^eVgFm=qk@>?t;`up$-M}yw=luFgfKYNAsBM<U
zlc~M~jm75A)62&+#gF@kb35n9_w~i*AIAYu_<P^B%H!F72^x#dKSD31MT#HY;jdfH
z`HuoaNeg^r$=_#N`z3@nr$g3`EwV<q;lKW1*+q#(ceo|a`Ei?_xd)^=R^z`)-Om%*
YW@&yh)&0;|Y<!PyD_&<I)ed*+AJe&gasU7T
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_estimator_altitude.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/position_estimator_altitude.o
new file mode 100644
index 0000000000000000000000000000000000000000..661302b06c2fc3f14784ce209afc038df264a423
GIT binary patch
literal 3744
zcmb_e-)kIo5TCtG<29)^S{sY0m(7pXRLyZYEhLI`)0kAyilo<4lZU&_-llivl0Eh|
zH6_rVqL2r{M*HBC;DeC#AFx7CgH*_a&+3y1zVubn3VAr<%<W9_?OqlX{FdI#eD*Ul
zpPl{gH+y6J?TMJCfh-Nag}q2n0Hb}+Hyf@APr&0)U%tCu*J1U37u4gXk=VMRt#9dY
z+ia~)KG0*gA5O>C|JJqJm~!i(4lj`XC}w`A1Kf;3?5!VSvAI8W$XEcYT1PVRNvl~y
z&dpw^PWG>ugE4>+8_b%~Vb*$vdlL}vPxQo3Bt~2GZtVbcV;=EWA5NcLx6xW@j9bi_
z)&jK~ov__AY$S|h1Bv@xW<7TtYPqve+qy8iUSGbqwxMT#p<Wi&pP~L>j(lC;IXz$)
ziH$b1wgHeCJ7m^ksO#)-U&4%IEzqgwYA^QaAx-h#gr;c?9l!7FJX2r(zA=xjcGy0G
zwJR~4&0(ky;B2hU#=YIj-T7*=+PCJ-;JwBV8VMbqPgu{AuXp#vQR`u|ZndJ$c5}PF
z{G;eZsQ|OHvuE<J-8chKJ=6AU-|LfiuA>i7b}Qo*f3)ONfXktvT(CwfrAOi^uMxsk
zr!-;NzRMxSQ;me+GF%<C?Kd1NKVvQA399&RIjc0m`o($6ck)v~0>+of#X7EC^sg}t
z9|o73ejjT>0^q;m)rdM#eNRU4qwv-UeiR;6CrT%r8ykDo7&!ONMI+<7CA(l17mQig
zGyH;Mj1HDPceYqU&$A0f-?9Bg&oM@l>A`erXe2q5HU=zjeh|IXsZ)d}hYY$hluDnD
z5YDiMwgvv$*^i~~djbIH_;0_ZW2NxwZUEG!dFgPV3G8hkQFwFT6Uf&TJqA|{>NM+l
zvBBTNMcFvxaz!ka)1mn(2lbnA+V7geU!nrMbcl<)YlAw?_#84cg}=6&L3-MhC~&W%
zc}jU+9eiV-A>Pr%2KXWZ|Ay;G{$<X+8^Naor|1{mg)E;0u9vk+e$ijdJ4qY*m!Ln7
zhX$SyP+9b5E!&xJOC|S%;=+~lE>cdXUr9mPbFNB0o+JpqJObHl$-Poh&YEntY<bqa
z3Q6;EK84_XIs;1?t1@@a@iRqxZp>X=@OL#{Eay?kB|e%UubgWGe4kx7x1;QnNhx@z
zf)BHQ1o`T&e3S8`Av~k-)xDKtyc78<o@e~IP@QT7{xRd!SFQ7@f~z_=7$^NI{~qJv
zzMBzser7zZ|3L&lj{Rtb>mO%4JWqr1@H|tD)AKqOlx+OQ*{4q#_3bo5c$s5)?!;H;
zBhOdrRGDwG75;IK-&JtxyTY-&Kf;$;7ef3T$NyHpywhR*hqz8yzrnc4R`f`}u>KVD
z!uq9eSijUQhw2~WxT@eZAL+NE;57fIIsQ_?iJ#*bl9g-ozBPl^_X1lG&vQyv(s!18
zNaA~LL2{;2fu!eBK=h&HFos0JlO?(L5ffmI!$n1HcYfZ%)8l_x23DahtL{lEY|;;|
z0$o&=%vqo=bZGCG0*K`grA^MK&vSC+xyt-cGOq4%DzV0S1_jEJe1Tp<hp=$I^bPZ6
zpG*D_I@BsH09(obJcLU<mIuM#=jQ&oSdh3BkuR``&VKXT<VG7zr1{Y^lKwKk_Yfm3
z;rsuM`>)|ObxFQpbpG$xf8}7nF!)BPKjlik^nV{QqNMP@x~eQ_S_RRUxv7?=KEnKi
s^Dpy7IzQ+g4EHCQ;d`e-!@Qw?qCi>FSD+`+*)M;MKV>RHWE;-^2Mgm@D*ylh
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/power_distribution_stock.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/power_distribution_stock.o
new file mode 100644
index 0000000000000000000000000000000000000000..d4c3d4247368ad3258172690681338b275547279
GIT binary patch
literal 4736
zcmcJTPiP!<6vyBGv8FNBnpBLbZKp9vQp}Q#wxp%#)V3ytR6_nhKxH$VOtWKlcb3^H
zCIob&7X=R~M(Dvq;;9u+BFKWlikBX|iO`cMc<8Ybiu4flz4^Vj^Xp{hAnLEozTf-o
z_r3S~GxM8G-@7>eS~`^iX({*yLQg0_<3QLqgRTh&;R)DX{qE*&2CgC6*j@ep2HHc%
zjLgq+MSaqzpfRap8j}=9zJZtYP3}`Z`fg77LEhcf?V#SyRO;qV2EKsot(9WCxox%I
zS^?-idcO-E90FMXG!55|qYwRb9X|>%f){L9Y1EyC&N+-}q@g*7alNQZk#>YGO}j7D
zZtjcG#^j~3Y_=<{A$e>3)KZ^{RP#^8hs0vT$-OZ8kseHJh(MdZ`F7{aYq|;(Z+3
z2RMg?tl2C;cIguGVwPE(#@e8HjN@=V*U}x(#NC?Qz&_1)t=(LawO#8pS7dG1ddwAC
z*PW?zH}7|u4|Z372=;Dk*u-^Id$DyYjNLjD#%{eFAB**%;`**fHcuYfVYV-_eM#B6
z@74+;MpSd(vAqjU-B(|Ovrx9DOWsuhfnE~@p%WA|WmAk@wTfjMAk3?MiQlhr-l%yl
z3fTXzcq1Wy(s=q4^aKAh|EJ?TkuaX5JTQ9x{28Nv^z|8I+I7qGCCjNAS6t8VOSW-t
zu;#f}oHF*j`I6(?^Zr%OHcsb;2Zx99r*rvXqu=r>gV-Ay7$Ba@8}v<nX!vBpKp4|m
zmW4n5ic@7`Pdb1M{)=lF%oJ_U27s#UZ5eoE4?Gr-B)&I)FX~fT-GiKQkh%CWg14A=
zv#yQpS>^`&dZi5PV;UMY&b@pTB`Hn69){qmNwpBFJbU?ckSF9f!Vt{Uu6e4f^6ceH
zL7tG0X^|P|&^*<B7fq+O?}u2ifmYU%QDDAG;M>S4j}fTo9#icnG;w);K~DN1*3o`Y
zyNg$x{!iqjuaOAbXS~7t(Z=c30a{qV6V!8xSAEB=7Vs>bU&_rx-!k+qsFOK36jc|`
z&5P>L)Xv&Mq3kZ!`Cu*-YL;hJ*lnGsEnI7z*{z<`zEpL5sFf`rAMwh0w|d1{9JT$+
z^m4dt)oM<4Q4ON5gpx?Yr)@m<gCo8kbc6g;_{w02W1qBej^S%VBBAV59Dl~C`uS6|
zZgPhm#&wftg1D?<5AtUSa5LBvKP(Wf$$iRmMC0QLd^UlXm{Wc|58Z#%x{%AgME-U9
z!1h#xf2lCgc+|6@z_-kgMD%wO^jXwVi{=?h;1`%j^Uo&mH<?GrUrXR0C-CbDT%L>Q
zzTgkX*1Ys}{yKsG$UM3)cM|l!C-8d-ye+N96U{I8C;bH1Pg_IDLAdDpHLl+$BO0eX
za(|l|C%wc>Xq@!j?9XbPv{JXEanc*?*ECLgIdK~rC%ueY^2xj;uMyENvoCR^r~ERn
z=zJxwspTQP%qu!y$rGJ#568>6WSo*GI$!nv2WV(@_4WBs<1`-nBZS&@Wm@~&U|;4T
zbw`*RY=w`p->-4XZ?G?MqMv0Bx%x`Qw~A<ePuY_6JiBb=e0$l4+=As>kSo^fkn>z}
zNS@D)pi3frN#xXzcjX7~2}N433H_Va`vG$EZlz*ZeHqTbwFV}@TjQZ;hjN<qfvtm|
zJLQG<kN9-P)4G`g*#62JvB~j|Bd0pDKi#Z*o_X{a<9MVl%Yz)!C;I|klrtJX!SQ`0
z(wfv4M1N+{xcJX3!65OUw210RJjGDEh!^#v_3v{1brNY!;su%5iCe$MV@h$4g|vS3
zTu8jE-wd+2`pZ0^8yqi2;>Dl9PF(#OA4CREl<HHg#7lh_SzLXCl42WEru8ZD0^Y_>
zT>W(_h;1(T1R$4wrAoZiZy=-kLwM<}#P#3MA@+GX581d|?Ka2D#?pV^JdIbh{(fZ9
hy+;JMAEi(AyF>NVr_>krBzEHB@A3RU5+U1Y{NKCGtWy90
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/proximity.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/proximity.o
new file mode 100644
index 0000000000000000000000000000000000000000..fb27f34927c822cc3e522d8c2acb6d79694d1ac3
GIT binary patch
literal 1584
zcmbu8&ubG=5XUFkYFneA7NyvO?+_#fvt$DmQxrB-4T6eP#e)aC-MpGD*-hDfm4qG)
zf_DQR#J@mq-t;8mpCIVn|3K-fhoJM48FqcH2k|Y-cjoiv$J^Q6Cs%J=D;5gCs{rpH
z^_T*Dw^G}km@dr29E|rqyct_C+AqPu0>E>x=r+CqtZWov^mJzU83c?l{DpwwI<m%o
z$vqhFeR}=TdieFMu)Y9tw*SS4*4o;tsI+d~6L)*PuHW&3NNn|Dp*m7Dt2=RTE9jyX
z`<*~ZU+u<HH0*k{UUM3@Qx_F44y$O@mX|fR9iexeT74yb&OA%cW(I!z%-geaCkJ5R
zmA5RcWUgZqpu7COj!)b_<8kKLHRYUnhWH$nDU)ik;84b!niZ6jne$(whzqFG-ULW4
zqw08<eD1SO{I<cjiEkME8Sx#11HQq25C&>s`%vyfxeY;bJqlF1ap!&zrQT#Olwl$>
zAuXw{1c~w@U#5{6*nIpbm*14_z{?cJl&0_R#-2Z*a~>sKz=5aJPiJ-7;ENQ0%HaH7
zmXMbyM$37!%{pKwgHU;!s4AXnhpkw4JzL4X0=w-g5A4k(0o(6|p^Q|f_Wzgylkuo<
z*eK$X-#57V?JVKGo|kLHU8G-x^L2gQhrcVH-#OyuANAg-$F8oCU3#v%=HK#p?wrH@
z*>}*;HERq=x&H%$bN{RsjTr4NQoxXO7TFQJxj#SuJTmj_h~Om^eWjhu;=YVdpplpV
Mmf$J}lA8Iy03Xhx+5i9m
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/queuemonitor.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/queuemonitor.o
new file mode 100644
index 0000000000000000000000000000000000000000..b09db56476ba91f9d403e886a911eba6cfd8b579
GIT binary patch
literal 888
zcmbVKy-ve05Wch(lnpi{7BkUG#7ZJDl*y=qE{F*xrZl)pq$UQ(k;=p?@CdvG&&3nK
zIknZuF#}jSe|O*A=kwp&_3h0d2*8d2K4BMG7GTpMSxYk*!#==bKEEWB#oYtB7h;{|
zX;G1tkVNI2T!qh4tco>yGRq6aGu22=W;6+tD4x+cA(K>=A$rkts(Bg{or$C5V%OW}
z>Ftc*>)V$bdQSi_gn_Rd`Qb18sL#JNyy2y&3MC}X0BHSMs&t8{<Q8-5DZWuapHh_q
zUDh?wOq3<BRDaRGGbbp~cd+M3nG@Tv^L#CJinHe2le0G4pIrSJmW<K<t3OArUNb`L
z4rYSKE{VSF-$mbRei+@mL47~k^j`Hi-U1vTx_j5D$TT=Kbrx)28y}(L(=$`(eqUGr
E1B;3|+yDRo
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/radiolink.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/radiolink.o
new file mode 100644
index 0000000000000000000000000000000000000000..55639c9769b21bb2384da3f0d8e0f8da02e1704b
GIT binary patch
literal 8320
zcmeHMeQZ<L6+iZK)3nf*5*S%2<FRIK=)jOPw3yNH^1;^zBiQZ~K_}<Meqa~JcKlx2
zP^d5;mH4B7U@g-=RH^RA9|TPk(y9%ZHl?N7m{v__>MEpZlYve`Vw#v3t0FDS&UyFT
z_;O=QtM+d%vhTgW`#T@^-1Dwa9!ECs*b)o`K(+w<9BMO(0!%(y8(aR+f`{Ni9F?Mz
zM&je;rtwGmOdtBy#IynB+w))w7sqcKa0dHR0kF=)E2XF#4E&DpBk!9xt53Y~$nAO7
z)byeEPfHynkM>XbI%0tdk}u6KMZ3WA^<6bu&IAuz->n*pNbmUa5d5QRys_tYtb0P$
zQ}gGS!XMQ2Pt<j%1*XuK$fhwEX*VGLSO^|&L3?fx%14`^JcPOjzX9dZ9w;B_fk<)-
zM97XCwx-Ar8ecUQ`#u;@`a>1{ne}4{?g#z2(?WZ?=<kX4g6pSN0F<#We|f3UaWrT}
zuFlLXL2QxqRmAVY#0s+%rTteAK%|<4^3|u{AlaBc^y}F;Ntx+G7bdzt6aU=A+ZCbz
z>f2C$i}tVtrm8o^nccn)<?F7nC-)}K=#p=H`cN&N6ibTTD8{aGtUFQx=+gJU2-nAP
z{W_l4v7TVLySWrKF=uE$A&hk(REi!SGRnu^x~E)0{GG7Kn*gr8*@S)tpo_STK6GxR
zk77P}ED#ZSP(Sw9<_Wuh!?>&QyJ~)xc%PrmC)yk3r=L#%BW<l)ULFiUeA5CLv6`@N
zhmpzqAx`_>Ff;T0(zPJ__ZvT!v?m+$;8k2N1>yXAO|b6H-rxk~IOSFlKdB}wQVCg8
zCql5h?NL}yGL-Xn5aNr`ekCZL3zRPtzoil=!zycvbV#m+c}_mu+1oSGTE~w7>Ot;o
zjviYi;&cP!M0)M}F>g^foDNbBkCU#ZI(nopGH=M<d#GbmD~#Bm&cyY-k^iKt-X5hc
z(sA=Yb7M!kNd8|JG50tILl`T2A(ST{gmSXUI@r?;yL&K?lA*~x*ISG+@|`$G(WW_I
zO<lVP5$n^LcdN!1&aA+>37bA9d*e!eP;6G<b88O36x~s?_Z#0${@LGxk<)k{beC)n
zl%gS&Ie{`1H@Z(s%|>|~jPk2sM2?3H|2~oT7y5*;7iUO$tlne#xeP56=VD{d{FQwa
z^0;U84aX1;uSwh4HEuDvrf8=!`D`Y4Ae;m!tp2*2dD$^HK5O<y<Nb-9-2;if?s#`1
zwtdfLluH)9Lcg6n;COvbHuIuWq#Fm@*zQqh)QLH{RQp`YD)VtSi<+}eZoijaWv*Rm
zKKra$NcDHeVnSTC+uu3YEci|$x9GYV63Mu|`CQIPdQQsM;ClH&LXv#s^RLe%@V`gk
zXag!f({)=Tyi}Ks;MU&W4QBh+Z#`$m^Z9HtZD(@kzI@U2(vI1^x=_sT%Vcp>Or|p)
zruAsiF(cv5)tzfQBH@lsv)wKZug1~Zl`9DkcbK%&v9@zvBZC4DV23{gGxb<T-3kuC
zz<>3cftvL8fDe$ByW0Ys1{M9yy!;sBv`%fK==>in;`j5sk9+D2xJQ|Zp}05Z;@`$)
z(o<mx*$e($|8vL-DEpF(R~VOm%N{RbpD+FI!8x@b;)nDM_%i^>f0OY+#$}{VGoEH#
z>iHSt^rK8o@_*rvLvYqdYx*xSevWa;|A_HP#-)Cm8qmaOtrPK?i~kuZ0fkTdr}lUJ
z5H9CZzkv=Ae#K|`KU)51Ipb+|u)^!q8E~&M6GP$8Tzr$Sr-rvHk_OzT%v3#d@o)Ni
zYWSccX}~;XCWZsZmuIdnzR&>AHNX!yz>hb;zt;e-AifYIZDCJM=Iu`!@GmgGpZRS<
z41V8$UuAwt<KJQYEaMjIxi2XExy3l;CAB4p*NfYe4e+NM;JX{(FEqfhR`%mFi9I#B
z-ybo4i}4%m?@w`F&(GgBz&~n$|D^$b6LC7PDj$@zHO2TX#$OZe!WZ!hCVq*pxcQ8W
zLWrxiwz1kY=6IWP_E6TTLEDuYX|~9VI!OoXHY)B!9S3cxng|te%2L*LJ;91+k_YM)
ze^}Rr*FCc?0-mS<u`t`7%Xl~ya=6&_jHucQorOfw&Sr<Oe7viE6FQ#mg1j3$=q6ax
z&i%u812HdOwD&s<&aE<Q0&~}->}(iz6(Etw=J&f?G>*k>_rO-iqkZ<~M{^$R?2L0&
z%OQhdXE<3n$lz8d=M*zZ3K-a~>lD2$b|zbkWZZE*a1Xk4RQ`C@G@ev%+Q#BFE7wU0
zABM{6vpu_Ld&-HTXm=`AbX>P)$Pc#&es9r1dd#!EOj7Fhmy`M2zRdoiY(7bQj8efb
zU8u7ZD>ztH*IAfj8~y3ezvLAAhK6en;Th7V`!a69_L6BxY~8V|r+Y_Y*Oo1@&GAIM
zyJyGd1h~#ff@sebAnT-X79Gvaf_?dya)9{~b@pdm&nfoyDC#L#ot(Tq#k`$LVwTp{
zaf3ThFF!Bxb<|RP&gC6IOLE+TI6r#6g#0~Ors4E*fg0)giWvIeaUM%O%{)(Y|0UKV
z@hs!Ip2G_MIFG6OfX7n5T)M=A#hRa=Fi!fPkYwy{DY)u?2zk_q-!6v!x5+r!t^G=3
z+%&wEW!f1he^mY|4VU~b#>wtV#jeHpBiMgc!DZb*{M8En1Lo`a6$Mx0P*reM4;GDn
z)8iasT#vJ<@ag58Y;6i(#n&@Ves)MQ_VEUIO2Io7ep<nwQt+&TuTt=Wg3BDHWlzDw
z3V%$&)jur`EBG3PUt(O3&+Clq`BTyG^{ne1MUR?4_`bw%GOr~6EaQ6qTv2fKeE-e3
ze!gw|r;hIbM#f3Myer6&z6ShljO+JCLD8c=Uxyhdf8?G>e~Ix3;`9PYwiAk;4HCru
zB;&gOuPc1@J~`ch{{iFrd0o=*ezyIgqDMWi%Nj2ER~XmNtE%wTd-#^ZSD#;eH}5xn
zzw=p`;`TN6k-7zplU+4#tqQK@$wtQYbFmoL?Zy>7>iG^ZuAk%c3Saf-Fyp#ie4pz#
zUC+q|dVZ|nYTVvsT=!qrqhyyUzP(Qx@E37Cs`FbJ*Y$TXPVra$*{I-Z{4GVl`dsue
zuAlEVMUNWK=M_C_ehzB*DG^>sF;4!g{IrHket~g4pJlyH@ma>YsXL+QQE^G3|61cK
z%7>bHLE;sjFVJxLe6?!0<f(dSUuT(TDtyAv@m%IG*`*Ya?;+$_5KjC_=3CrLzSJZA
zlKjiegRpyW*t3VQ_llxV%TdwE+F{Qb^B|nU(ig%*Sm%a|d72QtBfK8M$>gwriR`bS
zSQsl?JBwTbv8oUIWi*oW!@~~N^8bG`Q3Y;Yc@rXZTB3v3_<VUf=WofSxIpo=B!T;L
z3&o(q2StD9ksWz%@?7Z-C!DW89EtX!W>@0GRU6d=q*Ir_%<@4^K-!l&sAeIGT8q${
zl>ZY=lqTh+S_{``tlK}^B!rsP<VQ%#i&cP~IH)Ioj*0D($h|JV4e@&MAE1N5Ht2r?
zQ2g)3kCd13A4062{VEd&ab0avUSi+DK|TBD*#0Rdl6`u<q`b60j2PKpiyyUFM8>vP
zbhF>YrKa{;i2d~n%irKUcmUBh{OI<Hrk@=tIQbBL13alMO1oke;9(qS6n|+O|AF?R
JByz9I{})MeHh2I4
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/range.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/range.o
new file mode 100644
index 0000000000000000000000000000000000000000..e173bc95f5003326dde178192c8a4d404b7ea0a6
GIT binary patch
literal 2400
zcmc(f&rcIk5XYyi8dM@GYDh@np+q6Eo3@Dw7!So-iHR`;(O^83rEGu1wp+H_h(Zuf
zdQ%b)9`%MdZlb52JbTf2#6Q75fauKbjD2pmCl9`6J2RjC&YQRM-tM#P?VCNZ7|4jh
z2WUq^0Tz$6{j~3<p%0G3$QfAajlul&mpgNq_i7Yidm1hcL+|J??7iDi3u?V(<i3q4
z<Eww69u7hO4#2$V)xzRBd>`E)-ND+Y_gk<zcVNKw{t$fJ&%pMN0kqGJIF@~Vu=aU}
zbgoq^+6W4+Q}fU+S@}n_tY)450V;NZFu3JniJYgL(D0mkPLh#tktkxEk6?uU7vJo%
z9+=5wuB!2wJNMMQ<5cn`t6WnB$5md*R@3pi>lDfr^xS-@?Adv*>Dp?_OvO`)<dm6A
zsd3A##?ebmOb|DditZ#6sVm(I1|0VexAEt%D3uX;f&dKsMGXUI3Xh{cpemiifWsZI
z&nMk@=luPsk7;#-{9sxGw8PGog8QBPoIg*Sw^&ccfL<*M+zV(<YyBB##bxFRjul(l
z2GY-REc*KxpJeuz@z1uIhp|-{TLwRBKrUBtiVZ&ZKD%ps!Oa<QvbB|_-L!8wk85-E
za^0$B8(z6;d5#OVcq{^Z_k%HjTcmea)^s++uXWL<nTPci=0iBoDfY=oN9mK*?mB>C
zjd0OPzliJWoDAt@-D!=JzK3J!zsx_#d?BQlx+RU%Iu*xtjnn+HrcI5LUe^6W<D`{m
zexq?>369@tob<;y-qkqi<@v#EJgIut5?ap<Y)L%Vu2`mLuX<oETb>2xQlkN;>rg=Q
zq&bNpiSTrp{;>ix?^LU{|4HVG|7H}X<JSFoZka93&Z+>mCqwZN#?*&&h);6kC7-@G
zR7du2ko6athre8Vd_Qbx4t>yjO>=h3m-k3=q`t&SbZE|$0Jc&;6XKFD>&W7L^27Cg
zh`fcDJ|tgQ8l9;A?Q;KSxe)b_&Xwd#|7MYqM9wF={%CRDLji0V%kq3H@1QPK40kz!
l&iM(v!u4rg9nX&J3&SG%`jGm<=-U&OF9-602-$}7e*+Gcv4{Ww
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sensfusion6.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sensfusion6.o
new file mode 100644
index 0000000000000000000000000000000000000000..51584dcf1f92e6ed6a2cf0e47c15ebd691c1148c
GIT binary patch
literal 6128
zcmdUzZ){Xq6~NE*P0MUSnWa<^-22|Nl^GO<PM1H^V)S+TkBum$3~oWR9m<rM(9R4q
z)7`?Zv251WC?AR;h8Uu(F|n}w0ZojUO%1v$OQM@>*FQnCiLh&cteeP+M4Ao3bKX0b
zo<61@{OBcj&b_~T?m6e4d*8dSe7$RXca_fvy7=H1FxS%*ps;+dZ97dHJ_;Y9)}#;Y
z))c^|5KQ#p+}4Z6z@JUa_!Ctc2OQUIr5~0Ket4|UdSt42Y<Q~geh171A*@I*jM5MG
z>=`Sr43t$^(e^9^npFtvgg>r&QI^1--i>u5R#+KU-$OZwV-46|u_~-47D4j6fhP6t
z*6+Oa?)8`cwJ5kwk*(Fi4ayh%jQVBmMpfKqn1@mB#knum)SG{~{<wL5TeUgUU2mpp
z>dfB8xVp6zrh~O%b?sIAZpwe`cNA0TS=beZgFhgC>;0g41LOHxAgoSf{R!5eEe@&4
z#jWbYKuq1Z+-m;x)tGtgpCR)LOCU)xYz?%jS**0Kw%Rr|j{f_wHe<aqxY~Sc+sDnn
z+N(^6#BmI!6Ok6xhw?w4YEx|}X&&iX5H#Nj1kEj94VtvR8@SdRxYlYMufkj=08T8!
z^-?}(Fs>SuxDT@(w%yuXyG3oOZBVgVOI2YGu4DDpZdO;ZHq_RemsZ8hYcFgvp{m||
z=i7B=&G+lf5az^sZn>F=Y*v>dn^Y*WQ9<N!wKLG5W;$!kSf|enc7iE$b`5hjFJG74
zd?hd*z<LR52rJq65w5K{V5!#wA$1Jfcpj!NVV!wxjoEYBGJj)NnW5KwCiua;5echA
zq(SxgF+TyAwwJ)P;e$=jqa8X&bPn5XXdMbJGS4gllWgHRJ3(iV_JHzAdF)3S$NJL!
z`z!Q$_2c|+;@AsVzk&5C=K6V*WaFZfcbGnd(#HM-%0c4dyc;-w2y=h$nODx<GvEXS
zqv~eZ7=3Spe>5{?ufM&^clNdc=l*T@&K+7}Pv5D7**iwnxnRgrZ&X7vU|V?hVRAqE
zOko|wnm|88C>v1%)=pd}j^WxHl|P8<3;4{TNy7{s$NWSr%E3u`w)Au6Lz~cUskQig
z1+az!YgK4vM7>z$<oRS3j;C<k#+tyf1dct&V}SiTb@uFg8#+e;`OR?0=pc^W-qn8g
z-ZQ_QqP0WtvkEZ&z*j6aBXT+S{KE-+FHBY+x7Yh|%^{4N*5dP5o9%wTX~i3r&LPH5
z?+YiV02801nqOvYedG7ru?<j4=Sst4rEEU8nYwVO;0QRBb>;q4DZMu}gj?X2QaN83
z@J_;^!%w^8hw(5_IediWQCA);rk=`{kKhrR*Wcsm@6~;DxtDzFezx>PE?Wl3mO4@+
z+5N>-Iemb}@N8Esiz-rp{}+z?Td^#}Cn{<$oS!ud=r6=;7SLbFFZ6VDv{{j!FYdOI
z`TWRGCY8-u!}+3B&ZMpO^@U=7I6H!^;!q}AP7jsGifOAg+Ooc-Io2ADwOEl<adbVl
zn%Ax+9*tQv5^HYRv_K$?DL;Pr;C>}7qvA~rVBo(>#Xw8mveW^Ucfo*auR1Jq$U^*K
zzxAl^6Y=N>Tsyiq=Z0QRJ`tym?32v(3@ty+JisP2k1=23;aivonQQyhHQ?b>;l}we
z?{w_UaZ4C7Ku5z)P`Gv;=1)3y<~YA@oQVe1&Kcm=2+Cz*-&Zn!mbt}!z3$`8o0*@g
zavMKHp>x1Pj`%tLK8pGO1Vf$A3(WOrp60JOeC}jv{wvnk@oD~R*4Hc6{B_okproSt
zAFxgFG&yvR|Bboj;s0>B0ebz~&IiaTZ*TJY<2<hx_l<avkFKBhF@&;Gej*F-DBH2v
z;X1azgLyA=9hbbQqC?O$4owH(!R5ra16?xxK)-vO-@Ws%i-CcW{K3+^+iPH;kSeA|
z=R<M5IhT&;C)1^}3}tuW0NzA9VW4OGjzs(RfgRo5ySkDC$@awdt^vTy@bFQ(8u2zP
zKb`-47P7f=8si)3PK=B85z#*CXcnZCo^*NV7`iFu@S64vbd8Oqi+#O&AXQG~T81H2
z%I1bWI_-FuKAA0N@?+&5_Zs#nJdt}UnJJEy${qR90)7yr%IK&&Urc64@XDQ6>TrMb
z8KD8){+NgBv*6_xTl3m!V(!)7CiGWvn?x_SThZ@o!TSZ*&m^IJf<MM>5`)|(JM=Eq
zWr`cbO$|}LFSsT6I@F^=`XRUJ{Kf@u5WFCGqu}_*pHsZ+I?3Fdw^PjPQR=-Q180Pt
zdFv8f=HX?*W!@(F`6s{fw)!#i$2|Nzb8j9l2;Sf>(fQTy7qTz+_m4tf?(Y@B<+|P$
zT*m)*!R31O`^%fp<-AC5K9kJ7arQI!?$<uSWt@Y8%Xl(^%lJ<+Uyb=$Bl31p@UY--
z3oiBbd)B+&CO$OY^+uSJKAUvB#F=~dUB9ojef{1}3Vmv7uJ1GYuadd10sxEGqPc$l
zBZAAk>3d1*>-T~!^yT@{<62+8FSH~s_bVgpP@IF@F9<I8YeI0+*Ym$6IOT!U0;dEg
z{c-M}5u9`b+&?ck>1(?e1ebZfEI8?Fe{Tvd_xGycq(8;|n}X}u3EdT(^mTmriQp8<
zC+P>>E(8T9{buF?mU>^f3zmm#I}yPfwKB@M;ADR#_ie%D`@C0h(zm$ZFSyK4MsOKF
zL`z3T%c=b+%SBgabgP&iNkz-)@iIj5Yas>E{iPB_i+SphdMp~pE-B&nNmP7oFm*mr
z=JTQa=x93Uy_`9=|3z4+Oj|;0k;UfDKDpV*bpEw2JzJz=YrygfKj`|suoyY{(fh3T
zWeszgV={4?{d)a*!hv;c(>woVR-|!Ryz||^djMLb61LB?;<ShB_-QRvy0B8)>%YK%
z@>yDul(FdfZqLmdxw1828F|!g1o{4={Lvoi`8t1JMpnuHByZ@rYv#ePp0B}|uu;i>
zyw26Q$cp5j=IZ&{e-0V>Z^kN1fd8X~;*&+ELrPwvRD%r9zr~5A<Fo>+*Z(8PytyYs
h{S+{kquP<%bz<eFBPh+4=HKP@^M7kSnBp-9{{?b3g>wJ^
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sensors.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sensors.o
new file mode 100644
index 0000000000000000000000000000000000000000..8c72285903a6c5558c93c13f190afd9782f6150a
GIT binary patch
literal 2672
zcmbtV%}*0i5T8;M6gBu6;}=UpOi5(Z5>3Q-SU!}HhzG%F;(<Q457^jtar-b5W9)%H
z0242s^x#4L2Rvzr@#@7W@!)}jH!m7ajUhU-`=*pfUpP3hJ2Sue&F{Uw&UPPPxpuWB
zl>)XDyoJq-QGjgwX6(hG2Ya9$HXgozy^)3|>m5)-c=<5E698|Z3UGeC!>esP{P1ce
zJ++FprvTN@(CXD5??&z;=S!E9{z^T_uR*(4`;~?_(9*R^IA8Vpz8&hFUabq@_gdTY
z6SN-px1jzI>JJ^E{uaCb@#gw?7R%k(-+hYescrrBy0b&QXNP)bhx)nZ_4@f_sh*r4
zVgRGV!<U@Q==Gb<WEd9xIT4hdnJ{wHoOA~J=A&>XC}I@(bAgh+T8N}G;P&_RXLAE?
zuHVUssMLp1wzrpXH|J0#m+ik0t6Oh0JFW2hZ!<!=>0|+<@voVsQOUH97}!3c2V#6X
z{~+S21|9A^u5lh~_9T;rUF5b{A7+Od_J3Jd2hewJVJ68GI^uh}c0~KT8qXVeRpaEz
zXn$nS@FJZTl%TQBD~t(WArOu6cNi1CMj#sFpD-qz{>d2sjxphmf&bLFXW)M{o;UFQ
zn3GP`z@Z|`l`yKfKJ+|*o&p4wv2vh5_$s(B$4c`>S(0TXR1lV#8x!V>LgBoYhQsnq
zFgq&ML@d<2V^UTWcMnE#SQLZlNGMrga9orZW^m1gC@9ZvVf*(Mf=Dv&mI%~{P~wIZ
zg+&G_8C{IR#(dEC8`E(y+n5fCP4<LTNFEOh60Y2y9Lt@b!tE8Og-@dZ`{;&t7|*S7
zdU>Xf8aRJ%#|%7^$iPX&lV>CWJdLwH&-sYP&uAUS^A>)=!mnEROBVhM3;(5szhdEk
zwD8v~{2vxRj%;k^`Lt@>JRirx@3HVb3xCAI&s+Ef3%_dNFIo8DRu)T2Oruv(;^#Pu
zWKp<EK2YEm@EHJix>5nx4@>lf>ht?w=b!*>ZMPxh>HMkQH<$T2;QS;8t$2A1XkXPo
z+4K0qCnJ55;<@JE)3X{k-#A~4b&(dE37<ohG|m2RnrQBq*H6>{au^Ub%YgRWf5*Ui
z{YI}p;uhvb4Q8}&!|GnVczyo-dk{1CPC|J)RJ7B)P?E-b)nV-DecG)57cGc(DRK3?
HAqW2e{^~j=
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sound_cf2.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sound_cf2.o
new file mode 100644
index 0000000000000000000000000000000000000000..7adbba040211ff555d568e44530e7eb26f887fe3
GIT binary patch
literal 10312
zcmeI2VQdt~6@cH}9^@J*7-9&56t9Uv(1w%kLW5~kEtmwXG%dwWg+$SL@4V)&obS%N
z>%<pmIFNrJ(Mm=^YNS@GRrLqZDB?$x+EN=i?H_(rYDAlqA4nlhek4DtQbAH$h0^zC
z-t!G>uMp)&f8de!=Dly;yf^!1c5iO%V^4qcnPegXQWEfMXlOzKPPR2<M~MzBg(Z*#
z81Du+?SM1orkp8A!7^;0+5xcDO*>QTjvjl(LYq9=?3`{rwe#8!{xnd?-Q1OcUoEie
z`ydUAa*#ZA%}Sl$nRfowx_JFhV6>&T)rQlMY<X|m%D&fPTkpzs>&RQ@Zdq^|$2i`K
zKCkyC&NZWaCJCpnTFvJlK{-Gfhj=FW6f74zYRfHwDdGv_{i~gtyIkuZSn%ckb*Qh@
zdjCpi>ey;6w=~1>YXE&{KXtu#$GKZaes>mqG?Pv1!uoPJnpgu@Gt2tX-fWlg(!J*>
zKPmJNPR#~b1Q@@i{*7TL1+`Dm_Xk$u+0>2W`v5N&ptcJ+#b|k|W%%Ol+q(VVm@B;Q
zXve&u-8i6MWv}&SiB0vbBfnMo`t(5Z+zPaP6LT}Y)|tYI+e*2+ZY9p&u#)FnasGCs
z6Q}GZr`B@Q8pig%md~x><5(X{>U;b2z)rmX-=9@;l7iv71$}Q&u2b-xiM23gwofm_
z9AdxeBy4$qq3(b4_U%WvHmk9oIg!LMOrF~3V*SR;$u+IGZXo^cYL{b?&*_LyyvH*%
z_7Bm|`wwfMB;R?zdVSEn$y(??;dFroTi;I9_c?gE8}!`L+D+j_^FM}j<oz5@TTs8`
zpu7%iigyFssQ#-3=f@V;FV$ama6Q*AwQ{=+^?m&(piAaHx?Zs_%}<x`1nM?EAEHye
z5#D)dVkuf;sTRY00qY=ibH!5eCC^tF{7R`rQg3CXJkVDh5+0C_+#4M9@*zN(g+bpN
zCi@_)RI_4)`VaBKF<=5x@EKlH(1djw)+e;C>n7CGFpP|JT{mH!hDp?~U_atlu&=gD
z!fo{VAeB+PS;`~jLax_gAuLEVDZL>lp$Bs%*TICg`6Ko-ZFF82s+^MiGqgL2zJ~GY
z!RsLA9&nyM!RtwEUyto8kW;+Ra2^(L`|H>)zG;3IsCm*cdlE^Wzk82!KjWAyCx9;)
zS~HTzCovy@<1KUjpsgpo`THu8$4OiV|G6(u4|ZqCBRx;^dHmnkg5;6DA81WdJ^xJK
zdp;X^OsRMG{F=P?98wR-BYhXq_bGk1E=tZn<M*0P$>YjY6VNrk9`7}S+FtTV>v27=
z$%DKuC$at;Ui0tEyXUr%$0X*F_S#9@D<|>!roC<w^Z4NXHo1G&<}LnT88{vjcw-Fz
zehl9f!|O2|c6WDgw>R$o*7J5>rBccl++x`ttoU|V@a!F%tA1s$SVGCq7m6XCB#ii;
z-IeLw+}YmImFeiTH@g1NW|Z1DZ6coOu&Je^y>n|^K+Wklati)2=c~+`^P~~*s0L5X
z<|vl>ZFpzH7nMp;?kr8HCJp~|Mk2+61tQMWYm_vbuSHINs%%Mze^egFi@439zo#ew
z%?t55^To{DnU6E4U%OPc;6?Tm%s*08e^_{)5G{I~v-u7*Oc?fi*x$3vMVGpd`8Xbe
zQ4#K<Onxr&6bK(;ZgYx+A7x(PAqgL2e&Hb$un7MV%H;nh9cN$>{wm7Eore{k;S<bH
zF1nNdlKDHFVDY2#Gkg8Ksq7n^ZyVlbF1plzU@r3{T>BS_MqHL+z7xj!6pPE)PF!@U
zKV;5nm}&nzb6GcH|4-($uBiy8{TKPiGjLUer+7T8B76z+$0Gbu<~DOwRawitjdk(A
zfw{c5_HsK_7VxASOy_Mj?^J#oydZ&<pD!35w5a{e=G&E@2B&?26bp~sqooJ!C6{K~
z^D#Ud!}Bq`6vJOYz8q&vp1Uy)UXQUKi{U?x;pbxbTgWM{&5wYruZzsvBm6JS9p*Cc
zpw5!B`N7Ui9@<8=s?Vd_1|Te!LI{e!SB6}z>IMN+1_xotD^&(+)skDoQ|lMp(&3t4
z^a48K_Fr`U00!NBSn+Gw&<jEs33AzdrCg@dY?23xfvBa*i#az8AzwI@9jKH&$h)Ot
z&UZs^KsgIXs^GijLtb{!MNe7`u$LZEHVC~ci|TkB2M`wXSuNLsEFYbZ1fDOlI*u<6
zsN;96^yxg^rS3J9$K&@9@2VK|l#Aia>3c{A^gBoJOy1{{`2e!ns_VN$0iVW~Du;G^
z;dfoXX8^R^Qx3t+1&|wg36K51jVaUuW>6(vMR=~W4@OnKyL}JuyjR@=A~!gU{`!jf
z!`(C{Hrnl#J-?Xmt_%&i_;&*3r;pOCq+Tz4TL0ZZ)Mxn51~ZSuBe)J`<{qiYD<WLp
zV_%AJc`rqI8%H4jUzv#pAnz0MZ*qB_$-eQn0HE(5Dr9f+F^xg&Wqc=@i@or1!(Q%@
z&>6$t<gYScgK;}qrfPy^i7W5lUoe-r!Y?q7`k6NPS6Qa&ofv+_;9FRx>ITcJah&E>
ztr>MHQEoG*@$;jv?An;q_)Y!<^T#55Zw%khJQ}weV?P>WPwz`AGESKrdS6nJ@d!T|
z<45*mG@h^NuIlqO!@u~Th6~Io4<^S=oGMYig*nZyng5c(&A2~hPWNT{pNR24Y53Wu
zhoC-xWB8%x!sfPVgR`hwF0w-7H~F6pZu+^xobIcOeN*+3!M7XybAx}~;PQPW_iJ-o
z8!xhzoCo3ZJtg*%qb+PN?-}6|ivGoch9L7T&!6xKY^NgcAL2_;m+$Fz)rxy9_9OO=
z!O4DRe{67yEB5;hPWH0T?l-t;Uo|+{%YJ&);HJI2-(>u<FCUMwpD;N2m;LuygPZ;*
z4Nms5kDoTUX)o_98ISDOFUQz_Y;f`~`~GVNH~j<8oA{UC0cnGq_Nxp|{-xLkC;K|<
z+ag@-_C~nOQ<@#pc<6a)XWfqQZLDuJIIUUfFYV&TVLPdblYJZWy<Cg^9@h68oE{N*
zE(!*xaY}#41hpaj-vg{eU)KeZe6QqYLT@yL%zzuZkjdc&FXLB8A@h#RHc_!AW7UFE
zrc}Yb8bh@W%BUR&Wb(K(@o>9xzr{ueG$qkr#tt$nyUZ^w)SDD-e9-R-%8k=NN?OG~
zlrD1OXx~h6WS&;B{RZZdFfhg-IxbpcW_bb?@)_+v&S2CuW?K_=phDv^_af9T{ST00
z6d6DDq2l00a&%nRIQ}a0VL?0TkD@Bi;V1Qvjz7Izw-+RkR%i9!gM6<1U$u3IDi4hE
zPwQ3UOa61n=89j%e*&U%xBMMMo4MleeOz^iX<Y%ur(c=T_!VRnU!HdqRr#3XNAoY~
zFzaaU$-$mx_QU5cblydC9F0$7isqhrwy&m7{9cwoT2*6ZQB}+EbFThPZQ3fDzlb~d
EFJ)2WBLDyZ
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/stabilizer.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/stabilizer.o
new file mode 100644
index 0000000000000000000000000000000000000000..b801696e1ce13bd23385ee7ab54a8f47aaa8d113
GIT binary patch
literal 17912
zcmeI3eQ;FQb-=H7WsnI;WdxW25l?}{GDTZK>{@c2_(|eJ*nG&+0y1`yR;wp=!%DmC
zuCQdh;|0q$oid4Jla_WEXR+f}P)~<x(y4G!vNaxtKiUrUxE|8!qzh&oCXG8Z#1l~)
z({t`SXZPsszB-z^e|XZ%yuJ7Q?z!ild+vSr?cOJzUbktzr>snIDpP->3KCPL8opjA
zo4RPK<?74o=Kk-W2&nX1H@#|1sdW4Gj<OTiuY1Nmc+7L+S3&QI8+*!6e3-cH#MQfI
z_5bX5X7~U6zKVWmeuS=3=xek_sj*y#x}lT_mtB|pkve^wQu9$Rd&+z<=dC))b(g$q
zrAnpSA6%;9>eekk^6Or85*d~+L%kR5c7xqZ-l~<aJe6+$3i#Fw^}j?t(8+a}H@NTL
zg}Uz?RAayLddC()JNBbYjkaHUdOWT^cci_0^>}=xx~n=k@lyLU%g5stQ0{pt-Tv}>
ze;yA*8T)$}au4M1ZdErf?@%|E8Qy=!zAkweuFQEC<o#a;erL;-UosEG@0G>ojdy0L
zJDMuZ(@J?Ct|?b{q+cjI-BhVSMmq}Z%-43%M$OGz{&f5L#@t7@?q!Z+&+X7-gP3AG
z?U))c#&r9vMmK+se|XE!{vOzAo?fQP_GA?LShf<|;FaEK`*C2GOZ_f&`q;rTh&hgT
z>B$f0;hIoK4*ZolSzhU@HoraIe&DiatO|U2X3n;{`yp2lvuB$hsjI17QGNIYb23<Q
zcXcyd&oAz%8+qBBtby{Y6-M<)^M<L)IY#y2+l}fV$jxx2-`FtqQ^?Q3Rf95IuTC7_
zRr&hyU01wwPXwWS`1J8z&5-{Tt~cSTflI+vU#?QCDpcyOxhl1yQl*wJQYmA;N_}~$
zO4S%D^=!N>)$KJWKYHkEe~4q4YZ}$LoryD89<4E|JI=nic;{?&$5UsI{pk%@WBaSr
zSXY(W8~7OJ1lrB5Tvh#F-aAh&fiW&JjOveee0TAK-X(kXLz_&Q@^1#6#P)?9nI@we
zZK_4TT|EJIbD)>@s)xG23TwQ6&ax`iSe@{wl~051ozTZ6nDdvPYpOd4aX!}Lg;;w|
zVys{MM|C>0(471b<mQUn>Y78f)e3SPJCFI`%Vntpe^!=CpDasZpG`0yBQKPXjV^AQ
zyzE_a@?DrW1LgzmU4r#`c<Ix1&mA%AM%FY<K68K5<iT$=P4XOY+z&K2P3rl9*z>$#
z{4wqra|8G}$Z=jq;KDg+f@}0GPwMbHo)pf-^Z(*WJ@*q&>e<Vl)X00D)H6Txqz?Rt
zCzbvM)PtXwz@M~d*4P#B?_KcoGTlp;wwgB#WuDHesryv9dc;ubbhlFX>b1URRwLhE
z={4&c)4<Ud-Zy0)rS}Y$)fIaWSyrz09)H&^LzLQ$x!J{kHz&K;xTu!oF5lAa7u>pa
zC;EbIuR;0d{vV#ey$|=jD!BJyuEqk}*Ea^d>R#Au^t}W3Cf!5!{)BD$>ZW@N_l;R_
zb;CUb`<~txP1wKA!SyO!xJP~u){+<YTF=9_9UN!(_F0YBJDN`1-2cXS*4y>Y&Ha;k
ze?F*EaQ~|#RZG=8%)z%gm@goCKIK31sJ$OlnKwojn@{$_b!ql@7aK~=vF)DKc5!dO
z3);heoo<J{vl074c^Q?l9>;<EstI%PAn{v}I{Zz|_ZvF`;iS<QjT;GTAOTr05DE9h
z1Ici7z~}R!bGBZ)73du{l2M~CGORK29Zl_9Hg4H)zmZ4=dcu+LlUCe_M58eSY*<D(
zVMP1-jM}e62Jc2&n9$zFO&fQv!zTkIXqdFtC6eKO$ag9=WMef<`ID6Iql$f0v5zVO
z!~?_w#P<#clGqd-X^%!CWJb$v;bbsG0P7zOJOO@0V_i;XKxZ04dt@s{Hin@sroH6H
zUh-ov`(am?u&<k`V00jfHmx|x$#@sq)c%Od{=janpg9Xbb`Qs+SfM!!Aom1p9!S_j
zPg?yk)QiQfL}D;*VHuNd$I2iFg24i3LF@4Z>uQw@#Rn4*;drtGre3M=K++%GI;dlg
z8rm)dk5+{WCgYK0Aimp5?$ic!y%R!B0ckagL%y-H?4=T=aOrwm^RxB&OSma99k8>a
z&%26<4Q9&IE_P<x?`#)4ZvM=)U)W<yrkUDt^XLD$9p0J7(`{Zp>wKnh__Wr~XQkiS
z_Hrru{IvLnBFi>_-)$vRx+ML--#<UCdH+qbGt>F{tnVjo{=2PbH~pFNnZ~)+<vyAz
zck5SeXlc3MsNJw-o8gZ}Bf(H0JfMGJBtw?bR2Pd!`@#_@#e<=6(h4TwtEkcFTT{2D
zes!a7^%|o#5bv*pQvKa`BloQ~ux54r8vM2QKP3D*Rj&T?Rw)&4$rCg<(Sd)Zk{2wM
zN?uhwJ73U>#rzJ<=}Vq4HXq6!=?^ts4!jKdJxWco^Xx{p{bD~`w0?oJ$F@F8whjF3
z)cOU!l&S`Z8zeVSjz442A8dz-TRsnE<d17w;D1ECo4B9yW5g#&HYk6M_(hTrQ~uY)
zLlg%JgE~(<O?)otUm$*%IA!W5#PP>3Ciee*D5L*J9Qq!Rk$=a*v8`9ZNq{5SaW3Y!
zYdZxFhnM-}RkQPDF4%U8d9Ain;PU?Ts@u7FKDX@@^ZT@&0w2n^z;S&}NOsY-Q_P#S
zodTb3=kqRhiuo38r@&i9ORxGZAxVFVdAGJx;B6pt@+$l8V;OUMT*W-D?G$*$G&^vD
z<Vd!iV*aeQQ{dC%v%q16{VC>S+D?H_w{xe9onn4W+bQs@Xz5j76p~%E$5qV#Qrju;
zQy_ElswG^^=eC_<epcHlaK68>p;vt=-<}J$onroDZKuGe#|KWn9O-?~uXHdJE8t+P
z6kp`ReJ=d#E_|H}-{Ha^bK!ejc-n=JxbQ!A;jg*yzjfgkT=>7a@b_JKIXt>b#UEeX
zl;ZU+e1i*r)P;v!_!BNX<-%WZ;oDr++xK1c-*n+`x$u8=;lFU<x50z2R6G~D@KrAS
z8^Gtm6Oz9IjnX}}*+u_R7anop2VMA|xbVLKj{c0&_oq(s=XDqTb1wYHF8rzs|Ja2u
z06);5Yvd2dyq-9Jh2ZZkn~7J_R|WiDh$#x3+uDRa3umdmpjy$ZRt&+}Cm*l+1BpE<
zn&=o#;2AcZxgzXH27-H<2mAWqeA()^;QVzUINSke-TrXD6@}wkJpb+(j9Kx0VR!-1
z0;kc|P*T~i1J(wTfx>~Se>i4|<7zEJXGshFNLnq?etouV^+M}pED8t0`GTmUBkk$V
z!0E9*Jl+I$z(4KOjzD}MJg|FhI1!5khQVq$v2h@rEICRXDGjnP{C0G$t1A-So#?`Y
zY%1!rZYqoObtZ+A<|49_P3U8Gs>Y*uDi*pHr0{a1Bt)CBKs?YdCr<6tQ)eZcVzEd#
zs9(n*@k3vU;RGDz<9nM9I8INht__>EHaBhR+PZ#y$2xx(yj|I}t_!Cr5sg@FgYcpw
z05czp!*ukiA+)l=O8UdWJuT5en4$G+{C00^Er{~Afn+#Blb>jcTP^fD2%^6k6sNBh
zJsb8yNuWQtTJ(FOyn*1}!7#jO2w8zhGSm?YL?Sz^_Q3%^oZ%BBDWL`vRuGpY#1P(7
zOz&trc+rcKIUVC-NhIxIz-t8vM?Ti@b^r_svEvDRUE_}`P{cKEzj1M_XnR1@+Nr)k
zPofXP+20=+=(XYyyAEF5L3nEuPQaV8rhQTHZy;!Gi=mr&g+%_gvMXrrHbP|kA)>M9
z6IL8=MHqZ<uNB<0DY|<%toU^Ufu0D|Pp6xsy%wYOacl3OzEMcW9}n-|ZN<reZ5eKy
zWIWt6i0|^mP9bNl#DF!@p2_x_7LQkBy{1~?7LFWZ7Y>Tf^i0zdvCGq<t5M+|)M8QJ
zq~we>o1?uBg1$~}Z^DUo3-%+oN@qLX7IFC`S_YE1i9lFeVfO7;bobD9yaXPF&0>RY
z5WGe32dG>H`fCL@1*b=bCakld@Tk>%6X`bsUq@xk+Ng~FtQVYre<R-@c(>4(zr7-Y
zZxs45!5<QQL~v<;RPcv|{!uDp9N-a}Pk26n3CAn>4{WT^e;zxcGsMvj#*Kd$XNhy%
zm|qb3g<lOyy-nO1&x^#J@#Noy*e`t5%BM<@F|j|UmXtDxqn*vfFk2<~7QyQU-zvB%
zIL|d!uNC|eq2Edz;~>Y&zqg$0At~&%3p;$Cg8ChT^Z69V*`&G**>T46d&0h4pZq)0
z8J{ykU&bdZxQx#Q!FkQ2OIHNnMm}P8RdA_)P4MkPzZ`zQU_w84*hT$`zaKFnm->d_
z{GAl_t_c1p0!r6h_*z<IXkY422yVYgw+(gE&4c=nv2n<U1b<xcH1RKizFg0TU3f;=
z`F&yMHNkfYJ|TFQ;AaHy7W};60m0uEyhre#3mz1FO7LF6=h7zY+<z*GJNF-hIL5P2
z*r^qKx8V3a9~0`!b#jm3AzMX%HV7UT`~kt``dllxTyL$!aa^>Nw6#rwFBbOwf@7%o
ze(n?;i$m1rapD*sX}?==X}?!+X+I=57TNv~ag5tHsZY!@g7dQp`MBWy2q>Kre1IY3
z6M{zt&kD}ZIIO-#oYx8OgHyy8f}c1p=KQ<Psb5aN>zw-hdk^*HeK()<opu%xciyK<
zUF`D^@lS}8EI?jCW#sa?AUO^Z&%ZDk`V-E?K_B^1lKHuc9OGaRZ=js@GbEdWqy7q#
z`B}#L<HS21`rKbgaP)`w*$M~GfnS&m{aNsz_kFg<{_}SWr~mvsFohlTzm;UC|5Mbj
z)Bm-k@ARLaA5Q-dx%kibsnh=v(s%lwA?~z)bcXZ0$jv^D%cPv+xs>#s@fjyQXM7CO
z4+%Rszo$r!36AlvCH=JEs6RpSA;D3fzi%BC9QCs#XDDa?>&ZU%&+GF%>2W`--$43Y
z&-xcgpL5oKfb?^sU-ai9$yWtO|4q`L5*+opUq$t7KSz3%f}=j$;rV3!E2PhHW&c~L
zJ;#If*$=kI`s1{&D##x5*bLWOi27}C*vXJ=3XbvlCh4~cj^iCCxl?e|kC1*yaMb7d
zjtP$X1Eil89Q7wiJ|sBm$4LLE;HaM^IYT+e6W>2!;{G{q=WU$thxPgUI@h!Q1=8o7
z_4kqe9M!Y_MUt-yj{Xmk{*>V8f7)e!&y&94(C6{j3Xb+yk=!6S+Ru<|QqKO@liVga
z>W`D$DLC4{hvbmpsDFX{tZ?vCGxVSR=A7f1A-krqkN)uQ|6kXCZtwJe!o~l3m-~zN
zhgyd}y(ByR=lhxa=lHW9PXBp-aK@j%t8qJyk4b*U9R3`lais;v`D!KoLxRiiEk^}M
z{Wj9i2#)a|CHtoYNBwTnuW<0%8LkKR&l%4Q*)@fI^ye_i&UlU!cgAy+c!+Y2Cyys4
zINIm9qy@+EPLRz0^8E7o3%6tYS<=r?&iX8K|EzzW^td0^=W%g8>t7&!&RPF8;yKD$
z|02m(1;_ESA5((kczOLhpO3wyS4s2C_Idp;5*+P^NT1gQ>+|}rcj)u_XM3#QMta;1
zIojv%=$*n2`p<H=;HW=D{=@{=>zU*s!BPJy(my0P>W4@k6&&@`q@NKS^|`+as^@VX
zBH3{8qa@b~j`k-=ZV(*pXGk_F=lHx%a+~0&KTdL|;AsC0$sxf}pVvuDaMb@H$!Wn+
zpZ(<Vu|HYTJL=G9o)H}Fzd<th&v83Xocm$>ZxZKv*1tfUbJjmcJV!a}UnKde;OGzA
zoe~_!n<H6?c}M-fCtfKy>a$(v{lfm$I`p}}dco2DTV&sPzf_Q3t3&^7(&zhw$IJdz
zP(5?E=i>zJ|FuFN{plpRL2w-JA@ai%9Q7Y3xlM4?KTr1A9?ut_8-yJC{5(>=#Be|U
zj~XAmzOnNVm*Vh_&Zpnc`rt)VK>2zS3FV7NQ9$+8z6RwB2K#M{%DM)cffkDJF4Tvw
zLJN|98(I(xFJpv`_%As^GykG=r%=^zMhi;#a<m}9I~D%lK+|CUJ)JdOxxl##{iYN~
zTCjs}<}7%R`M*vESimW!W0kx;lS(Tb6_t4nyMTY$gzLey#r$Vxxn0cA!Zbj{et4ZO
zva8isiOVw~tm>tH(Y8!Zc@<QmO=tTMweOrSTNnCgx*7`T*BS<tbNhdw^~}}mKiw93
z+*o$@-#~wQILZwv=k|>89Z9M7=c#=yE4s9A1zsxtCI$vly`3oo^4V~4{~Uk3k4yD`
zjrt#gdYQOAGd%Mx)qjlo&yu16Ihy45+&`Xumg+x5|8eq@`nRBcss8KhpaN1>e=0qG
z{3}jp|HHsa^`E2uTd6%~+@58;1xxjRjr#8<MFaBB!^Q1+{NDmrs{dO0lhZb=6p7n2
z`U5DG>c7orYshm5{HsxJ&;7pwtW^I)bM5y0JhG)idzN2<LaF|<wD5A|zX5vq*QU<?
zPXjB}e;R`Y>67OF2cT1`{|w#GSu_I4fD8Xh)!F}fV5Rz>`ZfDM3++qw-~BbHfRxpr
zcK`U-t<L`60amL2*ca@ESv$*ra(f2<1cg%l8~4~6ynYN2@vmaJJ<tEY11r^kJuVhV
zr?65aZqMjFD3t0ycCW30f4_*yfa{BJaeMCH3-(L(pQ8s&=o9+?7;Kj6KhppekTSG?
z8&Jk)m9u|5w=LCw>pW0~^hxXQPH0@JfAjb3_E|eq2ITlV-r2v8`saO`)D{0f2>DJE
z>(EzBGIu<pbiF};l08NHSPjr-xSajtp6q;fp@Bu!_^H%$_@z!H?w1kX)1}(;0TBKj
JzDy2L{Wss+zzYBX
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/static_mem.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/static_mem.o
new file mode 100644
index 0000000000000000000000000000000000000000..027415b345ced177e5f1bcbf0ac0d3fc3b246bf7
GIT binary patch
literal 6656
zcmeHMOK;Oa5S~1M76AfUUaF8R5vo=qR%}t!z{PC}5fb!J!ihucI$POl97oO;r6(f9
zfn)O%_!Wp7M~<8jNB#mwPB4?*wXG%M&>PZ@<eiys9=rSbaag~3{On1&R01U>_z1bD
zP=N7`-1erX2j^iPDgY+|z=V0_N%huv2mN1n@!A6T^trP8Esrlvg7NK1)gAAg!T6m*
zPTtvAh5^HXVZbn87%&VN1`Gp+0mFb{z%XDKFbo(53<HJ%!@z&ZK)cm?XsxujUs|0c
z=>?%5^{s;>wRp&^jrt%>4x%1fX%I%71^g&wR?~LtZo_HXj%%&>X<SFEvARmQ?N}6X
z8t&S^*`Tw`D*XICE2}c|q!aK=6HhH?NCi9Ta%l?8Ix(d_c+#oKm8t(XzKD3KkbffU
zmL;xy@2m(slK5BYtN6CW_s)sD@dcr2tbk0;A?TugwZMZVV{av{{F=mJ$bB9KyD^LH
z0BR$sbz$_h+hZMnc-U!e+V|HUIB=9fFSs8Z66nIH6U8ho<gH^~hGmIOc)c+g^r8Ug
zN&0QZRrlvCPSRsNnl+GNwN9xQ@YWP}t?uA84Ojcr^VPofe6WYdG57aT^Hk_iSt;xJ
zHfJLacGu@V*!#mF*g+5roy0Ngb8Vfcb!px7^cD9=y*wIFwuH*Y%b6vNB~-+TC){lO
zeqES*5~0V5=9!cJO{te9uD>zwWL#I&qbT>#p`NF$cd(Xv>h<ptBl)o)v>Mg=mES~z
z>Kh7>I;0m8<&{v`sMcT9<t&;TUu1nK6KURyc&YgnfAfgxYo{&^$^Qp(3Zmv!5PeT(
P)vwF{HJd6?YQ6psk}r?O
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/storage.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/storage.o
new file mode 100644
index 0000000000000000000000000000000000000000..bced41eaef9255de2be13d7de0d62fc89749c16d
GIT binary patch
literal 4744
zcmcJTU2GIp6vxl*pixS+u;oLGFnmZBgvqvGLJ5i6F55y}ZS5|xN!79pQ+C6CG_$jc
z?t}Zl0}q%KVxqpG@xk5jKw^wMprVlYLLxCrV!}fy#`xd^rqrg!70;PDclUDH!NkPd
zOz*wFIp=@QxifqBwr|H1gTX)mL<_*@(3%MfaPsliIO-0gunaojk~VRDy{`Qzu14j{
zT0?`=a~-farv>XD0el8f{eG?^y4a|E^9k9{YJqwHI+xGj{aG!v4dvdwslm1xEmVJQ
zE!fq+@1|sXp-uh&um4p|hw3QRKzZR>Om74@y$P8Puo%;!uTlBht;5UbqE~M+Pz#}L
zDF~;jj`{Imjr`YRJpm0;U3hQ7)M~4+zm7I5vA=-*thTEDUNE|NQ(IG?(N@>VhkA;;
z0poh}5Oc2&p(X?&wP40-8bB9mk$w=b4^gv<dIRXY6LV(&ZF9-~+Wh!Htx>tc&tO&k
zUt%_WD30)JRJ?i@x?yoO#=C{_=CJmX9_{-y2)piRP@lp0RR6sDoU3R4z~@YP;5B^<
z>z&nBV(czrZhctK3Ju>8@(W@gz>DlDUtCK!kA-e}f4to9eILGX*Pr6i+Fr(dOw5IH
z3ZagPIn7~CcQBVrsE^ub=B0dY;<LJi`OHfBkUix?_HsV-TwCjS*<Hs*h2w`{k)8vs
zKgHfjIRw1*pqOV-i)zAax?SybUy0?de~9Y#VxcdL5B48Oyb6#^4UhH@#rNn*r)Z~-
zTDqCB%wzh~C1WX>weH7lyJ+vxW9dSn=;)J0JD+y+lIOHxDU1(4k7|<rsO8yY3rB^S
zZWyeJhHJ_C0c|K2+oOkvUOcF$ip89nNoNZbRd+I$-oInYE>321II_)5*0D^dY+HJt
z(YvEJ($i=3^y=ZXo!^0@$kwgIjUJuu^hA1}eLzgSMSIo~`2B7>E3NI02B6_jyQZO%
z+B#f7QSNPz;WQ}e3(qH+cd~hk`z_3;6i!nO9%9<+dfcHO7tvbwyKoqg@_&SH^)nZ9
zxe^T?ZVB+ni+exc@9MO;E_rGo)LSrtL$L-e3h<f_FCt%o6<lNE?c7&<?B8K~@d$3S
z{RckwANlYLKKxrB{+$p12|49|n-};5&Z+%^SG#ri(}!#5-_Cv|a?-EjW>2l^{s!3S
zWB&}>i&s6z_I*C~z*~c1!sg>JnJbqvaSK1Sd3eLd4=j&uD}98An~w;W7s`%x9I~YY
zg{%X|Ubnz<9bYEDf%4>}WiuH?Zw4IAbvgc0*(zHx)OIXSi|?kak}DXaEe<Az62k-i
ziHYIC!DKu&k?J2v#3#Tk7D~mOHBxqP%fUcXcDCS5QW}HqmM4--;?8G*7b<Dx(^DCo
zr_#qPGL>%*Sq00^nn|nBEO5|5aaYnEaCZBwoaMOgJaSifAFp$_yZ$`E?qiALd7;^E
zNF2XMnr((hA=FvYqyRtjnBE7O|Hgcs!k6Kk8tKrUC0ZwQ(vkUE=9E8v&o^6`Iq9rv
zQh<oWAC>qn=A<w4-HN@~Irb{{g70Ha@9h(k{s?o*llENE#+Xx{6nBhoyuw`MBlsca
zs!m4Y-9jAuDT&MLbAq{uEAl@nae3WNNu2T=;TY4*MV>;34y4r7b$DN~7dmH|t94!R
z;a8c9{KH;2xTfd}{)3OsUy_dee&Uy<+o&#?cQIGr+c0y=|0&Ley6wy<Px-ywE9uKT
zD(S3~bP~+fxMPz2dddD2bBZhHPls=6YF+1i^zrQPHnpyclD?e(RY_mw*Cd?{o}~Nx
z26MHpUnP6Fu4Q}_QtRquuGST1uIg`RuGSTi^yU0_OZqb3E9q>K>e|m-jhm9}<+{Y@
zhW^B*(x+HUe76cN=Hjy{cr&z7dNc2&4}(#1Y_HFVk!|JD27dQBU>r$1X)q3#N?_PU
znvi*qu^Xpk<PsbixuTiQfngT&d8^<wgZ%e_j;>hZeJ8mnGHN+qA8&U5*@E^qdY_}h
zfcr7tv`_L8l%^C%tgBeBEzFfLa83oROB!;ca~^4`=I0r38ci1wUjRC<l4h>}+zbD=
z6fXQl9&x-+V>Nz+KjgZPzrax(v|GO!eyR7fA=N>rXAxhl-$7&)KZ2LsMmYYs3~?;-
zmV5qa-(z{6{SR?r^w;4Eywv!Vms&dsb+Tbh1R{t{nZj~p?fk?1e<M2Y%T4wF2NU*I
A<NyEw
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/student_attitude_controller.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/student_attitude_controller.o
new file mode 100644
index 0000000000000000000000000000000000000000..6a4d0f91d4c68dc5d56c3ce60ce92b5c37ea42d4
GIT binary patch
literal 9504
zcmeHMQD|Jp6`kFc9W^$|#+Ge0Zsn)ij^$!+B$t3x^0AUF+X7RIwE_w*S#7lIXsM(X
zZ`X;9KC*$ds4X-qEyX`=)&6uPTF^(Jq9jFW(;`Zs`e=hc0^O32ir^2owrdM2)O+UL
ztG$}thZFi`=!mD8d*;l!ckax4Z}jwf|An*BNW@5qm|vTkC8#lTUag(9&7|35o-!NL
z@62z+%=hnHip;kdGh2=(dq$ox&+Vo5{exz`@AXRRwP<oZS*WC%l3v@|A+ym;_0H8}
zZT;q0TWr>Ai<ojMLhU}fs<8tLrpY{c?{ajW-2CuW8Ve0OzBd>Ler>Fb+i%BVOfT`T
z(m3-{CDr$pAEbWXS@C0}d6e{<NCV^H3qD6EmTGL@0^-5g%$0AYewM8Gh{L1)?bv>W
z{V4Tb7QB617-EH=B>9J*ovTN!uN|ZljkmW&;)mHE#Y(;q<EP{AvwY-XgyI|d@E3lO
z#=-~kAbw)jPr~{^4y&=fc3d?^{$`)Cb3we)e&f|j3LKf|+M(ozN4dFoxo^H4H9hwa
zCfDy=>Yd-1e!sFDOMiICi~W`2o;4=fBlgDhZ?@JSYkoHtUBJ3y&2Q0K@231B$7{!$
zCI+ak(Dli)J0`wN^>^vQI{!On7VgC&3wG@(FJ+n++U*nz@&v62aYqP$FKXTu9_l1v
z!Yf~?q?&t<x6Kg;Ya4HGZ~Il$43%k~hV14ZuMK%KR$p>M^Cug70=_VJ%=;GQV(r+O
ziBF#GpP*d48|2}SHV@@1OI9!5?zMe$W3#4zoaVW?c>sBm%gs-zL0-<&+~(=hc|i{E
zQ(mgEmW3ck5z0}N*Ry4ztmbW&f10ZPt>S;Y`Ifzp;$C~(?uZ!*@Fm~og0QB?%uvj9
zw~an;_9BiE()c)PuEPiBjvBd45)L~;x_>9#D(SW(pCP*MH<2&WHKdFDBA?4vx0YkO
zMxRv|b6{Os)9YA+M(eXN9jwdmH{aUxC(8da)pxo6$XO4X7xwQu)h%j2huRy{zYX^H
zF0+pPJ%as1x%o8pon6WGjp^T2;H#LP%4gGlrj#R#ieDHXPk&>I>pa(4GnFrmj-i7K
z+j+;%ihVuvnq}LXShl9#VyQ5dR!)Ovrc}z8u4X9))n5Zi6mg{}%8OS^gYcp30mnWA
z+s3B`Xd45xjR6#&Vr$#Vt9~nQ{YxzHhj_>i$Td44lWqN}0b<Jlv1I_oW7$DH0RLp4
zF>k<GgYsAd4A7&FmqX_D|2zbV3CqLIki0$W_-EY@kNSMW;t$J%Id}T>SG|sNUwgqD
zDip>?$1?dz?@Gb<N@F>%_vDmcxRM{ImOna{FXcu{SN)vVlQ?zqRA*ODqU)5`k?|)^
zQmga$ao~wA4?SI-r=APhPz*<?ZZiMeY{ZH+Jh>Yaqn}14MoMluWC3`oFEO*D4*Zfu
z>hYt5N0h!O2K;)zkcpZ4RS5X?_zA0D!<)r{)oF&@wi4*n<9)=6m>Rxa=kaYCFan)=
zoDM3aQ^U9G><-bX$H%Qs4d1TwM4e8VkUeVMZ*d-eLU_E6ZOq$*J!Ss2DKj2s&N9`F
z_<s)Je-wiMBSa@kaW(S$cnH2X1b>=v%=b3cD3Yme#!WQ9Tev?<b)$J*55d0^g8!Is
z`1SZ!dXsFFKQO+?TUz3|6QUEN_@J}w@H-h_b?`LfRmRT;ZgGI4bKGPpEvL8iXkoI1
z(^1Y(jG80Y%#p0g7Y8QuC6i8%7hWmyX;ApvQF|~=r>8Q0W}*Re8*aJmzLyV_r?;F3
z9?xC4*w=d@eevwsOZ`LXq29g={b@RzWm9~-l<)`hSv!Eb266Jm*$})JgJYtiUCNaP
zCQG?j{LJ`;`~=O4)ll1^JWPhvM>dozmcn~a7kr<d(=u#u;EZqw^I39!CRfb+xvT<T
zn93qr&P2fK_x*w|kZ9GC!%i?u<)EII$`x}Z<Vv~}n;hBha4)u-GT30SK(&x8*(Ol>
zlrMoCdhhr+NGP)3ali5wwYc1K`yIU1_8J4ev;iGqyod15a~svyxqXoErxiZJZSW5&
ze3siT|Ayj!LGeEb;a3&@Ma91xg3EInel?%|4z~qy;*V-6cwV8naXzp3!Mix%jfL>9
zDZUp_?eDn|{x21-<6H{CS3>ZcjJxYA&t-Q%+zsLH=I6D$A6glA^ESvh@^)CwcSPZ`
zm(ZP6Iy#@%6kqGiC|v6-DjiSxeMj+e=8^J&!nMu`et)?0?PT2D|5J>+^DQe}>n|xC
zeP667{$UA{>YEDJI`O7}gn0D*;xX>V)2VQ+Bkx6bzHcjieP1jwj`w_ric{W~t`2>B
zvITK^ioX(~BkxyN=Pyb}?~|J$I=2{ib#5yiJ+HfrBX4?M4-{Yf{Z9yAj^OTmoA?Os
z>Nhj)?yKD){J7%l{nHY{Z&iG~PmVC|uA`hg@h=CQ-pjmZ9@m1)^HFjI9QhPpx5GbA
z{U}NMo6h3QKf?B)!r^zA`NIl_zW5tcIQa7Xol-c~%VWFDwZwmo^=A|gzQiN%BjL|5
zf6n1cJc|lPJU5uXq;QYgxKLJt%H{$5Ip(h_+@rR{Q&l+l73Qxg+@rR{^FZO?&$8X@
z;B0QiCG)Lthv)&vd*5Tcn``0AJd+9sU*aEBIO17hdsyM%i@!02gMX9lDTQPIdu*4v
zmU!0Ko>4gX63-2VL;nHWa|#Dv;#pKU_|23Ll%=4u>xlcyV|zv6;I}e=RpH=EJXM8*
z-@$yD2j&I7#3S*_d?hc<j!v0v&%xttiym}vf3+~)?eJUKPAVLH!3PzN_&v6V6%M{U
zgT@qY=gYRt1M%Q~lz7SxU*ellIQSCJ4TVGhJlk^$2Vde@R5<t&_maXrYD+vT3I~6L
z?Nx<))RuUv3I|{2zou}H+7izLg@ZrKcC&-Cxs`9(4{`43P<-595`VYCp)YYJ6%M}O
zg9-=VV|!TP;7j~6KZ!@;m{NS)UlLDQ;n0`(W)u#-#B)R8;GbuEPT}B7Jc|kkU*cX;
zIJgqeio(GkVS82K;7dGJg@ZrF_L{=Mmv|m19DK=(NffV7lrk?<UGjr^Oj>?!Jd-Hp
zu9ZxJ{<6)O#LLB^N%#dApm!y@$pneMCnTKzD7hW>D?tF-uLq6!x+@qlT9}xi?;0Hb
z|6F;bK(~6`m&GJuC>?xG39R~WMOfn|x{^ZRI=LrkbRxM_o}>$Ynqg3pb$f=|!1<Vs
zE?dSNzk-9S%Ly`|88+VKyLK0i1$K%qUBv&QGeF`OxSs~0?fP%!e|X7zO0;FX*hy+M
z%HI?xsLGCzKcrH|Oa5LWtdW0@i4XJtVu=4i{+OWsL(=tM4DsLbIqIPDF#nUpX*B;%
zzEQP*d_8vke~++6^Y7$O%@6bc?GXQQyez3`|M-^U`kx~V{yXW?rF&OkUDhDAc{#V$
z{HO3X<_#Y2AvsjybRD3}^^Y{WdygQqgbhRGO-Ee(2fg^_+<5$Lyqu}b2i4YZcl>_=
DSNafc
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/student_pid.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/student_pid.o
new file mode 100644
index 0000000000000000000000000000000000000000..be42fee2cf830ed6041b552da02e59e96baa68fe
GIT binary patch
literal 2280
zcmbuAO>7%Q6oB7)-Qp%yQ=$l>)Y{CVP#kDhw$-4fs>E1raU&{}hV;at-mEw5O8(P&
zi&_<lic@a1QpL4B6dE`oaX=gfrJOk+BoIOzlAdzt1#(FRR(P|1L$*_g1B^90?|tuQ
z-n{+shvzT8nK2Ad!+@`0Pg4|N?ckow6OqFq$bp@Q(G0Bq_|aEue;^i<9CjwxVaHg_
z%$Ru)nf1(0_9O^n!I-N6%&wbPetyWAbq^<Oz-^2fn`GusYW8k?`+3iV+i&C{+8%}{
z+a`RmH3GfOEG(H>E+7jd!3$itLtNBf=OV}ztlDB_&OK#Y!Al@=)6BBRr>qSVX5CQ`
zjM>&_7+X8Sg>P}O>~K+o?4+H0*}A}(<-Q7{P{15VKs-c0cLIINxKGYb?6u<{0PUL@
zv>oJPYlQdQArRZc{7LV|cWd%ICUD`MVwRZ&@yqV+iww_Jdz75*jv-~N!^2ovudL_6
zpSw#2o<r96EBaTsZDAko?3Z8JWsNew>XlsK1PEEfKaBdX820NaySzurmc(Q2X?^q2
zCyVyPgUA@eTHzI|h&?)Bz>+b}g_J)9l=FRgqk4Bj#xl6MsB*xVmVaE+@tIJ*$^Iw%
zI#kb|J<ST$w=c7$cDvyPZrEZg?TE#J&nh#WsJ#+4P>Q@DjD0V@8u@I_DbJLPr8%cm
zW(7BD&Y)DBo|fDxF=;6k%d>dme;M*w&%*D!gIvskZvudczd^&qO!^o}z@Rru<~g9d
z!zhx`)V}A)!^ZXKGu{BNk^chOrf91(`}kM);g=}SO^VM^z6SAI#19kyfcQPl|6}4`
zYWzO&b&Y>R{0HK)ZaKckDf@6Vlc@Nm>5t!tGmSqcUex$s#JR?y8(*#at@uhOtUDe|
zT~lBotk1W?7#f|Gawn0<6AhO;bvO3=rb?&NxDH;s)r}*3R#V~c`0;!z_TP)##>KFS
zsrC{q`dvS*qwD!7YDXy-MCbf&82R-StPX<n-HI27@B1k~41TMl>7k~l^UBTQq_I4?
z0!-k2P`#EYPxs{*u0!M_mkTLAoZ`Vg9Gvd;X6!EG8b|##P*UVKTqpLg#o%CnU2vAW
zU2wd1vxzq-mHYpQ41;B9slTx#9Z#-!9(q1Vedb*|h6ed|bLBv5juO^Lm#W-H^>Cc{
zapL-yV^!Oi+>;zimg@<eGUtDdFJY{#tB5l_)c)_LA<A?cpIQf%x<ydEr_W)mocj3>
iA=7I|1UvM}Jghd95QnD1^T-Cp2h{)5Nz~p&kN+F=_+?!H
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/supervisor.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/supervisor.o
new file mode 100644
index 0000000000000000000000000000000000000000..f23807297da2782b16e8682f33306517e71d7fb8
GIT binary patch
literal 3272
zcmbuCL2nyX5XZ;f5Fmw;#wnB*wTl#?6g7)&(W*uqwzblv5~`}$l_FJOZ=6lM$o4wB
z8)TD1!WTeP>b;>S!nFrfiAoWC1)$d)_yTQ-L=TobvpeH`T{{BAi|m>C?SE$8KEHi-
zw&y>)mQJNWMhbp{I1&o5_<HP{p=-i%c$2*E0L;R^R{7(cuKoT`ac}F<UQdHN&q}Gi
zY1moH;Oj60&kr^D@j%Ob=#Rq*tZ{dH3O4Sh;h5F$m%pDdAHn3OXHR0U2Whx-@BUjG
z2aoTau8u<?tLtYM(@?ICn-5_OPMqt&2J(k>fb#YP6mW*qI`*KPD#jO33m88uUD?}B
zL*X!EKJRV)`UB0M^xK$A{oy^BA`SXWN!{Qcd;O0|Tb(cq)n5PN(|-RQSv$Y$<0SyQ
z;s<UUfZi(tk=Lx&TB8f#_}3a;r?no6@y+qeo6VJmy~^Mlxsb5$Ct?ZzE8mgCggvTn
zLN*9@242EhC>B4_XBTeV(#x*fsMRf}rLVc39@K69%3RxX*PI4=Uajr~b}iWSY`tLQ
z=knQH!N}$HS<7qAp_e^>p16_I=}In}znJKg2vZo3!IORhhoLrdhXZK%H)?2DDLIaZ
zfVvD14PF_7w5eePpGKNe`bxz}KiqdV)W=-(A2F9$>}BR@v^0cY4gImfoy8St9mYeg
z`WDS+m@kEOV%|}bG<Z#kA~&it%s&t7#C%c7)L=r1BKJ!)Q-iw!c!L#N%qKY({w;Go
z!S6HAGCyGZ0Ik$u6q;X-;E#{s;BU5V?<>c5J);IQ9hg}KyJ>stcB|Gc;h`|!vhZ=I
z^8gQm_&A8qfqK^uY|r)`-?&uBU4lxb;ja7PSyHLAEzfF3LENYq)r!G&Ib>8M=S<9Q
zwO6gchNc_1p1)uROIF~x&~9G$i**ZU>=oTs3!hOuoczFAaT?CowpX%)dG&tO#X>)W
z8&2I@;=i5Xveu%PeM-*<4bcnNLmJnY{XN56^uqDb562lS@Gkpg8thA7xzuLoWMZB_
zGne|J|BW50e_9~gKiN;}|6)#k)l=thMXz$%>Qw&>YsknGLto+XQwX55M!3YY3YX7<
z5S<e=L@zosq!A}Qwh6~gwxXB(WrdSo*1xWBnx}l;|91YOlX+2Jb$z72%tz{j;dh(3
zS<wbwWb5L2cEd6PyAyzc8{YzB#rMJRTnb2@GcIFDB7EYo4qc=ueCVRM<~EylE8v^^
zA4bPqT3huqq;e*`;h2<#kHW$FaTx9iT5nST+hs0T=lo;H$(8jy#kvoet7}S^ZgO6t
z{a_z(I$S`9Y9{l`oGAT7ukJl!Ied{cPk}O)IsdA{$d!6BuX$wTC;RWRphHQ@kbFTV
zI-}Na|J6vb9~q$aqa~GmS-%ppQT<Qx1F*>XVkBSU8|aMczr(^R3#mUL$(R0LAfx_S
ze5s?#{co!feO{KAEK6Tf?latFOW&vXJA9}={d<sHdn#1rpF&S5P=@puM86A0<sa~k
L4t^kWLNfmam5V3z
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/swd.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/swd.o
new file mode 100644
index 0000000000000000000000000000000000000000..8b3f56100b928f709580493e8139cf427f6c2241
GIT binary patch
literal 1536
zcmbtUPiqrV5TA7Y(~5$vB7%ZX43dIblRytC2rEU4Ac9g4;vsByU)Y6YSKhwhwwLxJ
zc=QYS8NBxB(Tjc${Q`Anccxih(vuUC-^}mL{NB8MvpIh8`sG@y1!67u4vR=wfKzYb
z2bCMZ2CS3!r3Jw-1lV~9C-1O!c<POQKTzH;`qDb!I&t4HctjQZdwaX8v;XG3I>_^B
zl!R%fCb>~I(dv2klgTIP6g?9qsnwC48?A=^pgZXGhkk#cI-!|$(d%t*6YuvGt@L|?
z9THz{bf!!2=WNxgxAMdQ9)4Dthf1zpt%&6(cdg==b!vWD=LY7t8v0E|4=%gg!fj->
z8vWnpjQh+hj;}Me5jRm^bOk#Vzvxr=r_4*Ig3nlI4UtUnE&8M{d4eA*{_j~eG3Zxw
zfEZrDL-9HGBWRb<jv*~xWvL}f@IV(9(zt{~hp{$bO_&uEZAL|Uq#>Kn#^~phkuBrV
z_|WPCqI{lN%rxaF4s8gQ5%+J}Ej+mNOuYDa9R4O3xx8ZD)oEXl4}Nhtv*8%gni>=F
zjGl(R)ujc$YS|wb1^7`uo9WE5-v5F^0lMoej!?ky6Ni^`3w;kAdPac|jO#o~CC8*s
z`^f#voIYlLF?n^tw1)G14$tpHV(O1H-FkUGvY+J3eM;O%hx+OX!6@|~9iDQ@nkchh
wuhhRkIrzbe^#4Hby!0dI-$2gool3v5Xi7oDWM82+(OFf0!sM<bGP?Eu07Ol3;s5{u
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/syslink.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/syslink.o
new file mode 100644
index 0000000000000000000000000000000000000000..b49a9a9ab162ac9effa81b370f67035d3fdeb183
GIT binary patch
literal 7096
zcmeI1Piz!b7{I^XDHSOy{fCXzFw}x2p+no$q}zy@Zc7VV`P1DRh$dw^`^rxC&nz=j
zXww5L8smW&7P%NN1rJK&!2?DQYK;HF!Gjw0YLSRB;h+HwO|13%X5ZUBwmTlYx{u7h
z@BQBQ?|rlLcKSHIcXT)$3V~=L_yAT%f&$!aS(SBP)S(VG!1COOmzNbN+-ZcRW`J|=
zhxMgfvC!ovlrMy#aO*l0wyMexi%R1HnqBz$x*i$a*xGPfhZFN5h@Z~GiEB#J!lKf=
zu!v(b1ihqJN&n*CD{;YZuB<#P<liLu2FesqT+4Hx`1w&zjhNH1upY?+^xldMTwb30
z?43`Qi61@8a}x4nA;^EH;zjZEwXie~a7Dp!7%!S5UW-1y0w`dO&f)mnmwLFc4aW(z
z_jP;nW5^4ni@wH=g&`uxA{zibLUAd_<++dj{Lue-QMWUg57qOI0t<SLzC^y}YxT%h
z2%Xrs4&qc-WBn@)7^(1j6bdi4!R*BiP`HF^JM%O|-a_5UR{i`-2OvVWZ{zqH)_(}s
zfH{ugdd3!8p#H`tsNbGU^u1gIg`c1%6@_(mCbZR=t<Vs~YuCz3{MRO^Z@apq@3E_o
z_mMAAk9@7ZBx(ZakJfmnQD0h~``oXos1MZ!?Fv!K7VW>q`-45iM*G$AY$|J?%BnfT
zOfj#2`w?ve#E!;B_aAr$G;Md%NbhzXbGJL|rmbvBGs(_P=Q^KCv+Qv%sXn<!<?0j9
z#>Z*4+Nu?(R-jseY6Yqls8*m_focV+6{uFAT7my@1x5x3`_+z-1LJDkw$o<Pu(Ilu
z?WkUosRNxk$DXp%C^=@*@|fvOJ4}seJ)J#W-4U(3N9{12OeacRJ9iS-x>cI#?&^8s
z-)oA0|3MA>u~JD(sd&Nwpy0nsO+inUngZ+A;5whI<q!Itvbwj`<1j4cbAeA6{j81q
zD9(qZe1yk#&ewB$(f4q^iSuFJQ>Or)CX}^e+_iiU>V+hII((pZ6ffdpoZskU|3iWM
zRtH=<iM_~0o;(}C-wfba0{BM({ObVzO91~9c>}I&9(!tHePJwkrTjMs@Qwi9kDUB>
zVNXqzZJ2YN^V`K~ID+F!ank|Z4dAZ@a9BO%Xiq@<j2OoaHwBivKWljc4VWf#U2s`8
z5uKizVh-4DY}TFN9>{{Opt+cb$1QwvVr2ASbYOJi;P7y4Z+s#?5FOn+0j8aG?KC?y
z?csLez_j6bZaOu>yhHv$O*CzrDJy#%SkAGs-W23A7@m%3#&Ze7W8fGG%ce2MLzbH}
z&==UJI2mK6#ZEG@B7b!=ho{*z8(~@ISmvO^$kRP6h6{!nT3T@y7vfo_@DXQjsY0Y#
z%$0kHv5b*R+762wDFzvqF>|wGU8Fo@c*ao1D6PzJUFLYhhLz^Gzx4fR#QWDEAok)r
z5kZdUi=`%xOG#hejas=za~a>o`4;3&B`*MRi8o991&Pc0p2Rmx`gw`_2XK6RR^lRO
zLho`;`OCZDdz{nrCi5>ir*+Bvd(LTHk8qi~n-bq5@!z>jaUYQQZ7!34nctQ4sm@{z
ze@Q&dW$J3so|>q?&~K8stlz>p<uC3X*{htF*Fo$j<#p=~&_Bd^xqh7U@_HsXr+l_j
zBD{G4`ty>$DwMImDe-L*#~(w#k$?HVv~W&&Qk~VJ8nl-2KF(FnMV*Cydl?t{yEvz~
zZQO_7Y3^*sGbTZEJ*U_wh2*fbp?Pe^0}b~b1GGup7B$DF0jYOueW00U#>b|e$*`<=
zJmd)fNmkJcQ<Z*^i*EE{2fchfd|28i#F%PJ&xtMo?>qQIKEq#y=skksi1!Kceci!%
z`5P1dUq;17KIBIG4f!m$pW*h;$;w<;M%_3dpY(nsH(?)>A<80uk%x|q<ns96@c5hL
zhg`Bp(Qo_klkB^S!_w#CLq+lV5-AEIuH08DmCiTxeLS)I(VX^sk-w-v@$%d$(yRPO
b;0+OoAhxn0(0gYk`*|MVuy3{cQEvYa0&~<V
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sysload.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/sysload.o
new file mode 100644
index 0000000000000000000000000000000000000000..cd099f07c8b671523ec20b7701304ad5a30fe7b8
GIT binary patch
literal 5048
zcmd^?U2GIp6oAj}EYL#LVnO+lGUYD?WoQc+swT{KfkG%h=`IP1$#&SC(oJ`F%FL`;
ztv{>qpn*g-YJ!0%_{0)oNF>pHG1c(E12KxIB>GSYF+8fM*g#XynLW2$rn^r*dYb9E
z_q*qwbMBd$J9ppM+_NPZ2!N0Pd=B?}f&%0l@3(cYsl!9i027fF-vvU2D>v2#i{ryk
z8dsor*O^wj7YP<el_$>Ljs{A9?F*LfB$U$FV5oF!EsW#z_ZPnk2k$7bYG4+`<^voX
zeOE6pnRV;R9BgC!W6Ko1+yYSC3I{&=AgGT4gth}Dnn#tnXY1zoHP?mrH<KT-B|GBO
z|7jYmTZpU=^EkN_igU3&`YensK&>O2hx%#M3!u<Dx)H{{nyHsh%+SX+0vx=lEL^pE
zI>bH+La_<QyBeVw0+{1WhuLog1A~PS#B|WhT`Ckm1{e%aOvFy3?b^$0kDPc?F9*=?
z3o~H$$)$l}GN_l|QsVgn=AKkS+YcSu_fG+qHbY%&GmI?pa-Rq;7#t2l`PSWu7_Gkr
z=WlF;&hcTrq$*Ip9Svjcy0CT;tlg&4U1u}aPansc7e|!%j~fec@HAk)^@ZN+N_UCY
zPwP=bF#9vi%lW3|$nbP1kIaPfwTX$xsa9y?)eCj;tyzU$sy)r4daF|XsirqDr#h_v
zd$@)!tiSHnzv+Sck19=P$uHTHpVJs;v8wzaE{X@Bcj^G^DQDL=K0f@V_sr09(uB5s
zm^ZYcy#njuwL-5$ee@f|F}xSY%q}Qi$LHoS##5kh1^pJ6peCC?k(0imz}dqMg)4>E
z_4ml8g~wIAr+ppJNp&3`{`w5%<FCp78HHZ*aUJtS4VtzlV<mHG(^=!#i8ap4PTDe(
zT7t$%T*DcRSh=jLKBvaQ(e3da;l1(5u01<rmGS8F(Vku5P0y$?G*pwh%+O44V3PNs
zyZWeWBnH*A+3(ixG%_Zdkl&a!v@M%7^VM8W&R?!|^sDvDb9gy8uO*dDxhW%^dc{mq
zAWWDd?6449b}W@KZ7)7@*UVJnY{INONcOHZ6c>X6{*U#WHP+r*gBNOW=#E65QCqur
z?onfwl}-#8sjS*>*{VBWs^Qf`w$-0XW6Mqqq+B!M=4?~#)H+sow6%9??Hy{XVP{rj
zt8L{<;##{(BkgS+>uUw9aD2WY1iw#Ivr?+=^Z*L}RTBk0RTBlKO~JD~GL=8<amwmJ
znT_3`l+PS|;YpU`MO@`Rejhxk_@A0j2aX1$JcUI!bI}(WM48ulUa3|U=|e?+8n`d)
z)65&0?`BO(f$37O(yZh;mFICdAlr)oo}U>t{7mKVcz*8lt<p>d>ZM+#`5`KiyFB=5
z4Sul(|GozQxd#6g`J=dEo$upG?34U~SG9cpuEFcEPSxxe*5I@O@{YYM3Cr@}(iXVY
z$R^XKtqmErtF=AAV8}LKN?AE4X1PYXH<zV76I?rW;DBj+JEgoegS_2(uDf#m{kX>p
zFVU<q<P2CY#N!yu$T(ti&E@Hf&~3U=ZzsktfNMg$yJuHdxF^1A%a-WoSUeW)>e(EJ
zgq3xyw7EOy;<jOfIb^4@Za)}~W7_T(Bb64r{5IU=VMj*{^4>-tu}ySJo>K`#m2k0C
zqVmCFqi!>6+Nngu%4D!8u#RpD3f0s509LxNiFFfl@s1D@&p&ZITTKdo{(v~`0y>ZE
zWxdGf=SAjoefCM_oyhU5GAXZei}J*?-J}$_CE|*BhnWlif*)n>_w&Bb4|n0X&yV1z
zxIuB{=ktujsSbJWpJOfZ5&XQ*Uc|c~*~|66Dsee3zG|M3f0;K(obnO=Rp$OWZ(#1P
zPmknB&Sx)k|NT8G`N8w~q#T$0$a$V)F7Bh4aNfsN9=IU+p>+xQ!pBt}7?J$Q`CnvC
z>y`7o#N5BGZzVtTL{QXMB`!bz*O-g@uJfFm%>DJh$J}545bvX+K6}|u9dqGd@CN37
zKjOPeey9$j7R%WFF(2=d;tE>|y<3Va^S&B9$(-_8#JQ6iko;5KMhK#$B~DF|cb++|
zSLOwY%YNQwPI2i+n2=)<Uo0T%GZI%NKEhnoUkqLJaq&K1VlM8Bu)pl%!u~3A%2R$0
z#W{t3veUY*u_KkW;G^7cmAHI=H%OfP{KkFIoR>4Mu^+W-SM-2r*=E|%Tr=;2mNZ-g
zwEd0)nr%^s%-gjMpd}KS3MOOklZPI?-x^v1zcFUk6_NgvR&h3#Kt4fv{&ep@z%N`s
z?mn;w5~G?@J#@TeX{`J_gHu!#6zWnOQTKTSQC8qZ+<#Jj!Vkz8g=}Sc3OnS}Z>}=v
zla1L{M(x-kpLE`pMa;h^Lu`xuMIJh`YWb_;<rRkPN6hCg?5H)L>$X)G)|gM@)#`u#
zk;;TVo=5ek)2)av>c0;erPzj-ECU>$#$^%9k+ts;@ysvr{CRvI==@ISAb)&1S^MuD
fIT&TbHW7#*imwawd#Bp`#zxN^k`*=i-#`Cfj+`aR
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/system.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/system.o
new file mode 100644
index 0000000000000000000000000000000000000000..280cc8eaad2b005f8d86bbf4c36a267b6e39d8d2
GIT binary patch
literal 12128
zcmd6te~eUD702)HLc2hJEZs%15c;6hZYzw-c58RB)>(cmyLN!>?jY1scizstWyhVF
zH@ta6cY&l+gOM1bOQk6>Bw)k{O*F)`N|V-ZYhy^nf3PYsCa#7*n%G1tttkq{bM8B5
z=Wv-@qwx=KGIP)SymP<z+#m1myLa~K^@*PPx;n+FPW@C>ub3+3e5z{4wHa6QRg=0&
zsma;!fijbTCx4;T!SBOoDSY7i;5t<qXi$}N_3f1bxNf<+=VvFcHmHM_=Bdlg;9sg&
z2UGPymugTCrk1s1nM3ucwKx9lH7b6&PF0?bD|H$9fAevm{#1Q?*QI&!%UAcjabl`r
z=(l${4Zq>f)jhAC1l>s;(_r1n_nXz_1uEW!bu}+mcVG@N&c(ciu8-EMoeJz(3*);p
zcgA;L8tguK9P;U#kKXxyGuHF-nR>MLp4W7nbw5B~K%34fXj}AAhpz5<{RH^6U`!Yf
z$AbNX@nGFcp&d$pqJBu#V|jImbF@F|bJt=O)Xh;z_9;Vo95WoJ>4pU_Fo!k<m6pg4
z%cPpCcKnX2?aZ&*Fb%XW`cL0hwWn^a+Q)9G+Ld`#J2kgz$0<J4iO;I?DX=?cs}77e
z1##2dqCU}cPmk9W^$+@BdpJiM%l^4Ry?~6%BZoeH7V{6UUHdrZx($E7rrYxpFtbkf
z`L0q)^Ii+o0h9OO(cumq4{E7;mBhZD>EnOs=im^|Z`7&`hh5IKYaJ=@LA|BXa|3ay
zL+2<a9Qz8j?N=hE7GUiEV+%iN;m0iec?<uhg@4V$_gZ+#!oOnSE^zES**A{^t3JQA
z*OMuw9z>tGe%5d<1YOYP4t%C?O({WtW1nL`^K*&U_-yi80ry(4UPq}eUN?ZjIv4Ls
zfj--Ouh#R6>l;7A<s}<meh=oLnj6i5=js>y^0hadznp=&^fbhZ>xf)G!X>x940Rl;
zbr0gwY4GvE<ob<DLB87Q9`?(j6Z%e2E;ylA3QJD5;FKmxp_h-PW4MTEzlb<b^mO+n
zo<vGK?H5L}JBD+9dhEKJe7_X>fxE+#_q1Nx&*vp%f8=f<;|0~5QT?GioXur-iyN9l
z#M!(Hl|1U^pkUH1)s7?M-4I};>z50eYF#t!%6n#bQ9nH8hUw9azhjdh<lWq0=mz2S
zrMX{5x=ST52>+d5(er|YpLU^XZkY88LQKau=;cQAxHv@@1T#zLMsY+nkN82_%ji*}
zdV2!Tb4ES4xZ1fV;|x#0kVd1W6bvCYPq{(f%Rml8QygN5*Lu()hbnO<^y><h(v@@v
zc`S>G%E1JQuG7VGmGeb(>;LNe8A~*?EWBdjHl6>}KV{LkVVl0%uy*Zgr**@oEl$$+
zbLmkRo?sX>Cmi*h?v=&BAIavx3euz5&`XEqz;n7{?JL{cR&~WzwL7gaAy$IbcHe!-
zW2+pzv#PBfSF4XmxSq^X?_R6r(opk_P{Au(LoIipwMU^r!JDFyqWOFyzg7G3DpxJk
z1ZF+N(@(crDTGD9>qI<UGSa^>o~7Eq$}6`-b$pIEU$f3S;`_-DUv@EVgHIi_cVQIp
zOi%3~{t1H@i7zHzjR5---lmNd#eXCJme#3qjt7f3sGAKHrC(rG4gP}GsrvVdk_~E(
zxQfguo*Vf~TBpj}M9Bs<Ph3fz8~Gbrr^-{JWP_qk6AWIY;U%3%Nhz-PkHDLRADi!z
zKl|;Y8&@E&<-ZW5Yw;NH`RZ@i8mT<z4_o|kzSh#&ZsDUA9$5Gu3;()>KX2jRv+y5T
z_)jeSbqhaZ;lH-<w}IpMPEkK^r~Hz||3eF(4V%hZ{oiEai-2Rj4(MT85oPLLi+`7e
z_gMHQ3*TblX$vn{_=JT&W8vSh@WU2<%EDi^@N*XaCkvkg>w2y6YPRr27Jk2lw_Erc
z3*ThnTP@tP@X*2!Som`me$>K$VBxP>`0p(I9Si@bh0lgRWVOcYb_-u(;SX5&BNpCg
z;kzvSI~IP@!hZ-H*MSP;m{R&%saJ_l6Q|b#b(Z)=;tR?D_r#m%RcDm=UxC-^w>t2v
z#p%U9mR8F%YWX-_;!cUS0)A<5qJ%pEc%?@SdyDkgn)1kq7pQEhuaFH@+AZiE$HsE#
zjnge-pD?pc2(#(2%_9jH_YhlYyENdHyfF4qC%jXdwPB5<I5d>=cj!pe&`{A0+<a*W
zHxx4$v_*-sgj+78N7XnAtPMP<4?={>sewA~@j)-|7DxTSi#&Av<TkV+v3X5*VrX+u
z&*1vxP_lbXV*SwdEmh->mA$ezBa(E-JXJ0Y=dy({tq+kTd^e-*j5l1~5%pFO79+zi
zl>D5>Ht&@6HSLVG{gfY!d4V?FOj_qTFH`b%YO|Qv*>HI`Y=0wS>>4$s0fb&xQQ;(-
z#k|g<8nhYdXfrCJN0yqp!7F${Ha+MSGK%-QS{)=gAM`?%g;}ws<fW6@Jj{}k2ki_>
zYsw{+ZBJ*sUD_4*+=y^buffdbUSC0U=GJ|t*o?8k3kSTN<!s<(*0VqCK>0ABmS4hu
zs;>}w0Zd=7koE@LOxEA%XFOHHy}m91yL+9(=>?8Ye;GFQZlJtkkS&BG5b(^QM$}Ew
zA%?cG4Ks#5sUQ~)Nnh4zo95Uhkw3<wEr><u+}q;BK=bsCCkdLHCkGnpCc^lvhle*E
z!no`lf}@399?gh>azV2Y;-l^Tc)uTn(93vm&<p1VgK);8qS=!0{i521kJmac=T4|%
z&JE!y&#%?p(?2><%EG}#!kvI4q;BZ(LcuL{!;_ZtOWuq#1Y;i%2oFQ)abbg+Q5)Nn
z^z3eRvtcwVX@+_s96*3eblC^h;MK0~Vlf9X;K4~>Cg=6~{#djgK!cL746TJ;4praQ
zbsL5Tyc|5J8o-2=sTtna<_kc}utLr@-sbmp<Z}1P>o{_FHJRCG@>;yW(1$Z$osdg?
zUiXnp{l&sx>ht^Mo#1~L`C#@i*=GE4;%2@5#210iQnE3_18q#Gvn(?8H@{DJ0l!;t
z{`-VF%LUJojr<<Li-Lbr@KEr31s@l@Rq(xn-zRuQ@cRYdC%E{DO6?b%`xemw!B>)v
z*`(kx!SNs-6Snu$k*U8Ala0Jh@FRk+68ufFc^vtC;Vt4H109?{%+C`?{Rha#Y?^H3
z9b{wnw&3!p=c3@BAsaK^*O>F66Lc||^C3<g>+OtO^mi|DoVWO+2PfRuVlwqJ#8GE;
z<f6Zef`3-<P;h=0@b)-yj1$jnIPDewk1&M1BK$uu_&$sOe!(5#e?aiK;P9h@PS~z)
z!SRPDOvu+nrv5%G_*%h_2)<76V}h?2{J7vff}aw6gWxX;-YfWN;@F>kg1<r>#}U`D
zM!GjeoYyzzxWC7Q?fpVz>hH6Hw+nt=@J9u|Ab3LXi-K<y{EFb41aHJe781s@IWqNk
zi{Sl&JAywZ_zJ-X1n(4lQ1EqvCk5{pe2d`Q1^=SpIpW;^C#ao8;^ugT#CcrUe_ZIx
zaj6J>Tz~i+b02YDmzeJtIuD6BCk5XsIR2QA3FF)rnfe>g6)@qrJRX_)`-t%WlHkWI
z{>KG>LinE`&i%&o49_hvnf>-6aqc(vKP~iSzr7+j{|!amHwAwZ0j0Bof0-fV=LH`U
ze404NpQ3TUK-`S~ZQ>k1`@bXfW&9Tfm-FokajuuwK|WeH>zxJX0hqX6_HQI^t^>Ca
zM}3@coSKA=<O_w4TsM{z$9PgK0{IHzFXvT<;I8n0Sa3OBy~NG-CWv$Y@H*H}ocn=!
zQs~S6-zK<xj#7flzmGY=ulxH*oa5=Fc`{DijK4yh<7EGRLSM#tz|eO{f6}6V*wAPH
zBNqMRhJGXIpRnkkGW6O1MT`C`hCaU!O<DBM82apg)}sHGp?`+v)_IHmw4u-b7cBbk
z82YD3|Dr|z14EzvuUPbF(Zj~`hu>=(iJSAMi8#+6_HQ9>KJSYS{R+kJSoB*BefD2r
z(eE(yM@hfaq8~T(*?*lyKVj(il77EMf19Dt{@X43qlSJP>E{d`=0%In0ii>tR+<z#
zk{_oF951=<og$9&VHw4O*=gc9AMO@>O6V*X{13!&Um*7j)5KAqrlc-)fjGWzNPf}c
z|DMJFittC1e}CmoIKR&@Urd{GjE9QqcpTz5&n0gqj{P<w+S@6(D|kxq9fCKKjsJRy
zE+0US$<g2Nn=)}le~()Qm;J+i%l`bnYwGutj;X(mxaq&p;_uXm2m6QL56yVm$UiRP
zm*dheIQB!F{8g+pk%yB($ipDYN7)MC04oMZ*P)7K+|X6A;ZjM(0v|8XeO0Ve#nS0~
zgwYvJqCpRx@Jb&>$M7s#UPq@<P!P@pJveCk-y{cQaA<Eb<l=NaPV<9rH?cuE{$B(3
zSDdanJF_sdPEmo|;1cWMairS{&tj0vIRlsKG}VjuWHPVu>;yH<@>5jaF@BQg`dJgt
zKu}Y@yWu@9@A7yfgv8}JjyN#1&H7u(aT4yy#O0ac9<f&W)8yF8j+C3_@qVrTAE(2q
z6qUpNzZpJUp8Fs7B(>`2f30Yv@|<ybzQ%X+TJ@i&`nf#TKL<Wsp6ee2R;&ItbcU4D
z-_<WJ&ji=FTJ<;HA9-;9WBvGF8(g02p8$sSbDUu6G)eW#JsaLYUraJLrii|Ok;+d|
seml@5@G<Mh+veOsfm6-+4gcV2JbzqobT>Lnu2udpwg0Q^NV!@5UkEf$2mk;8
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart1.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart1.o
new file mode 100644
index 0000000000000000000000000000000000000000..bb3cca2bdeead278fa4d4637273a5492340fa38c
GIT binary patch
literal 1816
zcmbu9y>1gh5XZ-{`3M3Dk`N(4Vk2275%^>qQ8-O5iosYyU>rvj6yaj8<&*pot=A|i
z5H6?@bVxK56ubeH)bt=q3LXHS0A}uHoXf_knCNb1e)FH%y}gTH+_`^uCY1uQ6nuh%
zOenyQ%t7o&p%1fg8os2rzh6`7Z*pPj^%9KhIHN>0$^rZ+CJkUM*^_!cuA^o_`jfRt
ze--AEEE!WB*TMDRjmr3?wM@LG%py;EsBCPks^!XqE!7wdy3I}y_Emdel<jD>p4&Bp
zcG$(pG&`ZyO*=ALmAqoEm@kyPLQyRTrkBGgzp_HyD=4ZI^2OWHK}@~T8D`+m-)Y74
z)Ds3s<KHw(<0RK+BS5PhwzHU~5_(b0N3x@H7FjPk@gz^fiKr`iTf$^6v45F(gZX(D
zi(g}|nA85qs(8_ye3SuxNwEdYea?lCnb(-hy04f&WiI-6%y*fK{v-1-^9A;wnZM^;
z^e_sHEqG1H?m;-L_CpKV7IcE)!)Mx<Q9rInJW^8hIJBKwU_!eeR~ve0<EWx-Ij{i<
z8evZlMn`#Bw}VmF9x89@evA6zA+?dkPuNT*9wg<kCEMECT(387ZCC4$?gjl;R~vpV
zc`x($q9@OYwM$%Ibhu*f>a)k_%git1oO2wL8*}W=dCB~uvo3hU{hkeW&|4GxjzmUx
z1JCL`3to#(#oHMU!D|kBJ>9oF?|+@b0k|bN=?wBY|KM;rSHV{>$l&D*VE>!{#pydF
zqxrOse7Eu*t}}Ok5q=?`W;7#dH!-1^$Mw%7#TdK&1!j3iC+k0Pxb!Ezy9TxREcnU(
o6tXjTxzA6(Z|>d^fnxZTl7z{+f-Yb%t^X~(6tvaYP3~_0KiIvz@&Et;
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart2.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart2.o
new file mode 100644
index 0000000000000000000000000000000000000000..82a44101e491f16b1d18f721c1e5c660de22448b
GIT binary patch
literal 1880
zcmbu9&ubG=5XUD?{ZSFDZ7oFww@{=-vm^n9^y1b=+k!u8n&LqrZj%?YnB6TeFH#R;
z1pfg24|?<>cn~}Z{u34d1J8m7Z#uI(L$=TK<b*IYpZA@am&vlPZr!;(mdk-y4nD&$
z6ACbQY#4h<=)nY>r0DHD3~E?Y`I>Khqa46X;!95cfEaoC+BsZ=sVoERmCbW62Q}<D
zb5uRf#rg2g8TTqT#?w29mVCCC<gm87y6h~j-P?BRaolZo{2+4Lv35*HIV*)-9k+un
zM!MMvjB1*`R!+q&7s|y_#VwVcMPG*njEYN3#NCoZC#7Qf8m(ir(N4$V=burh`H>q3
z$m3^}<*}1(6A7RxhwU_`xr|;E(~0cgKC`SBop_SxA@dL<^#Jqer!x1SWPXLY<a7@*
zS`q0TO3>s6s~8h6CUnRjGxwM$PaMVp^G%DtX8y$D`^<Nl%iIsl2h3;Ke__7Qx#$m=
zf3!ICeQnBa6BhO$=xs!SfrS=y{NDZNO6z`<o+ms})>Y4>Y)eJ0s&D+mSvB-;cH`!=
zAbOe}Z1xR4s5(v7l%bM`f$7wPP{n=jmEl#@_WNC99}jy}gO=Q_dUvJN*fLuA;q}Hw
z?ZLVqwYo~f_SQ<RUd|H!)d17@V8~7g%KtKJ@ky?*^|EJM-(vlF>~n@=as!U-K5v+x
zv*v=^dl4Fc2ffj$??|Lo*LRKDGvKyp@$OEq2W~SCLlqhB_rK1;26!bnZZ+~a|73C5
zli&*&(0)Au?281^-ls0<Pjh7dbIdQJCvLw%e(|~ONSn2*m{8B7>c_HTjP3dov!bPw
z`Hw6v^;vJvpps1%{APaw*(v<mzn|WR_T3S|I>R57WK8A?I*Y-m`tQ8|Wf8Ks>;D3p
CoXnm8
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart_syslink.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/uart_syslink.o
new file mode 100644
index 0000000000000000000000000000000000000000..60e07b6826dc66b826eb55d25fbcad9be93fe15f
GIT binary patch
literal 2136
zcmcJQzi-n}5XUbyKU!3z(pFVOK^Re?Rw7ms@k6N?(%+2)s7+D{i6M2JS7OC+D*FZ8
ziEOMD3u|X4#KKzs1B3uEu&}Z*FvC6PF123M3Gt%%?mq8(cQ5C}d9m_fbtshrUMYAF
z#}QM2^tofd7`sInfnhi@YG1FJ#ut9$*1>h?ma#@b?Wq``82d`|!+<wK(0v8a{e*jy
zdcGdR6&O#lq_67zk2wB#YfDS>=Iq*|EwkEgdrrf4eRH=Rn6e?vh0I>i-gQ0n0;l0h
z;mA%P%z~BA<g>YgmCKv6cF@Y8mz|qa+{&41Czs9NiL0M_QL{e-zy1so7z6JNfPt?;
z%fL$d8jHcnJ3JBdllm#-sYD&lyh?mH&I1@CdxQ7|idml_K1!TBsd1?Ky>kI9(!MeV
zoJ~YMw}56mF$b=*PMqtotr9oUs>S`c(N}e{3gTk@e!`D8=<*V+(ibV_zORXIX#5@V
zZQ?wq55)I~bDi(RyBhyV{6OQsi63fw6bG)(`Bvl8#E&$dA^uV0(6Iwq3-?3M^_!Lh
zGZD<x!3|5kE5T`oofgz>X_x%Eh#-h6(v|{3Z!gXZz2<TY_fV?JV3_o)BJA@uAvbKN
zDdeKpcABpL6r#<J=!mj#g!@czdPVs4Wo)O%r7-9xQm2iM#2;&*EAc$KQXMhu3lnZN
z68@^!e(uP?Q+VZZwRF3-WP9EYo)xw#3+3wFTB*FbZu@ml1hD*YAz!P=K-jH&Nscoe
zqq$DtocUfWlqNo<ag(^NpE*T;pZI00bBX-eSmAz4+B;x{GU(X`dx7w5ONvN>rS2hE
zJ7EZx({8ndFOxO?!8b7%j|7RojksDdz5;wE%ZBH~@iaPWUPT6Ex9O1(QLO5#KK%RQ
zx!xqMKN%;Lc)-%}E!3!*dVZROWvvGHXPiSvNwW;da{d#IbN{5}XKGR!k>HRv&*SDr
nd~<*P{3FQpv#UC3`Vy{iBL#73Vf<Yhl>d$9Ki^C1U-kUI`w#)`
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usb.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usb.o
new file mode 100644
index 0000000000000000000000000000000000000000..d05a00e9083557dc7b84e11f29d1120064296693
GIT binary patch
literal 9368
zcmeI2Z){W76~K?5LlX*XLxF+XZF$ME4j6bLrP9Kx)%inGv~<a0BeAWM<Jd36!m*A0
zjDmuSC!q<c`#?5SbrMtQR%w9t0crol#8|fRu~Mh*Unf<oVSM1r{sK}X5oPDxcaC$o
zwl`^?_90iwyZ8R?x#ymH&biOmhEoSdhn-Leq=ew7u-X#}u)TA&9W~7;JO&?vuGY!~
zcFzJtm%0E>EQS+*=y1comp{9|Jb&%dau^ow#zL1i<GiF3?OW-9r8fZf0aPaL#`-TU
z&)>L6^X_kkrLqGH_rh@b)?Z)&$KQFQi)uL6(E|Uxjl2?qc(o(C<T~&pvZE7a?r)AR
zksh)M_p(HKMd$arqJ7oymdoFL8Ww)}c;$(-1AV0L?<*_YXx{r+i|tg4y|g~rOtz36
zWE<H}_K{7rhf}PJY!kaKz^Yx^9<q<t6T4_H&20OdvT1q#`X#d4_;3R(-8J^WxoUXx
zW!yW(;+*m02Gad2<Hv{hbN$jF`2%C%v{fcZ*Ii2wjnkOub8w#n01LFnz))x*tj5s4
z7<-HxulGDapN_fsk9<cy+lul(M4yqr0$btS<nTaWGz9xf=*N5LXR`Me#^@%lN4_RG
z^6BKtN*vo~JKJfWQJGIMpZEp(o_vb-^l86VmG4OJdse^uBd30Q8aiKTX>WN&Yz^a@
z6z|j94_uWzEuqcHfsn~Xi9hWjJrFYabCdJpd9?F>>+4UF&2Fd`dz05>TQ$6Om$q+e
zID~%Pa#{P7_DFl_Xdu5l|MS}U*@AM<v_(%;oaoZ2N8lLd<5h4Ve(F&;Rs|qmVJ>h!
zpuXk#Uz>agp}#0*jm9KKGWUWL?OOzR*2K7$vw<Fojk~h)W66;U+JbT0C3!-6C^od`
zKcnw;Zcse_Tfbn%3-y_JlP_s5^)VM}IY;M1pA82p-?Z~6iFp)q&%YCbYyWaWl?gh>
zU1#8G68G8}f@g`zxXZcS)dpAPJcUtS_KR`fHHo>X_p9gAJE4&d+B^M`y|+*Y*-Uy<
zc+Mu%&H|mu(xkI6HR+iAs%#A6MSF2hM!!WlD*mUlQQh|XlX3>hFX$gw!N2v63;24k
z^sa9Ka8?ktuKSu3g-2S~g{VT2wX)`cH4m(LV9f(-9$53hng{;BJuosjxZm9|@`Xcg
zJfF{|W|EnlJDo4O{*34L?<o}X)0r%`im925@1^{5(R2GEy?c6l_Vz{g_PRTg#o0aB
z>e;!Icx10jBYS&#@rL`K3f-shnnhQtx)KH&tuJA~8(o7EMoo5UHK1P4qsSelAMgC8
ze3W?)_uu4tC-W-z&v5-2<^^72AM+9BSD4Q*k281iqD!S>o&aCPn(SF*eueog^8#;q
zk@>u->;3RD@{sb6>^zXK_YdtOr2HoGuQG2l>j3m~eS!J7#qmc0qlbP(pdxx`AEf^^
zLs#`sHw^2Tu2zAa^*oTTzg7qG^*oRl>uvq@JdmfXc(`1}Zu`T?^xnqjCftE&qAwFv
z-p9WuaK|onu!zV1itR>v9CTD8zO4zz?@<lqBTe}JCj9eF_)AUr4DwAnUc7O?iToMl
z<cABK&*F#gFu!8)pES|)b`yRFIr(4oO8t)}@*!NWk)PX<lbt=RK=kZn9<}%&^KpxR
znfau}k25bY7aLw?USYn`WDCI8nV)5Tk@>fg%UnjL`aa7?`N$mRLHsSKq5RL9@as+Z
zZ;)?NUuWrkN9B)(OZEfEx==1nMN-f`M~!qMHJupo{K4rXLtZIWL$R^pT6-wzClBUU
zyWYWE#;<ivr|6YD|4?k8MrqDic~vUr`Q-w1r=d6(^Yev*mxgpclRFYGCUd1}uL$|F
zKb}k-^?b<Wq){@uaU|v^k9d$6866wwA5Dx6562F~6Y>6m(F2Lvin0T=VkmJaHjyxs
z=e}6>%HD*R@-oN0;bMOFU~B@)+3a|}=zl5WWz!Shv2vz}<_rxEB@T=y;&aj(%;rm;
zbjAu^PTJ!|uaGQy6LU~ZrZf3$CU+D)IEoddihcpNYT9T>Vk|zANPEXY+QZp$X(m25
zoSDuO3k)6dj%QM6Bf8Lrv2qC)PNR9jMn=4xSIneh$Ye9Yz`>H)=rC?g22%Oi*<>ya
zUe5Q5iK%?v&*qb9bTx)u+ick}n9t?#_JB*)4@_r{;H{!=1Whl`*5jc}DOFR3i%QzW
zy^=``bQ-0}KsKK`imAX`<XDlFv`vzLS#LH~H~}yA#_RonW=<qhQ-FDlQ>ev-k0)%#
z_YK_{q{xZrL;f*=SU<;Yl9#!JqRc;R@k!=eE$%aa3c1T|s=mQ(+n)2x$(~MbQ?<x#
zd)*t%Nq-l&sd~U|+kSj?nqu3zk-4qEow;p)H*?$m-OO$K>2r#Tt$$MK*Y=-Q{Nuq?
z^E}&xzomG$lCL)5x0&1iq0cEQwtpTdJ)a0ff~ONyq(|TG=yQq+?N{?2C9m^pA9H)%
z=a`fKpAJ--XH@Y|Dvtk-V~QQG0&_cFbId7TJCvT2N)O$orBsw2y{|LO?f9NmT+829
zdbA(zFt`2C!joxVyTur+w=2F!ahJIrm)*?mxQr`3I==BHdR}Ux=cJO?@0rug$<GmG
z=XvIKd@m@j<9ki<Pb)pYV{Y&FT_xY6<lj?V>#s7m{Ua|yvQzuHje|$)>NsxXjvdE#
z=61fh%t^oYe>Zd69=V^%y7E0{PRUbKc!jwwf4YhM515lZa)%=K-B5biRmQ7tDLtCs
zQ}Q|=K2V&SM$ZH8*nVr_`=af)cILL<T;{glMwyEr%%b=hXKt^XR{HmgFxFYcKdX2}
zarq2Y!}M=3(4l~Q{u1A%xZItI_bR@f+r&SmxU2Xxipx8V<o7BrXMwo<2B3zGo%AY_
z-vhLr#0xl&inh~m4!&NOc$I{)=yi!N(gTa+7}-Ne<i^b?ekW(nU3`g@PR#nrDXjfs
zP|rxK=w*`;-<$IxlBNq&WU5qxNGdgJYBNeaf-Rs&(uh$jg14_ELb@&DO|iDv|K4zM
zD!I!3#vesS<u%TipttHz=|6=HIucO<TvxXRjY?}!Z@`MykvK`7&}SxbeI~IB@AA6+
z)KNv|3!={&V)lHOH}oeF<l3H3IoD`?nO`%w$^6eXoBvoaLGp&D+v?1J>S*M@Nj`)Z
zc_R6bwj}n8|6WAa$o|8;{$ZXkmCTp^3)pD1ew!Oe==Eu?%$N1)cQ#sI&O<N@&n2(_
z6#-n6EEQez5eo+R+5ULYxWjos-{<N5Y_Go_nH_tY`N0-?0^GEe%euiReHU*$|B4$(
LOp74b_WXYX293A2
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usb_bsp.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usb_bsp.o
new file mode 100644
index 0000000000000000000000000000000000000000..66eb52f0229d4f7729cc7f46b53a304f7650ace4
GIT binary patch
literal 1136
zcmbu8&r8EF6vyAz;U<EpC&9xa2u^UNEqa(<=H?s&nZmY{htk%L7W#`ch3({@<<&pI
zi{iiGU!cjBur5>(76|XXPu@50C23!J_jlz|3B)MDE36_x0h02{Z!g?7)SwD)iuqYb
z%7>W$iJ{-^UZF;RI6>n$4jj+&BQ%XMBA$zGnhB1len36!cs_9*l3^FMRHJEVdP~&}
z)Ua^aq@H$m#<;2@wxVms<*G;7V`r+s_m9k3tQ4M@@!X+vLWQo#V`l-1ZjS9!k<($9
zl7n1bkx}P-k1GVf<{U|U$hjtQ$Wq(1(?oUPWCoK_$9x#~&Ccl297H}@1HH(y19uP+
z7vn5hU(0UYz?!e6hf4%%IuD6uQ%msDdcq^_jDY%V5erm1O+j_yFmxlrd)&kvQ8Bya
zEoqZBk1r%H?or@l>M*_hf`9cUzvwB|);7?e^ZMewXt)@n{*wUQiu!q5^i{s|{2EVW
p_fw^l^~%QK(!e&g^4Zza7uQ)lPZ&{G#QW4K(zke1@-Hase*uy>Xqx~4
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usbd_desc.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usbd_desc.o
new file mode 100644
index 0000000000000000000000000000000000000000..301bba0cf6314fbddcadbdfccaff99df6f2b277c
GIT binary patch
literal 3704
zcmd6qO>7%Q6vv;vp-P+Z(WIr3iqr)~C`Dvt8zB--8{0`*$t5OsN)VOYjlGUn@|V^d
zNC*-UTsUw@C9d2!6vTl85<MV<ID^y!MI1N)Cyt<ANTmqg+kG!PnR<)h#8llk^PB(s
znAx3O=k3MPQaY6aX({*u;*n5*?XkFThg}=SVGQ!=y;U6U1K0;o0qlHj)PA^N8h7OX
zJMiFn@fE+r-LF1AG~fpDUyal!Xm8vdgM&#N57PF*FUBOX4}L~_cg#LG-2LXJ_)<>s
zzwiY3<S)KYrl3kO9gIOSDaLi|t1<p*UX4%M|66@n6O0%qN64N!0ckY0+{=knG=6u)
zeg)F0w80a3FR1&@o36Q#CpV~6uRNDCuX=v4<+RO0uT$>%f$4S4OBJ)zYq+5ZF9mek
zX|_Gr%vl*6UoDhT-EDfCk%GpTyMgOBojN(KI&YYT)oK|-#W0fox9f7D@S-`h{L-3P
z?e*IAmV-4md%hX8a4oZazt{BI*z@ZxFL3L@mhYPLR&F+z$<ABZoH^t8omuQ<E?y*V
zWlfsNW^&IzxE$KH5%}Y;VJc(j$pJ9%->_z2B)vTx0=a9)XAOAhIKa_kAxYv%c~2z7
zxu28JfYJN(cphOwS??KE%%Y8II_^@y;c1LC#dv~k1uexfc`R}II3~R`*{MAQq_=ru
zob88bhvlW01?kJIn`8T3g8nDg@3Zb2+k4D^=dr{&hqsF2XZV(h{skOU{jzhX*smP&
zc%LN>Yz;OVwT3&WTXmS;hUo^ZRr1B!T4l9XbYJ)CZV~5vuOIY$s4bUP@(ZQf%F<G0
zv0AGx<V%aSNFQrs|B}<)yj-jVz7iq~9!(I9#TD20oc0hgqgZ*x>2BfarlaK#(J#9J
zQm?xidzAfNW2;VBuY{Hvy*?5qkKQFi=A$*gj4v#&>A7KS%()uwCU5)ENt?v|kIq;$
zBll+>`6D7mJI#GvKf|2#>hoqN=!=S8o_Rv+iavfC0IoAXi}6+7QuJ#5ZRS*u8b4ru
z9=V(;LLV{L*Y&BwDX*;UGv<2y&zVb|qQAvl&--OUoNt*^J(O3@!|eq9_sk`)=znCc
z=cV&ZO|SpY2!rIk#A7_lVUzg6N15yUHqKm+e}=hUPcb1*N#V2)>s$}LFR1D9tIVZN
z(XTVt^Il7c(`GLFAkSGpK_4)eyrSP`uIGI#Ax^X^0Q%`E?{H$HJVE?X5uugmi#UCI
zq)l;$_*sEyO@*IU_>96IS9nI@=M)asV5bu}8)ySRvMuTPZriZ}cRK*9;RFs?8-oE@
z_>RK?$+OlR4oMUe?15G9bvkZWPN$ma-}OzD<C2fPBPfDR7i{m-q|#*n1f9nYeN$}#
zY=7gI&OU#7Pa>yKa$jV>pJpC^p`!q|Iqx&k@aQW30-nVVG2Q>3R=4PNoW%)ZIT46W
zN1a_6vz7c3XAwE|_56G6KbPPy*v8JV{oCdb{Y@6q{?V37e%ZejWRzc?JM4z-7UzFW
z09&bBwJbfRoZ<!bd6LSZ^QGsfy7aYEp!fKv<g1d1AU17?zio#5oBVg;dgv8jbpO8r
DYkHTc
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usblink.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usblink.o
new file mode 100644
index 0000000000000000000000000000000000000000..353f6f791d849714c88d09dff8c7ea5a6a78362b
GIT binary patch
literal 4944
zcmeHKUu+a*5TCn6tbkf5APUkgsis7_w2d0hG-lh<7UGp+@0$2G*X`YwUbuhk?rBR+
ztbH&%_|Q`ljZcISLwQ9b5B`h3`at{_9;@=M26-UiQfGE&;OpM4FUB{9v@`RY`F=Cs
z?DqSXw}+D>@mLH*V(>ZK^#lcIZM|!ozG=dPum!%+GQYIz+RyR>usES&^@XoikZ-xJ
zLG4B=wsJ#*ON(0;C!PlL7Sf!Jzh!>#tJZdDRoi}v{Pqp-7q*i|dl@)~IB%o|R_Y7i
zUL<bxx2e9=CS70naz(9mvkkD0nP|Tar_RJ7ZEZ9Y+mU-Q4z-vLiE7+Te0>^D9o5#?
zd<Wy_Hp12p9ct7U>;b>#%{KE^ec?O5584;?*#Uk|Z3*{9xluJ*>TBuqd(HQu6Kd9`
zfS2n3wzl?&>_P3Hdf$Qkm$8?reFKTrI6OoA)c;w;e#e<DEyZiG4OllG)TVh#U+*q$
zs-2I+E$Po5jMZ{DOAQu(h(8+S>*!DIizR5D>fWRu+8@nNo@wAiEqD$9hH-G#Djam3
z?7^x#UC5VC8d=PNO84__{<N+4>#3Jh$)m?!$c&{Y5uZ#Al1C}`<lY4CP2m5Y!06D>
zb9&e4u}M8$E*G-1R=%XqlpWohwe^ASic_A+7tnIDvw6?XdR52P6GmTmUr%qs=<U<H
zET`CwR?q(Zgd4p&MS6Ss=p_0V!7~W(C|_%qqBXr?05ts9Of+N)%Vr;-D(mGTbmI!Y
ztbB~|R!(nW{S@Om`#IL6G`LUk0@L(WBR+&U)uju8<Vv8x^tE)sASyZwW6HjypIOGm
zH_<0?@rUw{_#WAToM!wu`{qVAP-&nz68Ci@{vqNqCI1}fUuIl<+@vo*3eNtWIN}=I
z@8_t$Oy6n5|3EyZ<aa5HG<ZPq0+T)(<Qb~LdIY{12h}XUBLY7Vfj=984@KbP5%?<+
zxP|yOoWya|BxeEz#fbcB1b!w0{}^%NUqwx_B~b7Q<9~*5xO<y-&WV$@+>>IbY;U+^
zO&4qdChV-8f5Sd*Wl!23bmjz4*`*wVS;wmc=3%>lxz0Se7#*z6%-9a(-J_+v2W2-k
z?`F6>RZMwE$vHu=k!S2gkry_`QeN4yPS}maM9#ciZoC3xeQB6`v1(Us-VkI)ljDN}
z$;|l3NNPBpNe>JrhcnptsSJJYOje*^=g^y|mhOOu%Wsxw|FrkRmS=(Gy0+tuSos1J
z?P9hvFVpe2jG4X;>JB-!<=MDvFQ0`uYH}SSld)Y-NJechiLKBh?d0d$hR;(ybq+DU
zH-z^yz8i5mBSn&I5WZVL)Gx73{CgDqHMSFoKd#_YY!lC31^<-oaG!E+?!bJt|L>K2
zweD5MscyT%{}bEcy4M&F^Iuo;b+$>}W}Et4cN(EjBKWSrg$;}oznb3?!X>|zaq6>!
zIY{kdJUpL0jEDR0XPkKUDLhjVJh=#-iozrB647}I&sK$hPT^7U_Y|Hdl>D;_56!2C
zV;?CvUnzd%9OL2l_5$NFXW_Z1;404-jMIFcRQi$gQ06T6>vhiGiJIO+!R4H!{GAHV
z-<(hVsJNuy|7rcJQ|_V`4hX)?zQhIBg}`v<i=H(NhU+<jo)ycn3zp&8a~>EuI&6$-
z*9F5VlSApf#vw4W*<t`wvLC@^MxmUw3K%RGi+0JATK_>)zch;Q7lw%#$!(rf;5FXO
zbk@+kO-W#VHTd9zW&T9mgg8;j9Odtco-N_wFUfxOWx%*ds2w<f0pbj=H+lVXXk$`e
z_<GSG&OQNH%lbnhT-Hk;CdQlfKgadWP-C)QXvZSfU*S*IE=gn^UVjAfX7itVI9Nb&
z5}H4K&B=P1|LcfR|MK^UrZ1~p|5X84%f40J>`}>g?KR#%y$*C=h3nIq5*m?TX%{t&
c@|hG0T)$T~eMM(jv-KBw|1)Yb+95jl2Pc-%VgLXD
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usec_time.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/usec_time.o
new file mode 100644
index 0000000000000000000000000000000000000000..d89bf94a32becdaebcc15956fccf849ba0e08dcd
GIT binary patch
literal 1304
zcmb`G&ubGw6vy9ot8EWLwH5>qjuNB=Gh~Az?P)b=TTs!mJ$Z<m&9u9i&4%3xR1hql
z1TP96yy?;ZK)m@kD2g}#1@$cGdz&}OGKn__Ht&5u^M1_R**v*%>*k!}fLRW_hlw&2
z;M?59_e<A@C0K-yZu{#w;eIg>=Ds)&@Ur&%`!o0G=_eQ7{p!^G4+8ZYfQN4Z0_XAI
z^8;eOcux68sKLKb`lMm2)!GzmTX*(EkY&9n4wJsv&vKz-C9c&6dA6VQ(95GZ(JIoz
zT!{_YtT!9phV+_ZEzHw8dX4pU;?fhe<29OBCNtO`%{&i3|Ja<gJM)bYcV~qoouA?-
zN;3UsmrFh!zk=MU)Tu_eaBQmnMI@&x=QQz`nUDGa_?&s2`CZl~9)^XA+B!*<jG%T1
zwQflQ1o?Jy5Vx{nUqjMQ^d1J5cpOmZFdaa!bNgz0XZPNA*zfjK&h<_I6?_HbUbuIf
z_g5_rvUrs0u!C0TBO4npSG`bbb*MphLmh(b6a~mAOH+ks`#(!y8M>|GRym(_U~w~_
z!DrE-Iei1z#{55Ou%`OdXOZ<8wsfDw?Jw*V@7soAtLqX9s`;<{>K#y?tvzH^)0~rH
zXqo=^M{@jY`d2NFI*uXd2P?sW3#gayvF9gdpPf>dx#%v5$})WoI*HD#{MVenX#&~W
G`F{ZoX?MN=
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l0x.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l0x.o
new file mode 100644
index 0000000000000000000000000000000000000000..10ac6646c71a10d7400780755eba69d7ffab310d
GIT binary patch
literal 2184
zcmbuA&ubGw6vtnhR#SyqOYv7h_fVvYU6Ry_?P=SnHP}i?qJkdU?d~*L*zA_wNolEI
z6}$=s51s|F-n{8af`5S*J$MqVcRdOgeJ`15remt06E^S7XTI+{vopKNz01>AIuZ$x
zEdj5f)sqz9>b_QPHBt+@Aq57k7wXBm52uXed%EB+{m;q7*{410eF?C}pws$}R{gS;
zVgl<`ru%no9Y49f_U1(nb=yhU*m7XwL2A7q{hoE!Z+{tqRrGkgz4mrfT^sr9e)Yxs
zyVkFd<Nfrh9%@d0dLQ+>{ODd_Dwi8KhNiCHFiK(QI~CgtjKwfAc!e1g!%I=P==qpM
zPQ~NQ;kAevV`g?Zo6d}xnXEBnN7Z4>(r3;PH!}u}WYXDDbl;=V8Fs?ApY4W|ZBG~=
ziJx{YiB5Vu*Z}RG6!PiP<<NtqPnkC*6oZ2IioWC*1UEE(P4Kkf{UXj|lpX>#!V-Sd
zyt4vI|GR?EYy6SmR7dT6Gr%UscK)xClmAPhll~tCuWS5=;O{hk6t|LmK50BF_*cQ@
zN#q5WTPpdS;Jp~B$@M%G+z?#qVc8!Y@zX1&1A{BFQ(`gCg+YMNq8A2|PBA_cy3EgC
zQb>U<dohYyu*i5mo11Xmh{Z8@S;u9|w<3J7Cs#R>mHEKqYF=bP97d9$MbRq<wqLM0
zoA#=xReTDpd{I%(FgwOKrpf|dLTON*thr^j<4&vovjS(k>BP*Rt@$yVWsw)U(jJTV
z8Y*%-qD|snPz!6ZtSItu>33RSwp*}+GHVUZc)ssd8E4T>?T)I5ci}Tt0aoKQ0Z!og
zHQ&7^C@K7a$SFJ#`2gw<DO{dE`5aL=nDJ_r+Y1<Z)QlCGMa;KN&Q>^>uFY*Q7w}+B
zC#=$*s~-Q68(2$^rt&w_aI+fU0E0BBH2qy1z%hEJEk#4=ruZqE7o7abO1>Az1V1gf
z{tM`8^9p&xL*^9E;YFVRTA#sMnktQ#+T{FqREW7;mKr-W4Rz~6V2Q!~$mr7VzZ;pp
fc0|oh#qeBC)PSw|MHdcZ(yl%w4s=`!_o)8`*bY3R
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api.o
new file mode 100644
index 0000000000000000000000000000000000000000..3f910fdffa068840202ec4bfc562458c8970d8cd
GIT binary patch
literal 18304
zcmbtb4|G)3nZIvd2r=PLNCMJe%}hk)k5WKVeXXawnV`S|0!b8((w%vk8AzJ{lZi4U
zD+8gGBc7T-)>?bc5<t6>wOh8<Em2#7(p~In&vNS4x@~uznIPcScBz2;GtU0L`|h3G
znPhDD>^moU_x<j7zkm0;-~H|lY`<^y{SHlI^3m9j*yxu;85>$Q+BSL9WCbjrO=PU+
zEMvVRov$7q(OK^Ve7}J29K3hoeTJD4&rPi8LbZ1IqRs~HLVNoZ))v2Ue`$VBv}$`f
zYjc(CFFg#prHr+m*~cQg(Z2ME<M1V2pLZtDG$!Uns~*yxDD~#Bw#&2F)rl-x^#bq@
z4zWlS?=$l?<J`+E^8PB#h&5<Nl(8Cb9&0;0aewLA95!ux5o<FwRztGb1XdGc(IQt4
ztGH0@K78pB&*96n%&Q}v|MKFH?tN$Y7OnSmrPlk{$u0N1@7H=0v$Wp0e&f8DUNQi)
z``Asa*!(nEk$BpSoYAMxlYPUh%)!&u=HUB}n1hmzjU+3c$!EsCk0u-A$s#!<?^{CF
z`^n^uB$Kco0i*sHurjCqEBQ0hdF-(3UKS!>`(V>j_~bb3b^BJn&E>*3Bb~>&Ek4*O
z+wSlKWBQ3_9CLCa7Oko@qgCY?%kVRsvB6vNSfqR=Gsq`WHof)p%Z=HibcVkxr@E4j
z(v5WfgvUWbkN%S8{DQ6xAf9???p=rnpF`^<J)?hIZn(h5w-fXA(Q?E3hGsDE@;!+;
z)K~?LAs#d)rWbSH6Xx5=dI_UGX)pP9r1K4K^LXPvQhbOpC8|At?%NStV~|hEg^dYa
zn@4)faXY>;+9tk^^Xc>>ov(3!P&`*4_7CK;^)9@ZB0ews^}{!Uenl>;`B>L_ZGW+W
zxISYb3>iNx>MP|oBIbq|Tat<)e<kewsU5Gyh*8AL)*0qt{4T_c@D;^r6mdGN&*U+h
z&`S`*#RDbD<hQ7=AF(;SXT@B?IzFCk#MhdG;cJtP@TZeuuN~*nPY~zJ!58`vU2PFd
z#rAl*P`tgX_?r9UV!A)1-{c%*ep5VpxPQ6NBbo7+NsqNqL~GzA)_^wT+T)t}0G}_n
zm@m>v<uTIvV?H0`>m?YwKbN(g(^<`>Vs`aG%*zGHcR>Dw4ptEtKD$Nw40CX)*t}}T
z+ne0~?QbmEbIgH!hFoJ6O|jQGXhu5ies*%n9^&KJT{%cTEEK$k;Qv3tSES#EiqFQ_
zQ<!d#2Hj}PCt{4GuY(O~wso2N$QGTI>>=AO>5h4R@Y1oiit|eLFz~5;QXk~=sOWp{
zQ#(G)WU`_?zhqCxI5etHN#^kh$T`SIiDRtyLIJx<a#Jxxaa%CzkKtpcLG<JcKVyp%
z$nnF+SSsfF5wo<us9*A6z<6%bqE$)Ik`HPVlMNs8ssrnp@+|esF>%PC7<VD}^R<Tf
zh-2JapC)ViuO}-!j{Yj*A?b-Wb}d;!-ww9BisVb#s_qoCBb~3O;^(677$958zZJ;I
z40CV{@#J!_n)n6A^IW{sjBs5x-dG)Dtl~K0%KBNw9v9-F{f&w}I~;6qds^I_;BiGh
z9-SK-i(eN!w+o)jimGWZ`aNQS>?dA+@V0jAoOkUwd}X}w^>PyHrKb{WI$DMGGDz!0
zom;Z^Hf9>-Ii_(7_SyIDWo@@kG7ZnOYq!O}wZC*bz7L{(8tvIEXP%c$Xn4a}$@^UR
zwlMdSUx4KnxY>jP+8=gdUi>U~m4{7OMRVlGx}zFlSC>}o!Vkp~?ccuLo^7Z7%!qGc
z#&82O5-pfRtn;|v_5=A<=6#Yg0zahI0FOg$Ab!ZE9X@0liN80E_&=D2e`{Iw``?Eh
zcn6ra%Fna{lI_P2>B#j$+k>BggBgD8;Z`m)YNs$GGaej>N%EiE9}qX6xxYA0?X7YY
z_lK4;M?*bqk^Yf-C-z_s@mfincL03VwG>0_B%Wry$APP{>jXZ$59<%M#$O)YFUdcs
zdn$Y%tue|9SsUnT%A9yl#Cy_cEp$=rEiz~6BTrTBcjygypd<a%d>7ke8f92dL)f!o
zPup!D+WQYqZ99zh#lHDe71R1d-3O<xr**WQv4(Ra$r^v&@lw(`G4Z~+!?%y_BPRBk
z`0dzxcItx`_LuQwMXx7QvYcqMr=Em<tYI$Ud!8(ELr%8?<>*b{u40b<&@ke_w|A9s
z=;mmZ>o+^9^e%l?8EQ+KXMf?2QnGF3Rqzq?-41;f@%R<S>1{i??JKV+wxFME`2~+J
zyS~x?1~~{A-$%s0L3#e(5s^PJC($Wvz2!rEpr3qZeVQBD_2i0e$5FRw6Z+ETa0t19
z{G)-d?SnU7q*#(|TAK&%?@1eT0s8o%!vxgP0m#u1ixcvgp~og0`o+mc&L_E%%y^Xb
znH^(xo-VtIg%D@+`Vo)NVV){;$4=U}?AkZ8&(4STeyYUnzyb0L@*?JFFu8{r$*1v?
z%$b|~!sxt5Gh%MMxMtXch7r>V#CB#}JCXM+#Pw2&YpR10*S;LQ5!d~Q^H@gQ#u2xP
z`Q{+i3PeAQ*md_$owgm{WH;qbHTH542X2;AK=?KIIf3zUjQ4^*3jV174QkVxa@_xQ
z>=}*%7xD?w{}J>75q~shC*p5E;?KkM0#9LgsXIq2aJAk&jc6%WyC44s#_Or^{{@VE
zOFtUwPqHZro%^+D5#@}fC9G`)-V_tA-P(E&Y?U=7Te!27a5>L!&|HW;Swjv-Jn%D&
z5An7GeHQjnJEz(8vm7VK5Iw~Qa(Rt4F8%0!NOSJEvc}LpSz~ya)?gxkTznIAr<|Rl
zsd=~ewBffgzr&!pke;_<m|t2CDSh!xwYG{;4dqAOOBn6J9iOf-C?*m(mp%N6y$)kK
za^s%+d7T?yYGSXm?RNrC+)cG@$(Y*Kq&+&{G{|?VJj_8w2Wn)B6RHD8I&B+NzuGZm
z<C%0cpOBxnKWNu@t&ze;I$!4X#ZGa4qH`0Sp<?)nmqn}S96>hFnxwkl4ISy5=I9dE
z@DS!H2K%{eoNY%sf5GdCkLP=g`*NdIbmmCRcN^~%v7$K6tMA>++G1aD8?{BuI8%H)
zVo^*MxFaTNnfG4GX=|E<v*lggRVTW%Sx<Cn)d#-)?J6y|KUBN<nW}?R`a{-D+AQMh
z$~#f&HMIuUy@l0&#Ht(n>dr|xOKw{CwyUeKdVi1B=IYs5T8>;ub;5y#J4$aw`}74f
z;zw;%wuH3>XJD_tj_(<4F!7oh*#&&_Viwu{HD<Wb4&-WcYs*>0na670!a2Td8Eez9
z_w>UDzGh}z!C6Q{yL+!bn9yg!XC(u>p3(W7U!H3BCG;CPPCgr+>PD>0#JQB_xnzKH
z!BGDF+lFyB(Oo))uNCT3$HXwEjMFXK76V=M<|&5NY#P4BL;U`N<(b<W;5&5=F7xx6
zJr690t>^mz>YJ6<k~Kp`Y(32@$52lp>0@6q_i8xnx^T{Q)%otRVB1^B31_wbsuOyD
z)qb?e-V=D+bmm|g)*BW}%@Fng>LZztqklX6N9|6uDgKtSX(89WtjI+<6M3W#Ia7x$
z)Z)0a!JhW6>u5~RnMXOquk}<dWqJeU)fJ$>MSMqLU!`at08Zl^VJ$-E>~4WG<i$gx
z?UpoAE%E_qbb;@HzI<$>7NI;CKpvB_Io_p3{u4NFw`!5!$o5t(@@urmv*#q@0dw1f
zpI+@<>nMY6Zc*F%g<L0Mr%tiQ3HvHVUmUm=c1P54-J&mszC)s|!9FdTPN$1L@~zgG
z-luhCe6u4(KG-XD(^@n7x2As+EzQY6AKmZRcWv>cT`N-FEx|oPqMJc))|Z32?=<r4
z{xDnQgD&J#J1^OHTvVsXyhgM{7f0=;VgV)pa(>9QZp5idvrL@3T<6pAU8v~}!td6p
zbo>O)UT)+HmB(yg<)GCvcm!}B+X;L}2LAljWW`0~J<5aAagO{L>z3l+w8oaalFOzc
zul2riGb=jwD(bCdvIc(O{H+W=vvY8kM}8bc9MOKU<D+!F9HhS(Lv~8P9so}IKMxxv
zM*2(I)38V43EZ1>qfZmObCf=+HA#jmL$3g6RR5e7=Tga&{8EW=xQFW9;Yinc7kqQN
z+l=h=u--R8a{#%3cm?+6Y)y^70{+OYaokh-zR4mK8&-MF(b4_FjuG-HUtic)5TmrF
zO6Z5~AL)EX{Ai8H`$b7F&)ZRqp*t=MZwquZR>rWTrMEoy$TJVl>Ae)soIhd{@mrC=
zdET@2W`0Jbnv2$#jN!y<qh~=o#_f9-l0|nUBb`SN<Bp(*bf&#;1J1J~%f4S`16Lbz
z4qwBaURezrEIVSaAKFV#=bPJ{`K)FJbT7fr_4(}TOuVmlYrUj5@;leD7&^YJvn8|8
zC$WzwuqDslaOLiyuM}1@He*#8o7qrs1FLy0mo1qw^_|iK`E*Y=ec;#ti#)8)SoQEy
zR{ZKevdF7Hu;pK$Z(b$7n7h<IPC5K)!!qpWC;5IJ*FT4SY*dHii2Vx`JOAUR`|pa_
zg`vn7vA@pLSpm`Yp`Uz8eEYCIw&Tv~I`*&aI`;pfnr*vr9y&!imA>_85v`32j%ZPF
z;XXRIaXq9Cq@UD7_VIgkp<{ag^a0{Svd5#9d@evHjeC=H5V2>+$3OFU!#VqxG;dT3
zT|~WjOOEHLeXqp^V%1u&-(>5Dzigi`tb?pKx|j8On0-fV4dDAZ<@*Qt290N;-S799
zSL`})`ap28X#|SQ!QnUcE44S{KEGHq{2up}(@(QVq8hc)?d&Sq!q*G00e{BlL+U)z
zY3s}58G4ew#G7=bal>CW2dPejF9vpmSTETH-KXg}4(wH|ZwK`Dk#0iw9njkc{ZrrQ
z^Fe>9d*aPX=w3{*Fz@|hw=s;Gu6#ASa{6}j>a9-Pnc(jf{+rogz@uG}I+sskgCm``
z-t;$@KTM&!!+%QMYtj0n^)UnM=1m9dr8PqL+EyMLj7%~I-IJJohmEzkZ1;+7uE{(<
z@N>nGsP8Er?0Ee*?jN$3>_eSXOy@eIjD`BKzG!Vt#}BQ|YlpO6T4Oijht`|DrtEQX
zy%aXuZTXH*^%!g-o3>PUHlW79eXTpviSOaFsO#Fz!B-qw!7E>3MSTvvpbziM4oAUE
ztO*PE5t7GuCbA__tkZX3=ka`Vkn~}Bzb$1>a~eb4O7{k{XPVpkk#k-F-7EROEj{MZ
z8p`o~8SN#kzv`8I+->9!mHw?``l|lN*{l+b?R&hi`qC{9ejgtf>y+D$eM;uq^z~%>
zsn4NJbKnl3@9~M%G>-J_d)zVW;&(>R&U7Ct^(UUhht|$PtR0E>W6k{?zGcphAs;@6
zZ^9-0Gx#3q{84J&FH)=?qL_8?v%42{6U`ar!#MJI;x4xlzuRqiR+m(}@Us(V1v)R-
zdG{?o&uTvBvER*l=?o+1-Z>HXQ4Z6<*>H&;XDq~2DwaOLd2w^OX$1GW=N?z^I>_FS
zGeaHvU+B7_x;7tY1H8B6Tuk>1))X`H{stEL`j^}h56&N_A7K#>=3q;%Y0!DZh4%Ax
zv#LEfqnyQE1f5k9Ygr^-%_1jJ`@IJ~!`;lFTA1qnGJKzT0%wtZ%;*O;2R~HvN9m0{
z&4v0m>31BZH6JhV9Hz5_=XG<hw9)p5y$=yT>W@QDqRmEE3mYuhMd#)ZE+@y_yV3n!
z|0l^Bx{F9cuLQjhIgZBgmbu5ym*Vdm^8OS4mwNf=EW81}dc=$*)<Pc6RQQ`^<hyvE
z#eIhLoHjS!Z5p-tEE1T)B3p3hc?S0$bpLP;@qYFR(BLjKiSIhpzwf~(Tgu@hwB!45
zKSJkb*o&A*yC-!5BU&HEI>E<8EUNdYsebTsp=P6g>`!StJh)FzAh-D0gn2u_Z#&i{
z{oR;k(cewoLN56Q_Tu=#7~08=Xe>rM4?pyFXgKZQnV3rmW3z9)jlbouhgMhIwR(}$
z-w|H4U?D*Ddr|5ed~&pjIuh9pkdaL0=d$IMm0xnsS^mI-&YG5%Mt_}E-|XDn5^{#?
zf=>6Ht)Z69^^ItS{B`x=pg-IZ3ObDii|<^#aFMZK(PHNuE7Wu+S_|jSC49jmC-p2^
zxR|QR&v-QS<*+{`$0N}h^^SdXX8RzsM+c|OX9@?#^4X6+^g9&(0fj_o=*)Pi_+aDU
zR8$h5Rxy4xr?Y?QELZumn>L@ZcsaT?g}zXXwCTs%dk3c<#b*k7dg<6yGM^;?Bu};P
zp)7b)7W}C!_)EZxV8M{^!)$!h^Ar3KeqP`=ag?!l1zt#jj^|nX#r}ZzczRv}PJE6C
zdO6e6z;`_Qg}}K!8T2c&&<6$msSNtZv(P^$=wpIj>hL{*pBMNfVb@Qy@OfL%%aFEL
zHDkZeLSF#BWLKe>dMVc_aHqg83b}U!mox(6uhm&_e-?aO7W`@8q>ocfh?MnRfiD!e
zoUgaD@VO@F%?$e6VUOgg>i+<6lDkgO(>kOFcUK&5&ET^u3!i>L9~Ja-Y&PsQfgcgL
zjL&xjzD}eFT8H%fN%9eRmkqN5j3+(i(*983vw)9h*W4`lmjs{lB6SQ2J~dhB+q2;N
z1fL@!MM!(UFYuVaj|l$91>Pe9vr*u03!L3x1JafY0xuLeKKU~hevvc+;;#k3dHiJ1
zugXIIH9@~n&=0}2^gJu@^ZE97kNslb6L_@124)NVn81$+e6_%T2Yfs|uM2uM$tK(=
z<j%!>kp8~OHr^`uxPgzy=c|JLl%QWI=)+m)zai+Ey^*mygxv3Eq5p9f{J#aCg;Q;T
za$au0e2=GRIdHPe6!bDLd9u*^1^qffzX|J^o?Th!_hi9e5PXi<8z1|*&4wKlc(lj{
z&I|lM1m0R~1E}lxgMVZ<u3beiWITK4Wx*@6;On#CwOR14Ecm`G_zS?v|FP+|JyPd?
z%|ib{7Cay8g!r5nd}N()2XM*LmSF#0FX#(#c&10Lm$oeQeS+Q;^gcd{u^(ok|8*Ap
zlHk)X`20}B`7EsG@$~#MaK7$@K`#oq4`!j?lm(9nK82sN85|LO_GO_zBIt(%J&Hg6
z{8r+#?C*7g&jra}6h2{L*JR|K@$6cV1%C)Q+1vAZn{kfd!yav{xT|rI*J`a_;AgY9
zve^Mv9SpCoZ>kSJWHojKS!MNxn#vUm?yg{-Wi?i9V^Ew4yjy}{Z)+&nj#pDlAm|Na
zO!F46fAbbeL0t-k3OC{u;03+c-_p?>_J*u*iZ6}g-R<>Tnk;X)4l?Rm8Uu3p@?iL(
zV5q&mrCCANg<1j~{%}?B(fW*@Wq|y_mCc)5SbI3s>~D=I!>X+2Ey3!r74B%S4u_z=
z>?7ks)ah;Ky?CkJ&|#g`cwZ>g5*j<M)oSzxscYOpBn=`}Zrqa?M50Kb+Gk7RgQRYl
zAKNH*AOPRAOMFAf6B%{m2CH6>d0JY+!Ib-2TN)d^IGK5C0mJ=Gt&PEOrZZ_)*I-g5
zYZ6%x^_u-b6(+?y+JhnQwwC4;ErE!IU`t219leqTO=}i-3=0@No;YZ+vN;?KtqEG~
zI6yW9o5SmZq577<n)=4Z`s$#+r8$r$ub!yAO{3)AR!;A2N|8a-U(S<E`^$Jf(9u*I
z46WVF7gA+i(BB~a0D+?*4@>)u&DT>Stvj!u=phIpEBev~Q80}96;2uDcVDx*Leoa2
zccqQ87rGF&%nDm8o9n|;bX7o&ssMVS*=To~j5J1D;H=MB=Be)N%Y4+X%8pP7vn_Rk
z_75WLs@ATQ2-Fyh$VsRUwsiy%y4B%et2*&%c;-~Ji$PeA7?n92>d<u0l3l5>h{(<L
zTfDWS{(|aC_}1{8>FEey)S7yKs3jwaLA{QrSasFW{MY-{IRaUBh1x$`A$acpqEOfh
zsr1tS6cS#mIY2oqBvPmBs}8rcDk3D@4%p7I5~*wqS|Pp~LmjPQcXI%ijw_9F+k>f@
z^wThVUD7zNMvyNAZ*y>KhBE2qQm|JAtw3r|sBg!Z$GkkuLuv<!RE!uiFqKyAU1Qw5
zO1lmAm<%?oDcFQLl1`xb3GhA3i<$3e45#eGEZ1~2gTXp0WHkkm+T<7*m8A#y5xKsp
zD!942)e5Y!nyoE7Z_1IOj%JA2>}^Lc@{W~a8K`fkRN~!SA8LBc3Z=5UaBOSKW1O=;
z)v+P8p(T{sWyq;(pnSa)B>9aUC^%*c+7LpCkj4V`Z>+Hz8!EA91)JNk2wIxc*Paxz
zH4HMow@Eswh7gvW0IvKqLTG}<j`!M}r5xzGcJpRTYo*m#UyJevx~gj!J>C{h;PsDE
z@Ip$m5K}jXjqE2q{tOG6-LWK+L7IT-dMX4IZ6y_H>hHi}ZNgUC{AiQ6i3d??reUcv
ziq-`Mv{GgfgH}ok;THQ%i%W8cyE8{C+hNvWLiK7ahQ?rx6@oA9SsV4GB4KSS@}<>S
zi5+Bg%|P!OSz1=|G%ZJvW0$X6xmHOjb{>}mWYM?;RJ)-Hm2@yJQ-mn%SuyHw95GXm
zJWo&0z-5gu>2XZskG!vv^b(inGf6MU%X?EvFYylrzgdtgF@j3O`G9b7l;)IADY!UF
zbNnR*7e{H1&lcw!sgKm}4uMO3B)&x8B$xjogL7ew{*FP9<m2RDjQKM7NL-%dGx;=T
z@G%9Sa0VZVcL_X`PfrG)g@Vts8GIz(pM{USk1mD1@<>Rmh6Fv~;z-CP$opl&#Zivq
zR}^|DN9<oYxL2fy=*#UU|Lqev*>$Ue_bK>o3jXg3e!GI7SMWIsF7Itg?tBH8_p^lG
zso?Uym2l}Z>Yj;vCwfTFFWOE18~<mFKZHB&CjY%j!S7b^9tEergUM$|!Rc=t@_9E4
zev??VB-fC{c(*F}mlS-fSeQhw`saBCSN$*VJ;@KI!pDjG4SERo*iHUBAaLUER`9MY
z__GRrn?ipN?iuJIKI;6MxHph^rQPJeHwm2dnWy04EcE>f{W67qNTFY@;O7)vmAg>f
zpJv)ylLc>8aMj);;{KHQ{FNd%rr@g;e2%z3C3<zf)+xBk->2XzpRj^IpzuGU;Hv+B
zuHb6?oK|pE|2%PjN_wtU_{)1+ny>W=zD&>)j(@C`dcq2y2U95SV-@@%1%F;_9whf3
z1wX3bcPaSq6kMhMP{CFDjbam`{4YY4bK4|v+DBA8s?bx4lKbl}fqx$KDt;n^UaERh
z;ZOAP=@XkD>7(M$3Y_#&@gA`$l7AkSOz?hP!PRwfO2Hpd=wk}LNx?5FxEfcJM4>=(
zoeKTzEciVNuJT!@;3}Uw1^=qT|A>OC^ry1m=d$3RD7dOmiMWr>v}>V)|Fxpe3I$j7
z*{I<7_dcnoPQiUC6!EX%mV&>S1wSWnT3>#J{zC;1DEJkH&t?UmBkr|{Po08q6gc_e
zYYM(g!5b9(d4bEg74Bt61U>_NC~hTwO5w9o;q!@tS1EX*DB4J$RSLdN!J8C3s^B#W
z{*r>PQSdpUP|W1tqu?zHeSa4GNEUo33w}|-TNVCyh@y@32`Tt$1y}Xilm&0hf_G)X
ze<yG`k5Y6@;F<X+kNzh;9@0~d!#fmQo!@|htMl8c;OcyBRd98_URQ869!?58Q_ne~
z*d;yNY?b-%Mg?zH@Gb>c*HNE>t8!xsuFlsSaX=!uk1G5pi6Wcu#}s@?7W{bySNX67
z?UAOiRf~5xWWVcVD->+B7KCwA#TM|R@q$|1=`X+^G;mHP@<j{ok)Lb<E|%!tTT$iz
z)pTMsOq2h-AjQiRE&N;Qv`1{uDU94nd#jm3>_+Ps?e`T?Pf@u`azxq7#ByR(GZC)t
zmH1@u3b~SwFnZ*8`-`zV1eQ7ee1_hVo@A-dB76|GSOw9R<JFp!NThtp#{@=g2Y%G&
zo-+F@(_eDDq+NjqjbA7M@m?XuKazn<x#~MpHVt`EjNe#bGoZ4cbdmC<UkT6j9Un2D
g|7NXXy!~bCD%<p?@@TyAb)uMAuM(pz^_KAe0-yNy_5c6?
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_calibration.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_calibration.o
new file mode 100644
index 0000000000000000000000000000000000000000..ac1e2ffe886173e573ff11a5ebc736a85b9747b6
GIT binary patch
literal 4856
zcmbtWe{2)?6@TY*5+}~qBn~MvtXzO00wqfz1`evmz66K_>!jcgY5ZZ%&LvoJ9CLPn
zQ()MR+p(pS<^`2W)s$=*+T#Afq^>RAx{Z=9tfP}Us;!zfsrk`WFs6wC5u_z}@7Z_G
zHzD31+gCb&-+jLC_j})WKC|b*UK7WGu{d}W7TydL;8Mi`?aY!+C<P15_g@^F=OJ19
z4A|C3qwSxCi^d-EkQ#w#``v@w*z94`*nJ;AHrH()8+gJgPIW;#c6g6Cd5aUHuS(jP
zayT}<1Li)y3)+;`B%a^gqD}IgcJAOF(YY4fM^MkOujo?rszsc+=G46S9{s?QjIAq6
z4!;UoeB2@q95!of0K_#F_?+VE)|@icK?st~0JmJ3jJpP+*K1Mk%AM060PYghTw8&A
z+-e$pu+EhHbcRdL@usBfeTz6!0!?cK{!iyO^V&G_pDTk(AM)Ff{}n4gI8qKxQ=28R
z*$l_V0NhiXTg2w|aBQ*!+#_Ys6fTC!Vbiwm@KaEgdX#ZrM*g=^&vw-DvbARL%5<AJ
zZGxtW>usXz6nF4yRcZ1g)HQ+o?<$;i<JD*CKIw9%*Mr%*4tVRApvamizhbWii`8ej
zV!wdT1eo{N;_iJ0st&<<`%HCn-BbnCO+05xzmE0?uC|G1z|s9W`f#%p+;4otIpn(5
zx0B+h*qe~1*eTx24>FGUprpN69&MlGSEmN{yV5Uw)s;>hbfvM(=U_G1C>JC5Gmal&
z4mfj;&p3NClX+5UmeNzZU0UZ%o7mAJr7r+y_3o3>6K1HC_e<%{8H;#h=xyyEVV8Du
z(4|o<M{T9a1e94ND76+<HrJVopf0w1uPA?L5o6c`a<5q%naw!JC&QM2?@R6f80|0O
zxtnpg(9dapWy-**UK9t_?ChP4`{gAvfHK_a#c>TGPYnCD8T)gx9NdY+Qaamj9w{B`
zmePsMoR&BtrQ_Q;E#8mVMbKj3MEuM6zJt?ZuYq<1`(fMyO&t1j3;XN$e6*@m7-+Yc
zqgDSzdIRQXVl`9=Mc`O}$~h#QIz8llSKbL=z83q9MT}ZuuxPSP^gvPf<j}Y6F#ty#
z^Xf4R$DrXQd;B)l(|nC;+3J+iQlM2EhSF~M?peF%q3u|k3EXiDI4)qneFS{BWCpij
zfyy%=bl>EWF3-{5BDx|+*CAb74V6Itp>HOD>I;yQ_oBWjzIfAh%nj*VOLDrtck#^7
z=O<d%SBf<0n>6M0{R?GD_tXyOT=bU~QNVk9_n-^sgoJaV1?NQT*k|EAWApug{OM)h
z^JkKqrCM0Iq)|`mZ>r}Q;jgr6@rzC^@tRXx3nptV-kUhp0`o82%Q)^JkAV57`EmPE
z=E*&uX0o|3aSOiFJ+8%E2v`@2`L`s4^oO|5_x~z8-=>ElN%O1;&$(ipZ8+mH!yp>H
zdBhBk>0z92eD$VD-j?!SDaxNkdB8rl<@*@$y@h&o6z67T6z|=_nP39P)TmP=Z2Bio
zv9<!L<Y!AnuT+xPH-ddY=hRn*eahi{|9CcM^0WK$ax6}BZNC4lY&;apU7kzb!#GF>
zkNF(OI{Qq3w)sstxp%Vq2DVDtBwwA1?QIob*e+>_T{tg(Eot$Z+>9XEmPd3~t5dT!
zn2SlRSziesEe6Nz3?#Gh@+(rct0>;;yv<SU{lAB?ekMzvCuYj=yl}hhq~V(n^ZPOK
zjZ@xGPi#ewC-FUVo~H%#YMlR&TWkm8a>Ot%qg=F#^h}SoToQ1;`heSyy;S8xUlT8a
zwg&IJuVL6uIf(Ct^sLP}M>%2hLD(DE8%y(fk2j~NFX)>$i}Kr1@BLLUcL;Z*PDePr
zOLqL`p?^~tOD)9hF}r2q4y<y{&G+Z>?!_F-aWnS4Ep;Mp7W+1EX+zIt>Jz>u+iM1v
z?H$am(NAP&3hhi&pJ05o6**fY52;qR6vdRice+i~Q=Rn<`AN>;{|m+n`&wFd2^;r4
z_q^cl?G5;j%Ko6x*{ceXql)0#5>k6R{Q;y@-%)==@kRPnMG)(^ZrR$<DAqS_6*kIh
z&laQ_>gouuZxraHv0<wNt^Suq|3%F3@62*6{IdU40IwIn96O@s$8dWVAuEqB9*Q0V
zzlcZ`V|P+lxf^ljFH&BPF6eT2umJv@0{AZq;D0TE&lbQ-Fx2JzSy2FYAWrcbalVIo
zX&orQ|MdcRpaA|-0sIFA@Sh`2{`^cY4f#Rq4+Z!?DS#K_hi$n$tVBFp-;$i(8@UY{
z3-IqNfXfANI393p3p9G<kl*8z1Aeb6NBq6PdLOJm312(l*mj`NqxJ<oy`7z5CBm{8
zrv!&og|?pF4#j}|L4U*}2Rl6Bh^$6DsvPXfpPi8L3@@vv)35fNkX6N_DsqQri24GG
zta|*xh@z@}p_~>aD0>5nC#ak(q$_K|<Lm7S1r!Rw(AI^HbtuREKC%+-3q-=kNjTCQ
zTI|>%bnN+sa|*Z*xq1}U6FlDI>5+qSm(pR#Q(kn<5hWZk;Pwtli{xX?h0mVnqbG0~
zhubk1UqL_phQcNJFkmvTDxIEiNbd09091_wJy)UL6N-vi_AU5=0WFe1>%mTcmmzpa
z#aX$?G}*}N$F@)~{*b{+<qn5^OB7J97uY-Gh-~n8_`}%(GEQYX`EUAtS%ter?`_&1
zFnB40cVHjWBL1=*nf*P<;8q4d%i!e<KEmLiWAL{a{PPU{K7&8O;30k9l0S>?uRae5
zr;n|%Rx`NG0C9hs!K)d(jlowic!0rc7(B}0tp0Zxd?mvV#km*q^9u~VlEEt(d?$mm
z{v2WO+&3&Ilwfd{e}utV{*C&aBY#*wLkzx}@h8FHte@X!aQa3X>pdN}qyDE1koNkp
z))SGvxJT67e$=2;B_P*FaPmNXwx#R6;V{(Wr0G$D5mv|lK?^90E*a&>YjWz;4c%|!
zU{S9jxC$R?MJGP&x~(_2aStf%WXHH`Mvgb=_|ktW8x2NQsm{wnPvZ-*{;%?ly3Phx
zDbj}h!%J|Affl>#S2TB^|DM(Tzo8#e8tE~@GUBHhv($G|5z>cA{}SbfUE-ldy|<kF
PNxe|JvRn&4OXdFq1ijqc
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_core.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_core.o
new file mode 100644
index 0000000000000000000000000000000000000000..8f709141495c75ae0ed03caa8e53b657ff99a8ce
GIT binary patch
literal 15760
zcmbtb4OAT0b-w$<j|Fuw!nO=VS`bzwY$*sss!{A}SkO;mB~gIHcARE+c3EJpg@xTk
zW+XLQkW3WYNwtoWCdx^KY_~@cr*)m=RK$u6vSRz>q&*zP^>I_T21#+1pVK&&Z6Qkv
z{qD@0<+0j9X*=h@%zW>@`}6L7_ue;1dp2&}<a9X5x*YURH1}qqMB6?(_pBO^DqTnU
zbY<6bBTh;-UvW{&f&2Lax_I72qaZm*<+M0SRCm5Wy?ABUiKF8#->U<K$>u57;`F#@
zcDB9}^LVa|`~Nsw&+pb;@GDv7as4aHV_9BLvN`bepTy3$I7Z%aIYui;9os<8?G-uH
z%JQAA<f(yTN>RQe#kx2hc#l!a-|RHry@dBec#oOy1CN7eUh<Ux0h8W;NYw+Un~rI3
zH!1!#j<G<kV{DqJo}lNRPtw?)$4Nim(lBD#rG3$>vz*hjhnuHeRLyjTJ_iO%wL|l1
z{gf>J!|d$MvOSHkCkT63Z__3koq}EG@iVZ<k#aTBG3GxM@aktFV*qyeVGrB&P`g*(
zyQX2Ry^{3M3exwGdwcM}zS7`QGISbv7_^VUKG@7W24J%vwx{1=vtQWH<E*=E8|!KP
zoMzv4Zq&!&SJ!Sw8PhhD&{*SBjxqM{xFcE2cZ=Qy+803Ue5zrLX}$R`lvWaDrR6#9
z<6iwu$bjwD(=KQAX_u?|EasnaxvPKLlbafMJ64@6%1xapBJiV<OnFy!9XH~G*U*SV
z@S_~6d-s0l$h$7r=zA{b=!G)6cmeCGJ-kU_d*6Y-{A)HT)2<TujSfyZX^fx!u}w-~
z2WZNdv=BK9cx>Dn8^qYq{IOw-8FB1X$1aqq7yXN1C!YP+)7UWX@80hn@fXt=+h(rs
zNn=k;V9hRxcrezN*R;r`^Ex_<8sWoaGuF&_uPCSDUtxVVlvA&lsQ8?NT3=X}Y({L>
zRq^_ICQA3=#|yf%uBz(2xF0Fm3_B5D<XF^5uIeXB@)YLnM;yw&;`L|#%==~VbzvS-
zgTa^QGv6S&7X?>Nlr|C>Jc7`H$E^2Eo@bzI1(g>E#y1)|c>BwWz2vA4jOQ5hmy@bk
zHaDtnWw~2b8k^k8twpL{Rif(4m#BJ$TOHe2<J6n#oO<Irr`}Lv#v1GEQk&BAmqVw<
zrY7(pWn+yO^j^?=b#F<-*sVnbeguA`SGvvk<N2%~>#tFc64>W7)|heYCx<pFX9dlz
z;6E_q)iwBHV4qiS5I(VJ`R=srgw61oVWT{5<u7MpUdoJ7$0*{D^Oxe!RgHM`FH)7k
z;=Gi0z4^}i+3iP*-)YVjM$8L-Zsfi~_B$O+7H?Jp*HcPc1Pt%Yi+NhPYrcLzG4{{t
zXK9{()6Zk>(JjjCv!u*EPX^!9&$51qz2{XW;3P%M#rpjH7Nv5xyQQL#iXo5XDyHr)
z7_rX!I{Y~)&f)1j3Z1xCOd-~^=e+uc%Nu$>=B8F{Q-jVqH?Y&IAipZ!!gBB}ZwWl?
zRJ5-;1z)qSXvmRr{TRP8Tc7w%o`GR6r|S&?pTfI#!ey+*L>cPHsYU6zET45@9Xbg*
zwC^w0o^$HMmuBm=oz65J)4YZ~%ln1%)rKw9i#*es@1oWX9_roV#Jz-iJ7GtKn?CKw
zUNiPq5yr5$UOL#I^V&^Js$-iGM~JDhiPzMz0luGA$By96dvik*_43^0A7@+nz2bnx
zE1!DL0e|V6g4Zh&uPMRncXPb5(!DO|&dt%ykB4LFd|C%vHI7BtYvxmT^?R<I>I*^F
z$PDtdYce-=!IfKmal3ouzB{Sdd7vOwdLSotDV{S@hMZmAlbdoMbgXiF@=`emoT(D*
z(_GY!UoFlZIa82_n52V;ms0Pq7H=9k^HJo_B5EDUrPjlbQSTI<e~q;~{0-{$6ySb{
zdNr(d`(p*E)2{N-X;&F)Mrqp5$i?++#~Ig6s3A92>$Rj$yOvaQjOageV(rbC^E;@1
z+I6#mbDVOHz7T92xwyS)<WhVi>if$_L0iH;up4K;9Nq*!<w38HQ||zLpG_x1PxCrr
z=5R6Wfn8zH9lpt&myJGodA5F%=_{$%ad|c?Pe0=FC8k+~_~W&@9<+$BZ2ai`+4|#5
zn+qK;X6H9GGh6=y(Acf()P>pl?_oSEe~dk8Gv;}3w*EUdW9qxJ_1~}=^S?7&|JOES
z$@8=I`!QyxYx3>c`Xt8Z$Ftc#I(B>Ybgz0l_a<~O5ICW84V^}RwTv9w>A*lK`XoKr
zenM}1+l@Z30eyk9I`Cc6xi1N#2Mjv7uA%Qk4`Jn?z>pKX&7PNIN0v`-H7OpcE;x6e
zF!F#^->q8Mu-mLf=p~K%R6+TvO0{LCa=ds(uGtRsx68KD*s@{Lm%ZgymZ65pGM!uJ
z_YZ0QTSb4d&1QU?7*C42z1!K6t)3b6y<}-iz@l>#*Y|=z(yZ@Red1it`J(~-ztNXr
z&D?*LJmtD?=+vGeQl|Fi*WQY?cfUXW_TIwrx1H)hvvw)j>_<<<dp1-|O50ayB!GRa
zt#`1E2j9US_j}z&9`_HLckLN>%8y#W<No3t^ZuCG<2&4QXN(f$?^e_st7f1kh@Q->
zCl-DV@uQ(G^LwCH)q}+it3svTRm`7xSag~5EuXs|-KbbS#=hNoEmiQn2CQNU)<TK{
zi{1;oqWqSY3iO+4Up;EBCDUBlH9Ep|#5e=t&g)u&d}`)n8s%Kf`ImF9BcGIHv8oVi
zaRpH|&O^$PLw75~LtJBBy~FRLmqLwu{!oE3{HAw|?p#v5jNHA+4^XSalWeY_;TZ3O
z;Tx#chq~n{qt<ha@r=4Nehcn})LT(ZtsjBkzLuYCo^dU%ejoYv5`M~o-GZNBE`9pK
zUPmf;r}`N3>}U{u$r-2X5!A+Y8_4zBiP_m!AL=C6!b<!cMUMZs9IE#b_3kTEcTOXx
z@pBuVVUO|Lgy)LusPzpe^)@Y0cM|ew<@L$t0oXcxDmUe&C3kyKe<o<<M~?hhRnQmK
zK5;5nan+FG*g{H!GueE)vhor3A=mNo>v2ZSn)_chdKS%*Y#t8e7<}b<%b?fkn-7;N
zF6W|ey+2#`IOwLqdl>P@I%K1@?D8Z34k8{oCWjxh=WW@p&VU|kJi+{nO&jg_^ZIx$
z%(i+9gg!BQ`hP%tA1U3WxS@v&>py(cX64D!T;<4j3zTK<vY3YWc;XqvecjT<93$*2
zw<p<Lh1fU(daq}o^odc@`Me?GXZr;FG5p=T6^@JZMagC>CN3i`F5+hfKPOlg<n%+n
z&rQ7z@aK8hhVxl<DaOk1W5v)q__mwrI8M-G`Ib=c1ZwR<`~#rpJ}&_IhMpPzNWL{&
ze+Kb-8Zl}11vk$14!`Ffaqiud@xD;3uukz0Ty66)#Kv9FiN}ADV~)!<-V0yVi}9}^
zN6Kr)`{<kS&uU%+?8A$HbGY;ez<B>%#&bVx<UM%_&%BoJ^BuAIUf$tSd|%04|2)?D
z1K&z&Hlw#j-uB;8>#WH$>RF(6v%=?M?)Nyy@pz!t9P@wUZo~%l4kI=)^WL@c;gwzA
zPxq5|AZGaNvj_diyNl`KyDv~G3IFavFXOl&*?baqp?4eIi}l(|drPhT%KL8m=EJ2M
zaQBxs?7R;B&XM(w)ZjCVQk0i$&ZOIeJW+)_F#&zi@0ojjG1uo`82fv$a#8BYGnDdR
zjjg#;=+y?-=cT40KMDC3ZunlB%X&U>ovEiqW9etf^`m$DFX4v())RE;o}ju=RoaRu
zl@C0E`2RI}j|Y&qZ*{B6e$<D<III3`5uY(~s-Lf--jCxv^mj#%mJZF3auj)TMZT)M
zf%7`PHMG9rq246!!1N&x=_@>{zK<NKmEgS@XXv5vrTr^z$Ji9^IA0IZvi=n~W53v0
z*762jxBbNfUoIU=0>hbmXc+f$RsWK@^w{Qnbu4#xZrPWTOOM@MsE)mK`NKE7NJVSk
zREJ7m++DDk^%@#q*8hn5!DE{Ua%kx>*4NViVdO?bU))zTsrotCScrc5LwBnB>Kaua
z-%Vw=)v5ZMh93Fb^T7Y(Ro+!E9@r0`7p<LAlciho8&?s_YNFl`t;06~Rn@-&8wYWI
zc(}^FYX3?ad*oiyAN@S(U-FYa)Ppm6g7joR>F3~g559d(IQE@tpy9X4^V379Yro;#
zwx`fMqla+clkYIj>no~YKX^Y4pRHJFK7U{M@5(Ood~BUvx$g2erM^=IMz6s=!7GTd
zwr99!xCy!C#?ir|<f-5Z`1w?U@&wMv94FSk;q%6oUFO-?zrH~~1Ns2sQA6x8T>^WJ
z`*jD-I)2n{znkiK?@ggjE<+7hk!!6z$1+(y%VgQv<hJ5W!Sq%RW7!;!Ja?ga+2&Ys
z6X+jUZUSeA|G+w_h&Mm5U*g&7|9;)5;(IB7tEJJ!laxBwqUw%G^nK7}@KsXw{*sh^
z|4GV2r%4&w0Uz!p{mWk@egB~O4U_xpY0z>`A4J_?{rUTayqC=W$n;O+asMyQ;+x3y
z-ns7#Q}9#b6s1n!o9WbT+*g*2o<-g{bH6Er-+9eVStXE#o)5AZGv%3nVma1NW<2n>
zXwGGQkV8v08FO8`i&~t}$NvC&S7$!H#WsvR?=1Oku$%NijPwfs{m1;LUB|S?UB`wI
zlcpa^Mp;jmO<2#lyfa^ibdM<F*ol0?^j5E)9xpQE+*ve#oHjQ$uJ^3m{K?OFTBFfO
zuu}_nd)lKhPogvAX;|G8i?)X&c!~u(!--HZ(H9GOlr^=hYirgjYu46!R%)@X)p)8|
zwTkgIYdt)&wx+fonlErUFy^K|%w{8T5szMdxyW@j2*d?Wnb%?iu;Y`HNlrHbDVF3$
z1jX&R7hOe7wB82aVuN=AXZ}5c*U!cMAshNfZSZG-Gapr$_N3tRn!w)@_)3BE0yDkG
zX#!OOUjaJCw+Vcm!0!T{&0bB=9}x7%1%1B_{XrZ2dp7vb1pjTq#g-1g7q~wIFM%G$
zdJ4Q%=yQj_Ck4*_;Hz2S9uX=Y110JaxGL~F1^#t`Co}LL3w&JQC4&BSflmp%O5lGK
zc##M>i@qHCvHmpzZxZxtfm^l<$hd8`!F_@c`X=MD_#|xTAGX0C7knlKAHT_tCInuS
zYXXx3f7ON$@_SbO@vSc_zS;(Fw!!_tdEF?_ROA(*&!E7k1b!0h&eykW`25HQKWl?8
z!n$Ph%WXFJJvR7|4L)jvzhZ;`)&{>Be#)k2qYWOn!G~?|N#MNxPcJgpH(}oB4>t5A
z@JBX%>VO;Z&wo|JRcPMmK7p$Ox908=__hrEI|BC$e2L)moWPSAIL8Oe9nRo`KV_SC
zW#Arxk7wW;1U{L8e?j0=0=M@2g95h<^$0x=2;3tUU`F6afLpc;$hiH;2LE>({Gtth
z%XQiL|Ah@6vcVq$&g<#<GgHedq3pK>zD?le0{=&W_XxZW`;D)Ew&DNZHuz%1U$*sG
zZ-al%2H$0af7=E>ZiD}e4gPx@{078_v5#&r?e8~lv>bRgyY8~VgMv>@vB}`F;4^4L
z|1}%@2R8UA8yw%x4gG7(MvJ$Pad8~8U8=yJLaOEq2R;LTOKgZ5fk%L6v-c}D`1ft_
z*9CtMH*&bz%o|;?p|3#vWs|!FIO~5PgAd0m<8-sh*z#A(hR=@#eNxa{vR<?JXW*9v
zKAeGn@Oo43(-}DJh}7Q^S?kk!!oFZM7FrXes($+H*7`fPuJy&E?TH7qSjZO(#X|`T
zy(i|?6QT5*7EXL7ZoNH-Hy_%5UmzMyfMHipB$Nn8yRC7s@%3o2gf9^_?`>K_qpna_
zut&FOf?6c#3&x`HctVS8_w_`y?vO9q-p+F$3@18$U0SRooMzdPm8E3?2E*NnP|VjA
z(&9LDbcMR1K`0iEw)wi!YBP^Nfs8dsgu6n~zC_&Dm!54XEO0DUM>x&`cW9BmP@0A%
z*iG%yV6CN;4ciR3EfkElh1x8Zk}|9#6bc7o8ZSKb=?Q6;$<`9HHrFI#PVrE0U#L46
zf-Ae*!yUdrI2{JeV}W6wZ7gZ5uLt6z5iJ%@q<zezu~2)wM{C1TF=nxkCt`iUc@nNk
zWN^~DJ3_v2M>hi4m*_;ac19y@vazviQY@@%UmPCY8SPGoJr)HH@WrAJLidOzN}x>W
zi-&insd=rgVqy9)lZ8ODvgl%wUExHyL-;ltwj{?wTAQz@w#R2|C=vaJixQv>`nq>?
zVc&FX9ie&a66}j7qFu1fW}M+*v`3%E)&OFOZeK?fyNG=l=lvY$Yi|$5EQOle?uo|c
z$?7q(h|e$rTOr)t;S08RSoG{iiNb=z-AE{rh_5Xc-T^g{66R8mMDB~g5k1idL8A3R
zmq--c+3ApCv69K-z#|+c2t#`+-mq<dGQphCwBP56OlaM0S}e`)e@ULriVUL{up}Bu
z@2UlL>grm{i6NUXEd6}_ySi%sWLm5=lD@GEv+<s{(7tOBXIMQ)E%`dstpy?>U%yd7
zxD185<Hnw`q#HTg(8o4!a712fe_SoVXNtDu@D_~Vi<eNvEM30s!Jc$wU@;3*VBaJ-
zvzfwpOSXmDwZ1u*wuR%@FgLA6JlxTxU7aJ-O4y92=VRL<A@re$qQ0c#JUu=8Fwfr6
zxdRa&?FnFVIxX<LtOK0IP(J3WjgbeC0pe0KVPMxR5C&B|j+VkKVe@N@F=~0yC~;ZF
zMe~7}S%68RubWdEx|=Sfsb~zT7I(RxWd!b3Hd@PMDr!ZLwMO$%LvL(I&WM>iD_k2y
z6dLuZP4Cvakp43!&k=A!&0ZcPE(`4fiA?aamDLgI4#m=IXxS$*u&RRLs4U}g9i0^y
zr0zs)uIS!_#v=3yY=?9)?CZhWhNQBAtjo%!<Mk>66r%YQ@L<pUe8qmqu0S@wUOk_^
zD>tFo)zCSe2AWa8=NZB4BAS7=P@oUxZ2kmkoE!HAhK1G{^MjEP8n3ywhl5F^&F)Zt
zMzS_aKKS^UN*2e3-%O(!?AhG5(2g*A$BdDT<r2PVYH6`N9_$PSw=dwm3<hvaUk^7o
zeH>eJt*^z79k+Sg$37+5IzL3kURjVP%_QAk#(nLvC~tLni>Jxv*431iLC34JpgiIE
z1!-8=Txv>p{M=w!wzHgTkjPx3u^9d~!^Z|YCK(iDeJ3l!k=8o9^T~FdI5#tnPcP|f
zn}o~sodPcfJwA1$uP4P5^T823ef`h|KWT%%VuKfgFJH_bN9Xhvk#Je=unqpS4L)vz
zPuk$S#rI}j2k|M!&}m%Ytf%!YkOw9u{KmBQM8A`8@d?5h#lI^yF6JZS+wdKjFUBj)
zN8`6&!k0_<u!P?#;ZIBW3JIT)aGAad-+TFDxvR`a<M#mxua@wm5`LS6AD8gkCH&_S
zzFNZHk?;>m_*M~=tWS-E^Y>N07+-5X8o!T8xcCHT;AaKSe*Az$UnMpJ^Qo2aRtdjD
z!uut>PQss*aQRQ9FH87GB>Hm_{^t_z7MqRrvGyzvdnBCy_-tKwN;v=R(z@=IaOuBz
zQ9{D4zlrgjgA#t1#RT`4C0yQ*ZhR-?i}l36*GXR<f%7`6X%zfz@O5G{GauQ%{Sy8O
ziO)U>|D=RJD&e1!@NY`EmFswTSi(Oo(I1uYW(ohHgx@XUCndZ^!uh);Uu@S(^U?S{
zBjF#GaJN`orkD8~$9F=$7{AASG=9G$;rB|oM+7(1-zVYQB>Zy{j(-zsTugtzgg-6e
zpO^8XIr_hp@SjWg7bN_33HM3(?<CwW;jf5I%lZT){4EKuk?<0cl$ky#;SmWBN%%nt
zZ<p{%3Ga~ba}wSu;f3NmILnp!*9n~C|Fbf^C<aV#eZ%JAItdq{Va)oxgg+qh*)QP{
z34cn$Wj-eb&iZso^k;48XKd)L;>7xQOMKcy(PF$u!jl4LxxEtpvP3WIIVs^XpR*D!
z^YMu9<}5cM@%Kx(%%9f8^{#{#z&#N&@153DEELh!B+z5i8slr-nm{~GYw(qVKTb=$
z|38l&OopoXuN?C)RlJT1y{%EPJ*-#4f5;>^e$+H#KFq8&?@L5IVg4*fl)H34xI*Bf
z-7qKdZ>wRPLyRZpAz!!Sg?av8=d+s3Q{KCHP0N>a55tyx`R?R_jLR?dzgN^3{2AEz
sCj^=H^YUD!JFsKRO@<ppJ~iLw<Xi7I;33=mB2irB+RJk+y{-BG0|XW*#Q*>R
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_debug.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_debug.o
new file mode 100644
index 0000000000000000000000000000000000000000..937efe5b464c293a11980cb58707935b3a1bc189
GIT binary patch
literal 1024
zcmbVL!A`<J5FKbEc&mm)6E9UXLLyCD!lA}P5tR$^VAP9;rj$aPw3L*^Kw_ew;WzjL
zh8t%;z<Bl#`~sbYt~47?OtN`zX5ZV{*|g7>t*dM%11vJ|4$F*H5wlBf&Z!A`$blf5
z#<u`(053O10HcvNjiQKHsFyD!bBcW0D45f8)tnqjnQ~Er=|Kr5Gr{_VW}|T`mzvji
z@@*6aj%WLQxf{hY@m#rH8N^Z750J%<=M&c<qu7-VMX%_pW+<92m+UyKAXCd_T30lg
z?r5rBTi%stbT$!we)&4hh1HW|JvDsFDBunsg?VA+3!+-&<*<X5?Nr}0rg#i$)j+fC
zfp2x(_Nb>ga5#qhR;}97te#6OyVLQBANB3P>e$2vP==F`*lk1-FVJI*xMKp!T&A>#
zLr|P34Bb9q&DO^~w9;uexFgIY|DPwxB~G`GIrZ}|`NZj1O10@Y#w3qxUH=Js>6t37
zbg=#p=^}F0KaH!tj<3WwOOU=#4i~*Ejok&nCL(`#y7ihg&=Va4)|cg5NLKkj5+VO9
G@cuvhcvTnx
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_preset_modes.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_preset_modes.o
new file mode 100644
index 0000000000000000000000000000000000000000..c1b1e6244d3cc7afae54a9982929478c9813fcd9
GIT binary patch
literal 4600
zcmdT{ZERCj7=CYWx0NrcW#TdyxNJBIVYQu*cnOg+R3thLUZ)A+M|anDTeV-gy=ZUH
z>~<)E!8i^7?FbUr_``p0iIM_FjqwN6kHkN)0rBI92JV>YNKoI?p1a*$+JVNHc*yO0
z&U2pgex3K6Glm}P-sRvpFdGLS!~DoZ0mfI(_er@+U<tT@e^oC|@sM}QS;?UfOFTJk
z@VQ9?K$q47Xl(>atxcd6_~7?z1^zpp3>PnV<qW!pKX%?2=5&d2+W=-;-Sa%krQgj1
zr^asb@Q%}^OMD~I94!THdKt`4^IV>5Drg}GOoW!gMBiPY^{oL-UW#8cXhZFwg(VQ%
zIM~`-PbMY-wo*GoJ3$=s0qP*LHxHcofchmM-i!Do&u`+<4u*HE7dez~<xzj?SiJQl
zE7k4&+;HwaB=OwqQY(w29b>*9V_v@;CfWqhT6cqJ#!lDMxcgwF*a{yRg+jJSPUnnP
z*E!=%*OWno&x{=e#3K!Q@km3?*f9d4%dHn(O~?TltE(R=I&bL3HqeWXy@!e$h%VK=
zS}>e93I>1ng5mi2tg)n{U@UP@8ZPdP;U$v>^|PLgDm0dj0$1|pxYCA4L2K`IjNe~y
zl-3iz)K=h2t;AWPes0)VDAJt&h<?(%yGXX!fO-JqE9ZT!?(u|2r7v4xYy;|iCYO~~
z>gS7YL6=s-PsVRMbg6)GuOJ7DE8v8Y%MkIyhqF?L{(});H)$;6-j-fimz91gy(dNY
z<rEjL^9m=F0_KVOc<L1*Ug!q#lupDi_Hg6hjBuF?dvHt;kD>Gv@uCXi#qFS7NP*Z1
zFmbYlXo2MzlMA$yTZrf%fy@I1DEYjI2_Qa&wbhNab<#_;(Je%KvIVrD8zy!&qD0+Y
zSf2xcbs@m`P!ouwuMzPD<jXDCZy}=WMd>BtfFDG8GxkRi+k)~a5u;aOTz&||!)_S2
z*9zV5n+HBE*YEVR+}Jel$Y1B{@-wSoc82Hkw9eMHfU?d3J(n@|<M=tbH>9bYE`^#w
z>}v<{ppR(7+lUs%+77M88pqlm^?;UbCF1BN5VJm%J`ks$?HZd|MQi$Oxu&V@zhxiy
z_c(r6{y6NJ8qLnzZ%6x`RqQu2`|Y>0Upc=t{_A*Vr!8@h0`%;}nB@jt8pc@UU6nY@
zb6N5K4%RPQY`s1Ie12x1W9)a{nV-SEF!vzKL64(=@n1aRdG84jFAu%$;qWd9<9!lR
zAk*i8iQ{h)ad-`gr#&p+`*x1qKHrPm`)ug#vc0ot_rI`rW$jy)`2H1p9M&_&SFY#!
zxm@OOU+wjHiN7a5#Wy0C%ue#F@^qf&4)fn=*6OYG`v2B{9nU+h_iFXlh4pp`YwR-a
z!w}XR=g_5tSZl*rYqZYrEvs5*=6hIq1D$g@moew-=vk`A+O)iF@c1K-Y!keXKmDB0
zlT5}!gK{(>^d}WT9gGNF9VsQ*AB|y82@OWoNJ!nUL<G^-+0p3_h`vCl;FXnl2lo6M
zH&Wae5a>+6--)m3VvWN|CtUlp8i%j?7X|>2|Ee_}HQC#JWq?|_wee7Q3%CXmkHzk0
z#(0$Bem2IxS<0;se<{DWGK8Z{4x@ClzE!-B1IoY3z=xRpis63dYL4O87=Di7yP3QP
zCDkLaRAd<cF^1=CxN7oQincR;j^VvF{A*JW!v`7vSBAS;>P)=ZQSnE&;ky`qmEk>1
zPYUsB`FWS|_taO2CjSh>KeFN1818PU@Ozp5dog~RpA^H*eS?=`TOW)Cf^sSvOev9c
zL=DE1;YivSg7q1AzI*F~-GN{<5mkdqq(7aK!*~*uU?`dBj}8RWs<J<%E?}k8p+#mh
zsvLW<`g}-^g@THl7>ER;1Bs*(395tW&tNhZUSJ^E-%p)HdUZWzU)BAIXks9k!b6Bo
zCKVaAE_BusE6&J?u&jj3=5d{AZ!t~~JyS3#)Zshg$CBvKozvs-0FCjERLA3;wYX|D
z9$7T51%%rLwUE4cM6u+{!Bq0)h!T|dt4VumSpnHdwDPJ&Y@^MmzQ$(R_;Zfdpr;X!
z(Ne4IXAM>|rs7%pmYt{j@Z2wDeJZxI`-S2wEchoi@Ga~fvGdg$c%cUFXZHxzbC<<#
z&VpP13ku8GeL?vi3!gB&8S&K?JZ9mqvf#NI{I4ziMhhR<y<^w!XSh8NdJP<WX)UhG
zeJE9>A_vW$5{bz^HIh-m7nW5Se0}LO_(I8eJd&V$_ir=-m0*g1g*m5^uwIV&ZBE$l
zbo&0%tt2La$r39Xohrvh_0z744zM*<1hk{1I4diL0!-TMniEW&IRyHCQ=R{GeE`=|
zopbL8_GvTi@2d>weogyUiBHrmjj%uuvq>5b{p|5CLCo$uRrV!2j6U0>X_s<nyBj|n
RrHp6TA=y?Q&Hvcf{{?CBbAkW>
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_strings.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_api_strings.o
new file mode 100644
index 0000000000000000000000000000000000000000..632e0febaed7c337f692904c743d4221c9002b8f
GIT binary patch
literal 4520
zcmc(hO>7%Q6vv<Kv`woBLMRZ_NGvEquGCm|nn)=iVK;F;gyUGYlYl_lY@JQKs=c<?
z8=9&JjLLyS4ylwwg?b2_3gVDMC3>jTAaMjKLIvf(!Q#ZBha&aBfhfH3zGpjQZ-PLS
ziLCeDf8P9N=FRM8KZ?f2y&ey6^T0RIh*$;iKi%-dH8%{W;3Rnapl9#e{V(@?a6|2a
zQq|}A3OXSDsRz<(2b3!4tDR8NypaC&&B~9+UVj<j1|l{9D#^WT-`?K#sXwdTP!i+R
z(@^>x?P0lJ_+a?3{wLk{lH&V`f9>i~J>ICt!im3G53EC2)ML$4@*GjSSG<SUL(~?J
z_|TgEUo|^WFI=a%KULg!mhR7OAEYlHgCV{*Vx28_rx)+eF|1YJ(fbtl>*FKt*ORWr
z0#tf_*x!Fa+#&HSdEWp_JWrw)VX8y*KRUmpW-jZ>oR%{dYfp8`Sk7z8xMt*PAz*B3
zxrQ)pn2IyT$w_3jvfk*1NzGckqFHq*UQlL>i<+%FI7rOQN0VbS^Km6*3w2&IY-Oon
zDP;_ejA3Hv^w9k2NPO(#J9TYpEEcT?n39~0$EV^GbtxH5Mbq^NU^f0%yfGU<G?|=9
zHucX<&ebMLOh!^sWi%3_b&jP{A>pDO6n1*L7NV_%kc`A9qNt~)CZ;3G_*6U+Q&<!E
zs5??RdZ2gKylfV(m`c>LaMPoOMJ&w3=;&*Te<D7sqzi>yCaYnMMM><eu0#fkR$<A=
zp=V{XhOKAp6|C-sz~I1OFmxdh8dUt6l^;Mac=oK&10hB9go1;^Vj(U~yyH9I_x*O=
zzPA4X0DSn@uKAGEuKDnxl-u()p;dperi)dzHXj^s5&KZ-X<BCo4SgN;?v`wTQOfV8
zJU>~L^sv_%)J6J-q$g<0MW-9!{oL^RTu9Z5hFZ2Q!(1*0GSI&W{i`q+8$KTksmr>p
zTH>+71kGM4QyyTtnJHdvPAh7;T9QZ=tmeM5URu%3jOfyfWz{g33eDX)BX8JhCaY&I
zJAKXqgS5_PaUY_}3dKWYpOf?v($AoNihN<-BcC}5iWkT-hjr)e0U&cekT?`VMdGmj
z2{|(7Ch5E$-sdfe!}_KR=Z?hbruZ&d-WTilTsS)tCrt4Jvdm$9mvnhw4@u{JEl~W3
zEOS_YOuEbo<N1lkoXuK<?=RAs!}=uYGAAc-cpXKF!@BLlS(7+LTF<(~VSU4evn6r1
ziE~HduzuHt^S#8W5@$!^u>Qb>^P9xkA<jdI!}=o^P6xej_`J4=(@8p?7wcW5%jcy?
zoC<OJB@XL;7fx2<bke$W5{Gr$g>zHlj1cFR#9@8Yg>z5h_=&SEaajM(g|jPhdWrLk
z#9_Va!g(xl6yp3LaajM;h0{&{Px#z{IHyVHb7#Gmbot!RNt_^Yf)a=IAs0?j;uMKv
zOB~i$T{vqJCrq4miNpGa3kSdVYmMvkHgUd|IIM5Ea3D~=nzyw}Xl=`}S@tYFrv+?%
z)rJ6mnQ9QYR4zlnDu_U&hXNxI$Q1H<-L&a(`qxH5g4l}uB@;$Xv~Ajl6SaQBoWTz9
zl@;a$vO6anr<1HOVxCUw?<M;x>C!X~lyaI4mAx*VLr*aO>3H$=ESS#MGdkSFrm$U?
zCgk<A9L5~s2l3b3uG6RFyUil{Jg(W&BY7aRO5+ohDCRwhKc1iKC$yHmqZXvPe};Z@
W<9S(o2Ay`}cb{@HrZ|zTJpL~*%vC%9
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_core.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_core.o
new file mode 100644
index 0000000000000000000000000000000000000000..24fa62321b3cfabf583cdeb67f80404e8e93cd44
GIT binary patch
literal 10264
zcmbtZeQ+FAa_^a0$-=9E*fm&|l+&yvgV-~U{DnP-5{*8L$;k;qs~prpWwctYq&=;)
z^6Uz<SXEvblaDi%cn?xV1*(wwNLf1ma0;q`oGVBip}0G)%3SVJ$zQiC*>H)kQY6M0
zovmzsJ^N-gT6qacrfSqPzwX!Fue)ErH>+a@58o$C64{qTZ_?VEjS~Iy_O)l-derGA
zs-VzKson-X)$5Z|y-E|kE%#7TIz!rmV*FFRs{F!NM;;mc`g5e!e@L2imNfaiJS8oF
zRw+}q9Lw@8wH(sgD(lRQLVd~yy5_1%^-AyQn!KQEA*%0fyRIDZx#(8q1JYQxuj)jN
z^d4zO9UW0!)YmLgpHWFiQZi^Y9XXA63BF1Flq5>^vOPnkBUu9eA?t-6qFxEU+58~n
z+G*C5TIg*XQ>qVXGW0BhR}XtUmt%D7KYdllYj`fUoMp@Tj`;-T=6l$G<-n%2)Otu`
zzX<-x2M%dIIpyiX9j?^1a?G=1+U4bWcTm0OmsB>IQD$n6kvvLtqK199?f9z5Lm1a~
zKOM;^DU0WfpQZmT5x+NJ`>dt25I^}XNBrKvToAKa#OhcT9a%tZ3NhHR76a*=o{trB
zY5T$0aW&N|KTJt0jt(CCBkQ`>K*)6$s0;Ld&<fDQpp~FKpjDuKpj$v62CW8t6toVs
zA5;Y$1Z@Hx0c{42g6;sF0Br$HfbIpI0zCja4cZEt0@XoJfOdiY8R-3>PlFx?Jq6kW
z`YdQ4=yRYCgT4UzDCjI`Kj<r<gP><XM?hZ#je;Vs4HKY<aYF(WF>jbcd=M9PdTkvP
z>YGyElUy_>xuiL%idLlJ_0mcvwUQ@=Ty(kUqsCVKdmXCpq|ZeU236lreB?UGy7cSy
z2ii!!MAH?4)45!qy^eUS4A~A)U821m7|*%ta8bH}<dcnC^aK4W`3;gTvFwavEbH~<
z?R&q9eM`r5h1Y4nflzbM`y_k_u@80RrPc?Yfi3SK{0YII5PWGQ<)losh2=4~G}Tpm
z+eo=YB>RI7pV*)NFNp=mLHMyQ4tBi1N<4Tx$Hbn8UE8dK$CqO+?}N_5|M%g48RGdq
ze7=LqPu_`mwo&<|i)xuQzJtm(cQpO5Mkkk>bCOY9emggIe81v+*2UGH&&K#3dZz13
z;;Lg_$1p!T&r6Er&$?2*XyIE}XJZ|CPNT;zDT-fd-h_3X$8CE)%+-lWMejU5XpdL_
z_v0I&ZxQ3=9r>}VNB@3qRiX6dfHb!kx?%g-%L@53$`*h8X0Myy<A40M05NacTYEXs
zK1b8#fz_k$p5Zv7Uc9J%)Dn8UB6VL-<Zi}%XJ4#onr(6$z~yLNVCL*h&EVhtd2d(c
zOQvt6HV}fogVRmVf81HOJCl2{w+YX$ULShq1n!rnk9W^Z&vdtw<PJ_twaEAAJbI*h
zj&Akov`f-wYSf;C|H$?mrlo-1LT;*9w0g2kGe4t>)6dguhb{i`+&dnc^||Z0r=LGw
zQxAV=_QgW~&LEc(>Wyo#?a^wJQ2SQhKrdn6YkL@2Yku8g%>)QO@jKgg)~%ht)uZoN
z@#MIz9$h@+%q7c69LLs*fT}LkuzqK)GQW@yH?3So?XaG#;`Lv4>nj}dVtuPee_+{L
zX{41T*6u<%^>HpQD`oRn9+BrhhmI?X?7tdP=Dx7<y3K!8am}Bu*17hc{mjCu{aNIj
z-<RrBz5LAax(ME@r;gWTl-vCmzs7qIJuABwzRmoMa+`lZ<~<%`AQ!wt*D}gBe+T#j
zoAY>H_w5DU>&BMnWhBVUh<(tcDXy(6k95pk4Ry|C;PXl&&-ov$I(t`2d9LMhTdB^<
z%Y$~@e05~PKFTB2t0H&kZ4Y*$SA@uC_3d`_3j=*lRmpAl8#`A_d3>Qi)S>rd9P0>D
zzW4u6{jRJ|2{gerj%J<{$SIC(nvQ!Aw^bv^H*9$7abEgY)UdDWw*$WSqz6@^ZeCL?
z%W}&&>x4+^Rw@;DzXMn5Tmh;iPbcIs#*$s<e`Q@jCDm=~vFjn9dwG6okCeWGd|$1l
zmHp70-7i^d{WC?G=NifFk+j@?-1p*cldK$Pl&${ky;6FqO-d8;yL@lE=E5Aad)l>r
z)U4{#ySXp*)6{;cl|0ygyi0BEIIAdbp2v1z@1Zs_``fj5TIq=I)RQ%*@!pQHlB>O2
z1-}tvf;4px=S|`Gk?ejFGFgn5!8b6DPR-Qx11r=;?OHw9F+i?7<RVk8=y+ll@#Q{5
zc+PCiuW=Q+?ONe6t4H4~^t(VEd0v98&k&!BwQ~A`S59->CV?-z<@D!D`TWu_y}hK!
z>6KB}+;5ak^B?c0mE2{->MHJQxO2D_DVf`Z+l~7c++N&Uao6Imm#j6C#d^tL9bdc`
zcJ|2W<*&=>rAFC`Z?=9h`Af`mW$R+nP$=0(+eW`%L4BFp#pLJLkiV-^+FHMtL32|2
zTD)v-Pd$0Adl!@SR5$u>nD-v+BPTY|tvsfFwrTVQ#P|DU)b~8(mXzxGtWs;)=X_=^
zw`=fcep%T%zogubwFB%buw1*A`cD4=^tjEaS2MMm>vN9FD$osFR#Uy1Vf}5wS-cJQ
ze~oX4ta}lD*NvX!=S}>)ZFC1e-;#g+3C`b3`}Gy}k$r0?9dVJkZj-jp^S^;T#6p8i
z+pIRKwUPJ7U*!6@A6$zcoU`j-WwdK<_2`eRzR<1+J&4-^`h%+iXYVRqlU%xX0{e_y
ziSL;HZGkeJduA#me}A>?SBcQ;%B*uju9H5(`OQ;aDF@27lm&7j`a-EL51_t(cEOD~
z)@=%)zi3Ofdh+8<q+N8AHZ!fizI+R5882z=t^KcO6nzDH($+c_y(kz}k^>V;(ph_4
zf6F#s1;1${ztI1!9xlzJhtB&d_2htu=Sk06c|pE87WN(-yj@RXzn&kc(XF-O+$ZdQ
z!1Z$gb$u23vPv~-q1>O}CuIK{SOZ-5kAeObZngtI{THwoeDU3KZ2)^Adcu51i`N~*
z_h(1N4{Ho^jdq+mQPT;Xe3n_>S#I?X^fYgVXz%BL<5;)IpWVl$N}PSZd!NSo*iIJD
zJSN*HY1um^P5-alzD}&!rA8?&-GVw3axB9-`&V=OP_zCSWj$~9I^(zbXQ1CXCUcE(
z-mkXKFM`K5S(jZ)TwAtp`TlUO&>yh>TJh(-=!%zCe5fhQXT+wz9JK*m1Dkd23f{97
zY<G(_C)PiU7+5yE+_T=ZYIWddU28}DY`GwE`f~Zgw^@FmT-TQ4_@={txO9oM?CZ)D
zAr@DbDeZ&bFLO+=W(#8>&*QSoko|--G5>jvT|RDWzAPXH12XT=TjqUbMKN&r$MerA
zH+{5vl$<fJdLqsd)*iz3!}Gokwr^8t@6SDy=5g(?i~eTu;+rX*Rc=bB?x3k-vUJIZ
z?+a3~f1tPHe3D$)>`E@yRA^Ul_TqEI>QTM0wy&bc!v||EDLT*DJ1;HF6mrUTm$A<6
z9P>MmXFY|SI&@^=?*M$`eWu}p{C3;<vSiyCx7PM+JZH)_tWTE5c?4(1Zmr=t$T?(n
z<WzmSOjBR!<~@F|nkqv*;M};kys$6xS>UOgQyzPrcU95UQtnSYUBI_@;aq@k=>Zin
zz@E=>V|xwYHKh((x*DLX@l?0A{po|+arC98SKM0DTi?_|TfP?P!2bGjHF>try0r$_
zZiFvQb>&(Ue6;n+uXHAl^O^QsXL1?mYS(L>_?^JzZX;!s_hDaaRRG^#qrQrFYb3<r
zCY+hFxxe&uzz6w2xh6F$NeOY`d9hCUgN`Ko?gFm^W7~1gUeiUMVtG2$+4&8%`OqK!
zk=hrFMMERO$hbNbGu6aMSZ%+1!i)_?qIfbxBauWnl$bQbs<w0Y-Md?MX*+lAR-1$7
z*xh()x$7>*ckWV|v#VwIK2+V8ToQOL`j6a=L=<A~#!De(BM3x+rsC@s3n-<htXSM?
zq8^9cIw5ffDC4SlZxXaa;638~yr3b0tHN|t;7<ztl)#@B_^Y-&KKA)?3I31q%ywJE
zlx=@53cN?)tvrY?jAQvz0>`1ix@rY}zDRzbz^g>)4h#7Q1l}+3y#oJ^z-I+++kHyl
z8G+v~<ng;=-hUBlTh9*!J|S>j$p1p%X9Zp<@K1nOiDxH4FS7J62>C67xeamTIAjD~
zA@CM~e_Dj!FK{Z)3)*^y1+EI*){_!=OA-Fp0@np@`~0^8?-95z{P`(xTSh<@`J@Cc
zBY#$Yg`Sicv|Zp;oAQ9IvrXV?5&kWKw+P&>tEU9sBk(Sv|9OGW3fzv*n*v`b!hb68
zjKG_O9-KKX|EokGKNUFFAI}RvmRpyd_pb}QO5k?=d{f{(MR-Kurv$DF{eL0wvjW!z
z{))gq6}UaGa{{m0oENm?`E!A*0{@lJ^Y6fI839?ug*xMTRq-z}xSI2XRDtUP&tU3&
zwFzAPt^9jSo=`~OJp%6$_@4@VR^Yb(^8#Ne!ha<2jKJ;n&g+5wY`HnFc!%((3Uzj)
zc{P;4c|EY6{(R%5>%!0bY+NWiFYx{ndX5PBmRs|JO+r3x>k+u!f8G@MtiX2&`F|1k
zd4b#Wtw3F}pDLf4aiy%k`14qF-=63$BNQ{kJ44hoMc+ESZ_nXfMr1saFdhq=@knfZ
z9TtrmgJuLABc2E*!ZvSmVi0e}8rK|LFAy3Dhep4Izd=E0Xt+p2Y$9oxiE(2%7K8GM
z;9%TH#EgN-p`oy8`(gPVPsS7BF~bbUC!>jYfwenigvUd%!LTtI8BgrG$4EF?gW-}a
zF{<>S8*m(!_UtZcsRZlsNMgho3&uyC4z77oVide^a*!W0VI;!w!ZaT;JCbWDi-!}&
zP{bU2JZOdynBYJ(jF1gS5W7M+1#FAi?hHoamUuDFDkox(hfN%%LM64WNfhhb$O%Qm
zK@-&opUlaL!c0QJXb1rcnK5G`Y(`KIlZ8B6ya`m|298MaW1)E1=Gq=ugUsOgaM*|p
zk7G3$i4oM#NGv+IP9zZ-3&$oC##ksiy56GADRKlZ#*vBWs4)=@j)#rd&=5ySWY`>z
z6qc9Buh6s3YMwP{6!FA-ico7Rc~)UWad>QJ?R*=L1*4PU!i0n?Hwu)!OvdAgQ+Uuy
z&9Jjz@~fx>n^&zdJ~=jk{=sV(<!B6`(?rGx!-d`>tedgN(U+ojAcWy3VhCb9@<gHY
z2<Z*DQ$89Qi>x&Q!70)oi5o#w3?KE4Xe<;=I67ax+{TPBT1_Z{?w4;rwrj$LLp{I$
zz*?!o_wk{~uq`8ueyI!>h9!XYl?aYw1#Kw8f{4lOwlurIi5o*^Yz&>$oD3C~4{I^Q
zL)I(|eEgV2&OT(~tLG2UJR`RI519|e%)(OO@$q=5Xw)#HoM6j0><2-6bZ<B~xK3RZ
zxwRI%5u8LFuq+}MDL8l|emoJIfNCsJTWvnV$ksY#W9aa<L=g*qPfnn3j86um29g>X
zfUAx?7m15KsVjj0r{u4<aBkqM2Iqz9{G;{vd<p!51K;M5|EvVg=MTP$^*1?i`|Qec
zdrRPl9k|m^K7a7V-$%auqxE;ffj2ntGvYkU^7fg8*=GgLe%|Sj|I{IWmjlQD9juGx
zw>$8|0%!fI1Ao+kJMB(8@MeensS@}Z2kzAWmIHU{`LG1uFV4U0r+p@8^Aiqym&2bo
z#5tGc@tb$yI$r|U#RmY(w-luD1F8f69S1(;z@0xiTo>nD)`K5v3Rkl@=W_hNQ9y|X
z1<vxS1AoDRJL~7e68L8h{C6FCs>HdN_5Yp&Z!UrBCGeC3cl!CX19#?e)`2_y|DXi!
z66bXG)9L??5;%S@vo4l*>ObMYYaR2Qb>Me9@aqn|-GNt%^E>OWap1Hwo*YXA2S5{M
zo{rd0W;hz$nFvoMXs6YCcMinkv@;YN8w-yooI3s=&nm{kB@*qTph*``v*P>0W{Bz8
zuf#EN;noXC{-N5JrzvLQV*PAKEXP8O?+`dXtJhtbBD*$|bvUmbcwwFY*YUi@S!WAw
z=VjY}#0lcrw(q3)sbj;Xd-Kp45m;`cd>7B3Kii9a=aIh>o6B9I|1!pxZ8!f$#AS7(
O@z05-?CcFU8voxrna4f=
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_core_support.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_core_support.o
new file mode 100644
index 0000000000000000000000000000000000000000..2071447a3c322593709f6e491060f685cec3c655
GIT binary patch
literal 1176
zcmbtTO>Wab6#f!N)T|(3L0gbIh)T4GSaC`gK`eqQC=wBfQrIA5+{sjq<aDg@q!bAW
zj=>Rn1GYT{7w83G#}3}4GpaQ*tBy4O-uu4yGk#-#eL8;DY&76j13z%#ITrZdys$?L
zbA%8}6nnCZ$LO%|boDeye&RMdXrYbewKv9J!-_H-wb(nm_HDNnqVo}WfiJ<0bzn%f
zh9>STVE2LMYfie+I79nxMaRze_9M2j^YSg*lQQR7Iz40uQZbzg_M}@Vc`(h%Qaqb#
z!S!4THjMh+elH$Iai49ZYStyIx4CKfC}u{9d;P)UW&ZmxvuNS>-@1UHc2Yoq%CIVl
z0V)2vxghE$ZtArBaI6y3sr0>WBOY4b`3_%Mp4qtP7IBmhw(>aPQi-IT7ll+h;#fb%
zyYXOaOhTITq{#E65NawX$-H#RL~uC~$q_GwQ$0z^PgFPuqVn@hr~8Cjonz)KEsiy!
zNvcys`(=rU%h^mEYInX%;w{QIQ@!HV8CgH`csDOc-yy@~`!{yt0zC9@@E+;mCGsCo
zuBq9hU0tsK`zlGc>tDsXuQ0R$zihsl&k}8OR<oAR0apqAcQ?`>n=fpf1J~F2Z8GZe
MKiEV0zn!1|52a6Uwg3PC
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_error_strings.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_error_strings.o
new file mode 100644
index 0000000000000000000000000000000000000000..b8eb47384f5f2af0e8bd6a93d2a7485558f4d5a0
GIT binary patch
literal 1328
zcmbtU&r94u6n<-L{c-9K3xZHakg`H|*hChpm!_4fg{23vUV2Dlj3$uXER(S)9`sL8
z=pUh;y!B{%^C%uX7ykqQfTewJcgCG2>7^YA?|a{T-+OOnlRbFXTpFrWK(7jXgF&WQ
zfb*dNc6-o;aTtT{{>AA}t8&)0;Q03S;Wc`XrU8yo@)h84wY&f0<h$kF04y&qF0ktI
zhmUM6O_Lz<<2Kt$1(Q+8-qboG-HH=LB8Xxc269J)Y@Rzcr*6-4+hJ8-v}%azv$Mo=
zo6(M4cN&AiN)Vl8818<RY=KpJQb67+lOsF)7ydzkpX@P3eyYcp-7xiiSg7+HnJ31a
zRi#+K_^6;p;!Dz)OKdL`A{AaHMcm%bcmOk-FtZEm&Bk2Q_O?Umb^PQH5ummmboNwD
zUHd7HYMx?3?LW)${qq7$AwO=;#k0MZ^f!QG{eFxz5@F(V8SYBpo4)jcZ)6#8ky1i(
zo4*1cq^(ximS)NS!3@oG`}v!8k)x&Wx1Sa7n0`Nc3tTNwaZ-IBD=HtsNPR~2zKSmt
zpMS$5wVw}E!(1;hp_>2dx6w;A9em8C`{(=V`8DsNiE!OCBaT)6DaUJ{8I8Y^d-bJ4
qqe@79$MDhp_4`F!{_JGEQogs87)$rn)MEr?{?BTt_gbi8-v1js1ZIZ-
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_register_funcs.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_register_funcs.o
new file mode 100644
index 0000000000000000000000000000000000000000..c762620711a4c9769cdbd05f30b8236398ee2444
GIT binary patch
literal 10496
zcmbuDe{5Cd8OPuLu-3}DdhG~9hizpH8f;2c<|T$*3acA&{81Sr%+Pagxj;#K3%3_y
zLD{)SV<vwXA%+;@2qGccY=roSQ>KQgGj1^pF_~GGZ7I$_bny>2_`_r)+vj=DbMAfb
z?LF0OhqTXgzUO)0_xbUCpZ6_4`R@HgjSUSZej3a#P30{{jk&n2qGzm{F*lf2(|xZ=
zeP_AZ_uFQ(`P!j3UcA<1j;=Go@RbJ|UcB05X09|f&J1>%qsC;?W|2vGjV2wmpf5mg
zL2pyM4ZR(`8N3}mrFhEX(=7RPsRxX?{Us({T9!%sJ;>fny1Ub){AK8UV7(@N<$-lC
zUOV*W3m2P4KIm!)QX+5bYWjox82r5re?M{j&8WZP>(!=)8Rk3MbAIHWLHy0)Z-~Ex
z_?yMw5PvO>zajn(;%^pzL;STk{)(@}Fx|+!!IDhc!_NTUJ@FC0t-tsg;Jepn(z8vC
zy{^wa_$-+CeeKZeHm5e9kD8-b$mxeooinre={E$!vX;5k+#DElS2V|4Htxvg=9y7!
zy742nb8RFa@%&;}S);+O;f|X-|IIU(@xya`sGVEpxBS>@_C0a^Tz*I_SA`!-BYp(r
z+9THidG^S2K#o0f9FSj+{08LKTL=fJMX(TkG1y`xIW}-0fES){gqj5899zp9?54xM
zh?kNF?5D%k&U+8<Yn}IHybtMnze(9Ky<nRhn?ByRRNf_aL!N7SXZc3_-*2tNpQ+^=
z@%QW<xhLjY%(JX=Eaq31_(S5iTqORG__M?x5<hz^l_ma=_$?=iU;O^C$@G?pUDnJl
zG&Ua=BYul5b}({au_X>h9xT=qVU6UYL>?@*%&{XE7VC|$2G)by)9|#4+ufGi4VK#x
z|6Z%``}t~qUv8}Mw!*)+tN8slY@VCL!N|s)U+gTu?HUok-Enj0kN7?7_z>~CGIyEZ
z4^!V8EA@^0U(9cMU&KQ=9cIg%NyYrOd{&NIJ?41_JXW4d?<{j&^qA`gUARtP3Ft2#
zJ%zfb0{V+bKQyuz=rP^^y399#zFP6s=xbD8gT5BM6`Qr_gK9sBK7=lF4xw*kosGy%
z$W6#$<S=pzatm@BavO3xayxP$irwEMa|FYsJtpnvGwD(uS)doPmrDio17HV`2NgSr
zei-cVm+0r@{|U{%a8S-5sde1X@jcoH<lb_$(M;PuPE7G0vwMmf*gh`3o*LM_M$Xtb
zcCXp~9`83f8>oTZZ!!-x2&qAq8idqfP%vr`QUkjmsX<5$24y~K5K;q+Q-hEiSe+V#
z)L@VrWT`<&4Xiyi2&sXclNyB7AWIEGYLKM{AvMTSgOD0zsX<5$veY1?23cw#@p}V$
z9#IF68U)n9qXs3dflmzrYT!|WlGebd1_3qjsKI<^l<b4}=h`7>Ki8aB4b3nGUrg0`
zRlT2^uqioqwR^5x?i-uUz7=)Olk$C|BRWswyN1_79BstWhHQt2)Xt;UVAE!0)Zc@}
z<Z3|orhKQ)!4k$$V|#W}-+=n!e@f1AIlE=Ac+{1#(-If<)7drU{rxoKrn7^U_Y!rJ
zJ>XNj61DTGU5VQH)UHJBd}<fPTmSANIkx8s@w?}#aN6a2H}UseOg>L6kBMJ=ZY2H^
zaoc^-#=amAF3)3*$NaV&6pr^PPkW<z?3qIBb{_XkA%2VLnZjLYTF!=mTzKRmAP*jS
z2*`s+9s=^<k%uojH|p}O=KT1z)4PN6{ivF6Z(&nvt?;rg-#EWNX_?#K%Y0j|_gnf#
zE$5`4$Go$gOThubQpCEDSQjG6x!hl3&e`v^yp!+3JH68g=gNE)?yZ5p8_m%Yx%KEH
z0e!?<i%ex+l{yR04BxupuTO7C;+frF8@SKciPt&L?75QZH1~Kd<+E)%Y_D+LmzZ?D
z5;6MhrEd01iGAgBM=24X&weVguYC4WH+!x`d_KIgI=u1+&^f=jzoh-ust=$Ot35YX
zqZ4O|czt?hiFkebWQl(1!!J8_C^=T)P*uOG;m^7+!JqZmbhm#2e>%**%iMKWG@8v#
zCd$hwby#mq`u65b+Um{dt*W=8FF+^u^$Se8yCaic*J0B2{+@~N@0Ghv<?n;%$iLLy
zRQ22HzYm_r#_y=uMZAb?%Khf&@V~vn{|sa5^_xMtgErC|THs;}vW*@A*W)ubt3Ai|
zip7<lBR*QJM=}0(Dr3Ehr5r5oSMGiGOY|PQ275&Or=L~U7*@=^&u&vp@3VGne1G6x
zTlQ~{+Ht;?v4Uc&9qgcDYaA?8Y^{SGQEbq`jwv?eU?&vY=wPQ6+Z18mu=d&+dch36
z;2iSY{Jr(sp<mhi_@md&{d=(CrV3AjazFiz-p8Z+a=<vrgK#e5QuICU*Y^Ah%)T-0
zF9EekysxFqQTYz1UM=Sqj##Y4!3Gp-bFe|h+8u0Iv6O>l6<g?F1;rLe7<YhI8}K6t
z$zM2s{%m}I=6;fj_KR>WF+O6E@5C3~N99i0#=dE1-^gBKzl59@_HM{|Veg}IucV*a
zb6RZZr|#c>lBdR{^vsy&>>GO@rI%#ssrK9!y$_xKYWF8S)!s+t-bqij_fc7gzH0BI
zVoz@k>9O2r>|HcVU$twkWUY9wxci5^+SuIvb3yaU{t5T6wycq5zC60Dy%W8_8helj
zka^@mzDZsR=!aE5fKDxJUJjx^jxK%XF!~Y3QKRrl<m1R=$Ro((*vNWMqMy*Q$Iwrr
z%bol<`f1fqpr2L!Bs%-Yjy;Xe9<usb^q0^jH#6ujqf0%`X<jyvm*17+wfyA{{%Rxj
zF8wK!mix3li{Cft(qB2N@Xi0A`mA#QAE;{oT>OH5yny@PrTX_jsTubXdk3?8lH3Z1
z7URFvU<vvX)qBu;G_Gan%TyO0^`c8Yg-3npGLP^`I3>97h%?*fM0m7Db$Ar4WgiV9
z;gdIn971kHZbWWEZbA+thml*5Taeq3+mPFl+mTsh7P%9-6S)Vu2bo9akp*M{c>s9;
zc@TLJc^G*Z86rdE<H*O6N03L5Pa>a09zz~O9!DNWo<N>Jo<yERo<^QVo<*KT&LC%y
z=aA=+FCkw-zKnbsc>#F=`3CY0<eSJhk?+jkPp%!hVEggyEpz|>;&OMT*9PT&{7zLr
z?qZzOywZ=O@8-Vs>(_KGzi-nIyEacwj*ss4$MRh}CktK0-MOxHckC@p?i?FOD~#?Q
zE9ORv`wO|Qbl<=o1O2PgeX9n#mivW?JJ9-9tPs3!RhN8O)jx1ItIhK?@U7YW<3IIG
zn(F?~voTHltM@c9Q|<G03&<*SpC)tN9Pn0<l(X&&YOxO4F~{1N2i5+(ev4%(!Twpb
z_tYgBFV6*j>dpTixcGBX?YD|C&)@l}Xa6s7vF~aWD;^!!gREzNFSxbWl-{cLqY3tp
zsC`CL9sB<?#ZM_7`}w-!ajGBUU7o)v9<)U7k12jl@s8FAkLO=VJmTkG#ji%6&9`Ix
zh6rfZdA2GZv{lbjP<&SLPj#MS;PvwJ3$?#=V`TWT+W%hhiwmmf|5)*^uS9s9ha1SR
z_#Y@9$922nvx<MF{%=tH(pRhJ*{*oMIy)PEHjjYU^Z%Iy{3V^I<0hRSzvX#f@x3=k
z@3BAsRNVVogvW821LJq!IlgM7klQsjRm>GecJ9xQPW6qNr4N}c_uqZz{i{aC21ZA6
z`O(Q8xsj=&UmP19$sd>)neg-euH23~M*GL|#Z{|EiteW!xi2wZjcUhF<%;tx{G$T>
z><9bDi(~P6yXLhY&iOm4%$@K?_fHikCrHBl0Vc=yMH6U*H4{jH^No~%=KJnMpamM8
z%<mlA6(>Z#R~MlAyOZGR56;B9a`{}rA0L@(pflGukg4l`apo?LO^oGt)tOpZCxp0j
zpqfznX~%TlpMa6oZpo_kzc{N-O~dyI8Cfh$j>oyOxv2Za&0=Iw$W6h!sd%X6UEMFv
z(9y|4j?Gpz(D__1)Cy^8lb~OA<g)vB%`>U6d318`^vDjs=)2xlf3S^VchnxtE%Y&M
z)fVa0z9zV~UW*3~e!Y$r@q&YEi?v^89lYJKZ`S@L^XpMyzn*e%*Prta?)J@#3HT)k
zcjx)Y!QFYTCg9EVQF+8q*Zx@tck^@J!Bf#t`}^$#{ErUq&hx2*yYs|XCh^C`JM|o|
z#XSetqsjX7QwMkJb<x4ydVS>JdIZ^dmg|*F)^+o|RPPD3_!$Rx<2|Ef5_=c#*GUD}
zqs*?m)xll=-*#}<pH?MVtv`zr@Z|~kYYy)E*{m<M{x3?vS0>=69DI?DH2U?fgS+t-
z^`283*JBCz83(`BnZH>lt(~Vc0iSj7Z#eU`>b*$jas52y;I}#U?>e|^->>AW&F6*$
zd}{(eo`44l_|pma3kmpZ3HYT1{G$Z?^8|c>Zra*BbS2<-CE(vnz#mM&_a@+vCE(8_
z;Ga3ThG?tbsm)a4>UQ|B*}<1O`0fP!VF&-FWB-(cyYrk$z+Xwg-*a$x{#gfi=f6vv
zV{N^jO2Ge}fOlwfubpRU0^X_jf3bJ{S)PEOcW`YjHhY0KS((SJ*BJ-@mXl}GH#I#`
z^s~rfA(Fdet&kh{`--`Til)!rMEbH*Q>Jfpa$+KvFS>L5A9@#Kan<OtQl2TJ+AHp%
z0j6au+uefJ%ul9_L`r6fN<Bnmepx3zQ{vvdOmRJ~qe1-syk_0_gUsPRD|wMQ|JU)W
z7%Ox3^W#48`agC-^mu(&>eZ*pa_hqAHNKz7@hm^J@yl^o>${BXUo5|kxlxkqJn_0Q
UB=oO0K9I!ntcgVVckTH90ts<K3IG5A
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_silicon_core.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_silicon_core.o
new file mode 100644
index 0000000000000000000000000000000000000000..612963832933d8edac5bd0330e45f724df808b50
GIT binary patch
literal 1272
zcmbtUF>ljA6n>6@rb0-eOA$rtfe>m1ImM|0xGXLeWC;vu>B8W;j-yzzV>n+SRgq{V
z{y-!KwhCo{bY-9nNFe?LVx{UIKw*u{U3y2Xt0y?idhfpXec!X+$$ojSc0Z?SAeROo
zVZ4(lz(H=DTcgy1Nyx)+`*VM&L$?Pz^}`-?2P<0tx32BKo!zMqbl7Lq*Rz*^eAQs}
z=(_dE&E>m4KUn5r&oUc@a|iB~s_CqqHILp|rmn%wy9JoCU%=CK#^1|<Iapch54XR)
z|DxO9caw=*msy`(1%JgfdrX6p<XDp=(@<SrUPN=%hmX)|6a{X}@!O~w5ky-aS}Hyv
zQPU4tM%<Q9J(q4051F`JESC%u8)Y=-kg&+I()>Kfv4MESD3vSYIb>ygcBkN1l2y|)
zCkvpnD{JY@NnO(;AnSy<&uNto7a1~@>ib48?yy)m!Dhg-pt2AccI*ef8?|jWA|7_(
zY6sS8m4%vN`?1~hN%-6$o=rTbu_dXJP-ozS&4BtNcO-huut&~|d=zlJ6;fvda7@W@
zY{`sxfrF{np@16>bpUU~F<>_eL$6KK9{-UersY#Sqj*?iFXtr7>a1p1fuD{g2_mkG
z@8p8mbAR4PzPrS)30yt-A3~=F^~7%o&wte$qJK$gB>O*BaM?c{Q@@12?AwAMeI{6i
k-|G8MGE9ATZc-4YHNHtL*;hj6S(2si2>qfYim2-U0QaMiV*mgE
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_wait.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1_wait.o
new file mode 100644
index 0000000000000000000000000000000000000000..54f951ba7434b1cb83d88e94137c711ec9f4429d
GIT binary patch
literal 3816
zcmcguT}&KR6h1T4)?!gB3$`g6St^>cfep)#ar>YP6iHJs4c*oU9@b$Q+zHDr&I|=y
z5*D5`Q4=EZ&7i(mHpcj7j8*Di?1M2)oBCwTZtH^&z9>a(({(&&=HA`QvPfc@UKsAZ
z-#zC$fA`#WzHi`pS(1Pc2|k6=j-vn<s!QvzvkXHO?1w`7;%Y&Gr5iRZt)G!rZz)pt
zeQ#!H!vnWB6v)~(giw4rZ-+zc3iwqCo<0hhp`22eRdHUF-SeE{@voohUfuA7Zx_<v
zUbv)0e<GP~lv()?nL_$Y$3C}>HnL=IK@Nx1MF<gRA^o+(*WgpG7t&w2{;rk$ZQPd`
z@?7c**=x+#wQ$Ik=dPMHd(Jch)I0~C@%*8cBMaz<%lFMTJ~v*;FTIl)a(!|A@OZ&<
z4WM&te6IeJ7+YSc^Z%;s_20zr1I$}asdfA(J@X&Ci}sW!im4I@k4Hfn89%a3Ik<)K
zNf35o`U;?{765-?Sw`Lw2|90Lj4_b?dE}q>f`Qywu<b}rk)1je(yot<$myJ+F6of|
zpSFEy;aS%w+EY$QkLysL`BzAPF4PCIxhJHhjbV9pLy`P{bx2E_^>BN$L0YmKq>w#d
z)$I6)Hdh{p&xm79md9ULAabLjJCs)rWhoy$3UrYi<>+mUC5Jq;&nqWUUpkdR-D0kW
zdsa8==}vv;)GUuYIpwjeBtxgDvnInh>0Q2yIY610@Z5ubY@j~p5_#Oblxjts#Fsm8
zvbhJ~)FN_q+_5`<!CYN~OwG?YQ#`z0R4b{i->FYywHNQ0^h(p=)2}W_5TP1UJ*kc)
z$7_jaUD6#l@04@Oy_k2hf3NCGzS5^)U(h{0iakR2GzN25V+T**m4;d|p8I|Ocpi4Y
ze{R3ucmD?7b$Ygvf6(9Cd)#-d|An)@NGg?x#Z^7&8%r5JE3WyvTPKawn4Z9u5sT}V
z7PF=d%@+!^x3;$hLxEts@0e;#wBo9*xtZ`l&_^f1wsz`@9R|JWd*Bbd(y>zU#RpLE
zr_xZ6seC-*0AywRP+;#ium+JD!ET00_;EhS*5dTc4tNA{;>j@K7B)}dT#4r`#7X`W
zCO5$54;ju~$}s$UoGbBM-vR#}amOE)ie<)Ajr&SGM-V4@pX>^f9F5Qp@`Fsijg{tt
zD-H>U=NRr~_?rypCFA~l%<%VEDLD@36I~sNV02p5tw0Q#X5idFSI0mws+-Y~RLY9R
zQWKL2&C)nNG}<#;+UZH%iY5}#QA0nk8Bx<xg)=icrW+H}s-Z;<O&y)(6iB`GAZqFf
zJ(fxe0!eK;I;vXgR?W#2+QQD+;+kGkd=aBKYjPUeol_H2+MsHV_Z1_fP<JC4ERqyW
zZgrX4=+~@>9vkmXO(iXk6%ABYDKZ*r@@0)DScsyizpH?ynZ*hb0YDSG2lZI*{cKIs
z2?4JX@c0fmzaPYNK#;#8$cy}5l%qlN54%g}Z$!Y|H^V)Q3%KadM*{wU!1J4cKPupN
z1^giaKh64!{P76*jDSBV;I9d|D1UJWoIjPsFZxr>`mx-uCE)ZH^6`d%i~d{|aFPFS
zhSNJD=Cg(MHQ5#Z>ke@N7kTCcypB7A^A7?p^6Y0%dU?EF0T+27V9rih>Ilx3;m&cs
zGPHymu(TNq0@UIV7%@!<;6pQ^VH4e(;X@is1?(%M3$uM^**{U`Z*@J&Q7X7RQ-d74
zto*(ZKiT2EaF_``#c)<Gh5}e+cKHEuh@%BJ#QA^qgQ!cKZTN|U+aDG|Tyy*4%&z_x
v$t%qNFgv6krLR1GN>jP-M0Ah|{>Tjxh@))l^i(DNIJ=a`UA5xha{Ye+NYLg1
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1x.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/vl53l1x.o
new file mode 100644
index 0000000000000000000000000000000000000000..8b03487cea4178323d05ef7944b8a7c694bdcd3c
GIT binary patch
literal 1752
zcmdUvzi-n(6vtnhLW_`4V5(r~At8}U#IjvwC{s!ZQKbZ-kk$i3aqX*O)v>F~rAnuE
zU|>XIVL^hw05&$%KY)P+gqRqakoXJWU3gbJhglE{PqOZPKkvucz8^=e&YihZ3AB~q
z4P;7FfKT(8-<Y}$ScC;&aNIj7Z+~27<qzsHH5l>#RYSYkyveHVyPK?^rg1RvqlE3I
zg2@4A>$QE6?nW_sA{a!H2XZVpTeIAnYddR}<FcwRhBfr;l@-M;hpC8TyY=k97I|td
z=HdH~qFA|br2xt>SCo#t{2M<%B}FT)`s5a!Dlg!8DL3yT@yo<3q&2sRGlRE?tGF_q
z@1d{yHxxwEe1N{<_og)C2gDy5{1NeegFhvHZ19)FpBVfV@fQYvOZ>IL-w{7C_-Eqp
z4gQVz7lXq=Twjfyi50-Li5444B(>k?BiT%o1ov8$CYs*oa>H$|hoRu35o~qps~u<C
z6SyV2<5)(T^td0+08iXHlw5~B;iV$X)a|_Nh56K8I2)Tu_54U~X0L&&d#c)8_M>30
znT`{AIumAW`SF-{{n1`)0$_~}htl7{QHo#VKzou;Bv_#@eXw@$Tdg1+4mtMvH+BWv
zs8ey)XxAY9)!-FFUq!9z%@bEuu)s`w9dp#)|J(W-SgU&4_~cE`{~!<1*YoGcqFdxK
rB~&P={?7tF`kXFN-*Y&c@2*162%gasQNAJJ;vedt)0Jdin`Zq_(HP*B
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/watchdog.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/watchdog.o
new file mode 100644
index 0000000000000000000000000000000000000000..5b876362e187003b87529400e734db5dc4a41a6f
GIT binary patch
literal 1016
zcmb`G%}T>S5XYyD*b0Ilco00ef?x}FNrE2gsZz8E(u3BM2ic~n2{estR;(vI`Z(Ua
zc<?0@U&EU>ovpj=vgRZXEHm@V{C9RI$=$*6VX;sEZ3TFOX{IT_rvV#d+<-EafWZC9
zi*xa|PMlY{WDKolbB|P7?K9Fz(?Jlicu4vwCn5^Te(j2<{dj;8529Fvfw<-&sZ+n^
zyI!4oKB+LC)G%_ZRmrJG<P*>Jcc<sEBYC_T`1rE9%$?jDNnXq=NACRM^J8KR!KiSs
zvuz6qmW{q;Rj{S_qRJ=A8zzFNmtN8UHb<bdcFGerI2DYGPMC=aKN`jYfM&OeU|sZr
z|M*BpA{+^zJti2?Zk7QJ(j*CoDEc2;!)@d=X07cSDqpd<zOTj`7)ZT6>5eY2yghk2
zM>*5K>bFrV_jGZYru(0p5M$ln^m$*;qtd-AFXvOjrQiRm;&bTjv&%;hs=<z`(@yu*
Q`4R?s`e#*W|0=fr8wZC_t^fc4
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/worker.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/worker.o
new file mode 100644
index 0000000000000000000000000000000000000000..4776989aee96fedee22313d6e44d03286385b668
GIT binary patch
literal 2376
zcmds%O-vI(6vy9oRld}q#X!W!9*8N4Y}zI!;>E>AL4!tHIC+3&JJ80qOSW5ulxT?_
zJb0k$!Nh|eh3JjMlZNQUgC`O>m&Aitf(LtOaNh2lbltXIyg7utH^2G6H*dCY=E3EO
zD*;IYF(h~o^_idmUk=rM&2cs8gbt_`Kd#keDDQPaH3+ae6VR$9fQ`K_ty(L7db24{
zZ_At;0OeUNP?iFv_-iP|d5Y(-tUa3vK-H_|d=)^e4gl;{+FqT+_yI-!CjM*15AJ>m
zX$|-L`4Gyu=Zpj!sM(Qw)&o#_iurefT2<$@RC=|l0vESY_iKN@cP}xzRx5sXYJ&i5
ze3zwlJO@AbDxO7#(iYFLRS8OK3a@1+24&2*B9-D;7oMvUTybgx&ag(l{(q0LSnPrl
z8oM#2OqyoKNa^XEGG|(fonp%9@PcK|r8C^Kj8xiYhF!3jGNML@qv6Pi8i^_)-O3Jg
zFFZ7aT#YEW5(!7o{r$6HFCKv1{bnk;X{Q3n{IA)Nc_#npbU<UrA8~l2zMFH&lc(L2
zP=<q^nd`cF8u=+FPo49ocSeM`nBOFhMh4F%Bz}$C<DTyz^i!O7lg4XOq!+p#TFet)
zpt)GT&*#nZJR$ui>Bq^w<hGd}?wQsdW~l}YF2Z1vrnd^Lz`)EWmh#iCz#-S?vyCue
zo0dM$DDrA9ZNs9Yj#*5%S;E%sv_Y$rEN_!LVVVmhj5C9!?}`iwBgK-145P&{mSa}h
zNU&TIk8+sK6XdPo?E-PO(>^}v(R+I$MEnHTd--|d{hS{qAB{%7Kfm}r{Pj$>&@U7B
z>mRkyzaWnF93vmiTk`$&d?oJBUumKLK^*h*ce_5+{8HA|XF<)|mTObOvsgw~ZMJBG
zn$&F_)Y*I<RKv)+*34#E&aP+rCr{zgytIZJrg4U&9Tz=A^npPA+`&H41R&c-S3E`W
zZJeVkdZCYWXNdb>u5sVKB=_8Smz?DWbGC{X`-yn}+<kXi$5%ukS%3Tp=U8gkrwavK
zaNEblvAmX~e<&XltdJ1*#Wz*#FTP&~Xa2Keq7+@;cR2A3v9Cbb^UdN*^yFR=LbCq&
E-#lUUhyVZp
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ws2812_cf2.o b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/uart/build/ws2812_cf2.o
new file mode 100644
index 0000000000000000000000000000000000000000..6b251d860d821c60c712f834965da867e4a03bb8
GIT binary patch
literal 1120
zcmbtT%}N6?5T166trt;Gf`SnWwqV2VV!?W9X|)!rpw*LyHQlCcp}Q;Di1p-SdG!&z
zD87bIph=t1C9EJg5aydNGnt<x&nNxUd@cuCa_|C6OS1rX`6X`7VG~MFgjdV^*hSX6
zUVpKn+ioADO84RhUB~g%56C1!<Cq~HP}Hj3vv@q23dH<i!l}<67)1^2)?C|ZV8=xj
z!or$BcC{*b>>#=0*lvAUqlsis1^D_ld1+gj9ZNpdbSlsiJEpA7iLA-Va|)(AYzSsE
zl~;T0D1Kc<XntSu$lwnZZyP*3Chn2rdj8nOK9pz5?nM)>;DAOW1v??>B@8;}Eyo*h
zMoC!rdRLccBpOXA1Hj2s$jMM>&K5e*h|?JdJR+O`9wrH3KMq40aaGR0)wVc6PIbjN
zsi|z)e_Hh1G`A;!j5lxWw*t)@lyfirBmO|;*Y_jLx#;}2nowHjPwT8#_@?|z%2Cdz
nD3+{M%GN@`s?cWda_dvY^_8DiI<L0nJI#tOtD?*=XU6{kw838}
literal 0
HcmV?d00001
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/cf_math.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/cf_math.h
index 72a5a9c09..4a8aae466 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/cf_math.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/cf_math.h
@@ -32,90 +32,91 @@
#pragma GCC diagnostic ignored "-Wpointer-to-int-cast"
#pragma GCC diagnostic ignored "-Wint-to-pointer-cast"
#pragma GCC diagnostic ignored "-Wunused-parameter"
-#include "arm_math.h"
+//#include "arm_math.h"
#pragma GCC diagnostic pop
#include "cfassert.h"
-#define DEG_TO_RAD (PI/180.0f)
-#define RAD_TO_DEG (180.0f/PI)
+// #define DEG_TO_RAD (PI/180.0f)
+// #define RAD_TO_DEG (180.0f/PI)
#define MIN(a, b) ((b) < (a) ? (b) : (a))
#define MAX(a, b) ((b) > (a) ? (b) : (a))
-// Matrix data must be aligned on 4 byte bundaries
-static inline void assert_aligned_4_bytes(const arm_matrix_instance_f32* matrix) {
- const uint32_t address = (uint32_t)matrix->pData;
- ASSERT((address & 0x3) == 0);
-}
-
-static inline void mat_trans(const arm_matrix_instance_f32 * pSrc, arm_matrix_instance_f32 * pDst) {
- assert_aligned_4_bytes(pSrc);
- assert_aligned_4_bytes(pDst);
-
- ASSERT(ARM_MATH_SUCCESS == arm_mat_trans_f32(pSrc, pDst));
-}
-
-static inline void mat_inv(const arm_matrix_instance_f32 * pSrc, arm_matrix_instance_f32 * pDst) {
- assert_aligned_4_bytes(pSrc);
- assert_aligned_4_bytes(pDst);
-
- ASSERT(ARM_MATH_SUCCESS == arm_mat_inverse_f32(pSrc, pDst));
-}
-
-static inline void mat_mult(const arm_matrix_instance_f32 * pSrcA, const arm_matrix_instance_f32 * pSrcB, arm_matrix_instance_f32 * pDst) {
- assert_aligned_4_bytes(pSrcA);
- assert_aligned_4_bytes(pSrcB);
- assert_aligned_4_bytes(pDst);
-
- ASSERT(ARM_MATH_SUCCESS == arm_mat_mult_f32(pSrcA, pSrcB, pDst));
-}
-
-static inline float arm_sqrt(float32_t in) {
- float pOut = 0;
- arm_status result = arm_sqrt_f32(in, &pOut);
- ASSERT(ARM_MATH_SUCCESS == result);
- return pOut;
-}
-
-static inline float limPos(float in) {
- if (in < 0.0f) {
- return 0.0f;
- }
-
- return in;
-}
-
-static inline float clip1(float a) {
- if (a < -1.0f) {
- return -1.0f;
- }
-
- if (a > 1.0f) {
- return 1.0f;
- }
-
- return a;
-}
-
-static inline void mat_scale(const arm_matrix_instance_f32 * pSrcA, float32_t scale, arm_matrix_instance_f32 * pDst)
-{ ASSERT(ARM_MATH_SUCCESS == arm_mat_scale_f32(pSrcA, scale, pDst)); }
-
-// copy float matrix
-static inline void matrixcopy(int ROW, int COLUMN, float destmat[ROW][COLUMN], float srcmat[ROW][COLUMN]){
- //TODO: check the dimension of the matrices
- for (int i=0; i<ROW; i++){
- for(int j=0; j<COLUMN; j++){
- destmat[i][j] = srcmat[i][j];
- }
- }
-}
-
-// copy float vector
-static inline void vectorcopy(int DIM, float destVec[DIM], float srcVec[DIM]){
- //TODO: check the dimension of the vector
- for (int i=0; i<DIM; i++){
- destVec[i] = srcVec[i];
- }
-}
\ No newline at end of file
+//COMMENTED FIRMWARE
+// // Matrix data must be aligned on 4 byte bundaries
+// static inline void assert_aligned_4_bytes(const arm_matrix_instance_f32* matrix) {
+// const uint32_t address = (uint32_t)matrix->pData;
+// ASSERT((address & 0x3) == 0);
+// }
+
+// static inline void mat_trans(const arm_matrix_instance_f32 * pSrc, arm_matrix_instance_f32 * pDst) {
+// assert_aligned_4_bytes(pSrc);
+// assert_aligned_4_bytes(pDst);
+
+// ASSERT(ARM_MATH_SUCCESS == arm_mat_trans_f32(pSrc, pDst));
+// }
+
+// static inline void mat_inv(const arm_matrix_instance_f32 * pSrc, arm_matrix_instance_f32 * pDst) {
+// assert_aligned_4_bytes(pSrc);
+// assert_aligned_4_bytes(pDst);
+
+// ASSERT(ARM_MATH_SUCCESS == arm_mat_inverse_f32(pSrc, pDst));
+// }
+
+// static inline void mat_mult(const arm_matrix_instance_f32 * pSrcA, const arm_matrix_instance_f32 * pSrcB, arm_matrix_instance_f32 * pDst) {
+// assert_aligned_4_bytes(pSrcA);
+// assert_aligned_4_bytes(pSrcB);
+// assert_aligned_4_bytes(pDst);
+
+// ASSERT(ARM_MATH_SUCCESS == arm_mat_mult_f32(pSrcA, pSrcB, pDst));
+// }
+
+// static inline float arm_sqrt(float32_t in) {
+// float pOut = 0;
+// arm_status result = arm_sqrt_f32(in, &pOut);
+// ASSERT(ARM_MATH_SUCCESS == result);
+// return pOut;
+// }
+
+// static inline float limPos(float in) {
+// if (in < 0.0f) {
+// return 0.0f;
+// }
+
+// return in;
+// }
+
+// static inline float clip1(float a) {
+// if (a < -1.0f) {
+// return -1.0f;
+// }
+
+// if (a > 1.0f) {
+// return 1.0f;
+// }
+
+// return a;
+// }
+
+// static inline void mat_scale(const arm_matrix_instance_f32 * pSrcA, float32_t scale, arm_matrix_instance_f32 * pDst)
+// { ASSERT(ARM_MATH_SUCCESS == arm_mat_scale_f32(pSrcA, scale, pDst)); }
+
+// // copy float matrix
+// static inline void matrixcopy(int ROW, int COLUMN, float destmat[ROW][COLUMN], float srcmat[ROW][COLUMN]){
+// //TODO: check the dimension of the matrices
+// for (int i=0; i<ROW; i++){
+// for(int j=0; j<COLUMN; j++){
+// destmat[i][j] = srcmat[i][j];
+// }
+// }
+// }
+
+// // copy float vector
+// static inline void vectorcopy(int DIM, float destVec[DIM], float srcVec[DIM]){
+// //TODO: check the dimension of the vector
+// for (int i=0; i<DIM; i++){
+// destVec[i] = srcVec[i];
+// }
+// }
\ No newline at end of file
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/lighthouse/lighthouse_geometry.c b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/lighthouse/lighthouse_geometry.c
index e8de754ef..b5a860120 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/lighthouse/lighthouse_geometry.c
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/lighthouse/lighthouse_geometry.c
@@ -158,15 +158,16 @@ bool lighthouseGeometryIntersectionPlaneVector(const vec3d linePoint, const vec3
return true;
}
-void lighthouseGeometryGetSensorPosition(const vec3d cfPos, const arm_matrix_instance_f32 *R, vec3d sensorPosition, vec3d pos) {
- arm_matrix_instance_f32 LOCAL_POS = {3, 1, sensorPosition};
+//COMMENTED FIRMWARE
+// void lighthouseGeometryGetSensorPosition(const vec3d cfPos, const arm_matrix_instance_f32 *R, vec3d sensorPosition, vec3d pos) {
+// arm_matrix_instance_f32 LOCAL_POS = {3, 1, sensorPosition};
- vec3d rotatedPos = {0};
- arm_matrix_instance_f32 ROTATED_POS = {1, 3, rotatedPos};
- arm_mat_mult_f32(R, &LOCAL_POS, &ROTATED_POS);
+// vec3d rotatedPos = {0};
+// arm_matrix_instance_f32 ROTATED_POS = {1, 3, rotatedPos};
+// arm_mat_mult_f32(R, &LOCAL_POS, &ROTATED_POS);
- vec_add(cfPos, rotatedPos, pos);
-}
+// vec_add(cfPos, rotatedPos, pos);
+// }
bool lighthouseGeometryYawDelta(const vec3d ipv, const vec3d spv, const vec3d n, float* yawDelta) {
float spvn = vec_length(spv);
diff --git a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/lighthouse/lighthouse_geometry.h b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/lighthouse/lighthouse_geometry.h
index 277a9cfad..f4bca0b5f 100644
--- a/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/lighthouse/lighthouse_geometry.h
+++ b/uboot-compiler/bm_crazyflie/FreeRTOS/Demo/CORTEX_A72_64-bit_Raspberrypi4/utils/src/lighthouse/lighthouse_geometry.h
@@ -1,7 +1,7 @@
#pragma once
#include <stdbool.h>
-#include "arm_math.h"
+//#include "arm_math.h"
#include "stabilizer_types.h"
typedef struct {
@@ -68,7 +68,8 @@ bool lighthouseGeometryIntersectionPlaneVector(const vec3d linePoint, const vec3
* @param sensorPosition - the sensor position relative to the center of the Crazyflie
* @param pos - (output) the position of the sensor
*/
-void lighthouseGeometryGetSensorPosition(const vec3d cfPos, const arm_matrix_instance_f32 *R, vec3d sensorPosition, vec3d pos);
+//COMMENTED FIRMWARE
+//void lighthouseGeometryGetSensorPosition(const vec3d cfPos, const arm_matrix_instance_f32 *R, vec3d sensorPosition, vec3d pos);
/**
* @brief Calculate the angle between two vectors. The vectors are assumed to be in a plane defined by
--
GitLab